* [PATCH net-next 03/15] be2net: Use domain id when be_cmd_if_destroy is called.
From: Ajit Khaparde @ 2011-02-11 23:34 UTC (permalink / raw)
To: netdev, davem
Signed-off-by: Ajit Khaparde <ajit.khaparde@emulex.com>
---
drivers/net/benet/be_cmds.c | 3 ++-
drivers/net/benet/be_cmds.h | 3 ++-
drivers/net/benet/be_main.c | 7 ++++---
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index d3b671d..be2981a 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -995,7 +995,7 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
}
/* Uses mbox */
-int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id)
+int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id, u32 domain)
{
struct be_mcc_wrb *wrb;
struct be_cmd_req_if_destroy *req;
@@ -1016,6 +1016,7 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id)
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
+ req->hdr.domain = domain;
req->interface_id = cpu_to_le32(interface_id);
status = be_mbox_notify_wait(adapter);
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
index 83d15c8..02540bd 100644
--- a/drivers/net/benet/be_cmds.h
+++ b/drivers/net/benet/be_cmds.h
@@ -1004,7 +1004,8 @@ extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id);
extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
u32 en_flags, u8 *mac, bool pmac_invalid,
u32 *if_handle, u32 *pmac_id, u32 domain);
-extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle);
+extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle,
+ u32 domain);
extern int be_cmd_eq_create(struct be_adapter *adapter,
struct be_queue_info *eq, int eq_delay);
extern int be_cmd_cq_create(struct be_adapter *adapter,
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 4c73dce..aab464d 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -2335,8 +2335,9 @@ if_destroy:
for (vf = 0; vf < num_vfs; vf++)
if (adapter->vf_cfg[vf].vf_if_handle)
be_cmd_if_destroy(adapter,
- adapter->vf_cfg[vf].vf_if_handle);
- be_cmd_if_destroy(adapter, adapter->if_handle);
+ adapter->vf_cfg[vf].vf_if_handle,
+ vf + 1);
+ be_cmd_if_destroy(adapter, adapter->if_handle, 0);
do_none:
return status;
}
@@ -2350,7 +2351,7 @@ static int be_clear(struct be_adapter *adapter)
be_rx_queues_destroy(adapter);
be_tx_queues_destroy(adapter);
- be_cmd_if_destroy(adapter, adapter->if_handle);
+ be_cmd_if_destroy(adapter, adapter->if_handle, 0);
/* tell fw we're done with firing cmds */
be_cmd_fw_clean(adapter);
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 04/15] be2net: Initialize and cleanup sriov resources only if pci_enable_sriov has succeeded.
From: Ajit Khaparde @ 2011-02-11 23:35 UTC (permalink / raw)
To: netdev, davem
Signed-off-by: Ajit Khaparde <ajit.khaparde@emulex.com>
---
drivers/net/benet/be_main.c | 39 ++++++++++++++++++++++-----------------
1 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index aab464d..c8075c1 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -2277,22 +2277,26 @@ static int be_setup(struct be_adapter *adapter)
goto do_none;
if (be_physfn(adapter)) {
- while (vf < num_vfs) {
- cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
- | BE_IF_FLAGS_BROADCAST;
- status = be_cmd_if_create(adapter, cap_flags, en_flags,
- mac, true,
+ if (adapter->sriov_enabled) {
+ while (vf < num_vfs) {
+ cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
+ BE_IF_FLAGS_BROADCAST;
+ status = be_cmd_if_create(adapter, cap_flags,
+ en_flags, mac, true,
&adapter->vf_cfg[vf].vf_if_handle,
NULL, vf+1);
- if (status) {
- dev_err(&adapter->pdev->dev,
- "Interface Create failed for VF %d\n", vf);
- goto if_destroy;
+ if (status) {
+ dev_err(&adapter->pdev->dev,
+ "Interface Create failed for VF %d\n",
+ vf);
+ goto if_destroy;
+ }
+ adapter->vf_cfg[vf].vf_pmac_id =
+ BE_INVALID_PMAC_ID;
+ vf++;
}
- adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
- vf++;
}
- } else if (!be_physfn(adapter)) {
+ } else {
status = be_cmd_mac_addr_query(adapter, mac,
MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
if (!status) {
@@ -2313,7 +2317,7 @@ static int be_setup(struct be_adapter *adapter)
if (status != 0)
goto rx_qs_destroy;
- if (be_physfn(adapter)) {
+ if (be_physfn(adapter) && adapter->sriov_enabled) {
status = be_vf_eth_addr_config(adapter);
if (status)
goto mcc_q_destroy;
@@ -2332,9 +2336,10 @@ rx_qs_destroy:
tx_qs_destroy:
be_tx_queues_destroy(adapter);
if_destroy:
- for (vf = 0; vf < num_vfs; vf++)
- if (adapter->vf_cfg[vf].vf_if_handle)
- be_cmd_if_destroy(adapter,
+ if (be_physfn(adapter) && adapter->sriov_enabled)
+ for (vf = 0; vf < num_vfs; vf++)
+ if (adapter->vf_cfg[vf].vf_if_handle)
+ be_cmd_if_destroy(adapter,
adapter->vf_cfg[vf].vf_if_handle,
vf + 1);
be_cmd_if_destroy(adapter, adapter->if_handle, 0);
@@ -2344,7 +2349,7 @@ do_none:
static int be_clear(struct be_adapter *adapter)
{
- if (be_physfn(adapter))
+ if (be_physfn(adapter) && adapter->sriov_enabled)
be_vf_eth_addr_rem(adapter);
be_mcc_queues_destroy(adapter);
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 02/15] be2net: endianness fix in be_cmd_set_qos().
From: Ajit Khaparde @ 2011-02-11 23:33 UTC (permalink / raw)
To: netdev, davem
Signed-off-by: Ajit Khaparde <ajit.khaparde@emulex.com>
---
drivers/net/benet/be_cmds.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index a179cc6..d3b671d 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -1868,8 +1868,8 @@ int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)
OPCODE_COMMON_SET_QOS, sizeof(*req));
req->hdr.domain = domain;
- req->valid_bits = BE_QOS_BITS_NIC;
- req->max_bps_nic = bps;
+ req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC);
+ req->max_bps_nic = cpu_to_le32(bps);
status = be_mcc_notify_wait(adapter);
--
1.7.1
^ permalink raw reply related
* [PATCH net-next 00/15] be2net: patch series
From: Ajit Khaparde @ 2011-02-11 23:32 UTC (permalink / raw)
To: netdev, davem
Patch series for the be2net driver.
[01/15]: While configuring QOS for VF, pass proper domain id
[02/15]: endianness fix in be_cmd_set_qos().
[03/15]: Use domain id when be_cmd_if_destroy is called.
[04/15]: Initialize and cleanup sriov resources only if pci_enable_sriov has succeeded.
[05/15]: call be_vf_eth_addr_config() after register_netdev
[06/15]: Cleanup the VF interface handles
[07/15]: For the VF MAC, use the OUI from current MAC address
[08/15]: pass domain numbers for pmac_add/del functions
[09/15]: Allow VFs to call be_cmd_reset_function.
[10/15]: Fix broken priority setting when vlan tagging is enabled.
[11/15]: pass proper hdr_size while flashing redboot.
[12/15]: fix be_suspend/resume/shutdown
[13/15]: gracefully handle situations when UE is detected
[14/15]: detect a UE even when a interface is down.
[15/15]: restrict WOL to PFs only.
Please Apply.
Thanks
-Ajit
^ permalink raw reply
* [PATCH net-next 01/15] be2net: While configuring QOS for VF, pass proper domain id
From: Ajit Khaparde @ 2011-02-11 23:32 UTC (permalink / raw)
To: netdev, davem
While configuring QOS for VFs, the VF number should be translated
to domain number correctly.
Signed-off-by: Ajit Khaparde <ajit.khaparde@emulex.com>
---
drivers/net/benet/be_main.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 82b2df8..4c73dce 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -820,7 +820,7 @@ static int be_set_vf_tx_rate(struct net_device *netdev,
rate = 10000;
adapter->vf_cfg[vf].vf_tx_rate = rate;
- status = be_cmd_set_qos(adapter, rate / 10, vf);
+ status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
if (status)
dev_info(&adapter->pdev->dev,
--
1.7.1
^ permalink raw reply related
* [PATCH 4/4] batman-adv: Disallow originator addressing within mesh layer
From: Sven Eckelmann @ 2011-02-11 23:21 UTC (permalink / raw)
To: davem; +Cc: netdev, b.a.t.m.a.n, Linus Lüssing, Sven Eckelmann
In-Reply-To: <1297466503-13246-1-git-send-email-sven@narfation.org>
From: Linus Lüssing <linus.luessing@ascom.ch>
For a host in the mesh network, the batman layer should be transparent.
However, we had one exception, data packets within the mesh network
which have the same destination as a originator are being routed to
that node, although there is no host that node's bat0 interface and
therefore gets dropped anyway. This commit removes this exception.
Signed-off-by: Linus Lüssing <linus.luessing@ascom.ch>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
---
net/batman-adv/unicast.c | 7 +------
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/net/batman-adv/unicast.c b/net/batman-adv/unicast.c
index 6c92eef..1b5e761 100644
--- a/net/batman-adv/unicast.c
+++ b/net/batman-adv/unicast.c
@@ -281,7 +281,7 @@ int unicast_send_skb(struct sk_buff *skb, struct bat_priv *bat_priv)
{
struct ethhdr *ethhdr = (struct ethhdr *)skb->data;
struct unicast_packet *unicast_packet;
- struct orig_node *orig_node;
+ struct orig_node *orig_node = NULL;
struct batman_if *batman_if;
struct neigh_node *router;
int data_len = skb->len;
@@ -292,11 +292,6 @@ int unicast_send_skb(struct sk_buff *skb, struct bat_priv *bat_priv)
/* get routing information */
if (is_multicast_ether_addr(ethhdr->h_dest))
orig_node = (struct orig_node *)gw_get_selected(bat_priv);
- else
- orig_node = ((struct orig_node *)hash_find(bat_priv->orig_hash,
- compare_orig,
- choose_orig,
- ethhdr->h_dest));
/* check for hna host */
if (!orig_node)
--
1.7.2.3
^ permalink raw reply related
* [PATCH 3/4] batman-adv: Remove duplicate types.h inclusions
From: Sven Eckelmann @ 2011-02-11 23:21 UTC (permalink / raw)
To: davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
b.a.t.m.a.n-ZwoEplunGu2X36UT3dwllkB+6BGkLq7r, Linus Lüssing
In-Reply-To: <1297466503-13246-1-git-send-email-sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
From: Linus Lüssing <linus.luessing-8gDhuhu/iIQ@public.gmane.org>
types.h is included by main.h, which is included at the beginning of any
other c-file anyway. Therefore this commit removes those duplicate
inclussions.
Signed-off-by: Linus Lüssing <linus.luessing-8gDhuhu/iIQ@public.gmane.org>
Signed-off-by: Sven Eckelmann <sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
---
net/batman-adv/icmp_socket.c | 1 -
net/batman-adv/icmp_socket.h | 2 --
net/batman-adv/main.c | 1 -
net/batman-adv/routing.c | 1 -
net/batman-adv/routing.h | 2 --
net/batman-adv/send.c | 1 -
net/batman-adv/send.h | 2 --
net/batman-adv/soft-interface.c | 1 -
net/batman-adv/translation-table.c | 1 -
net/batman-adv/translation-table.h | 2 --
10 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/net/batman-adv/icmp_socket.c b/net/batman-adv/icmp_socket.c
index 5e86d6f..319a7cc 100644
--- a/net/batman-adv/icmp_socket.c
+++ b/net/batman-adv/icmp_socket.c
@@ -24,7 +24,6 @@
#include <linux/slab.h>
#include "icmp_socket.h"
#include "send.h"
-#include "types.h"
#include "hash.h"
#include "originator.h"
#include "hard-interface.h"
diff --git a/net/batman-adv/icmp_socket.h b/net/batman-adv/icmp_socket.h
index 08b1859..462b190 100644
--- a/net/batman-adv/icmp_socket.h
+++ b/net/batman-adv/icmp_socket.h
@@ -22,8 +22,6 @@
#ifndef _NET_BATMAN_ADV_ICMP_SOCKET_H_
#define _NET_BATMAN_ADV_ICMP_SOCKET_H_
-#include "types.h"
-
#define ICMP_SOCKET "socket"
void bat_socket_init(void);
diff --git a/net/batman-adv/main.c b/net/batman-adv/main.c
index dc9248d..06d956c 100644
--- a/net/batman-adv/main.c
+++ b/net/batman-adv/main.c
@@ -30,7 +30,6 @@
#include "translation-table.h"
#include "hard-interface.h"
#include "gateway_client.h"
-#include "types.h"
#include "vis.h"
#include "hash.h"
diff --git a/net/batman-adv/routing.c b/net/batman-adv/routing.c
index 028f739..8274140 100644
--- a/net/batman-adv/routing.c
+++ b/net/batman-adv/routing.c
@@ -28,7 +28,6 @@
#include "icmp_socket.h"
#include "translation-table.h"
#include "originator.h"
-#include "types.h"
#include "ring_buffer.h"
#include "vis.h"
#include "aggregation.h"
diff --git a/net/batman-adv/routing.h b/net/batman-adv/routing.h
index ceeca6f..a09d16f 100644
--- a/net/batman-adv/routing.h
+++ b/net/batman-adv/routing.h
@@ -22,8 +22,6 @@
#ifndef _NET_BATMAN_ADV_ROUTING_H_
#define _NET_BATMAN_ADV_ROUTING_H_
-#include "types.h"
-
void slide_own_bcast_window(struct batman_if *batman_if);
void receive_bat_packet(struct ethhdr *ethhdr,
struct batman_packet *batman_packet,
diff --git a/net/batman-adv/send.c b/net/batman-adv/send.c
index 7cc620e..8314276 100644
--- a/net/batman-adv/send.c
+++ b/net/batman-adv/send.c
@@ -25,7 +25,6 @@
#include "translation-table.h"
#include "soft-interface.h"
#include "hard-interface.h"
-#include "types.h"
#include "vis.h"
#include "aggregation.h"
#include "gateway_common.h"
diff --git a/net/batman-adv/send.h b/net/batman-adv/send.h
index bc53ade..b68c272 100644
--- a/net/batman-adv/send.h
+++ b/net/batman-adv/send.h
@@ -22,8 +22,6 @@
#ifndef _NET_BATMAN_ADV_SEND_H_
#define _NET_BATMAN_ADV_SEND_H_
-#include "types.h"
-
int send_skb_packet(struct sk_buff *skb,
struct batman_if *batman_if,
uint8_t *dst_addr);
diff --git a/net/batman-adv/soft-interface.c b/net/batman-adv/soft-interface.c
index 145e0f7..bd088f8 100644
--- a/net/batman-adv/soft-interface.c
+++ b/net/batman-adv/soft-interface.c
@@ -26,7 +26,6 @@
#include "send.h"
#include "bat_debugfs.h"
#include "translation-table.h"
-#include "types.h"
#include "hash.h"
#include "gateway_common.h"
#include "gateway_client.h"
diff --git a/net/batman-adv/translation-table.c b/net/batman-adv/translation-table.c
index f6917dd..7fb6726 100644
--- a/net/batman-adv/translation-table.c
+++ b/net/batman-adv/translation-table.c
@@ -22,7 +22,6 @@
#include "main.h"
#include "translation-table.h"
#include "soft-interface.h"
-#include "types.h"
#include "hash.h"
#include "originator.h"
diff --git a/net/batman-adv/translation-table.h b/net/batman-adv/translation-table.h
index a4f3a37..f19931c 100644
--- a/net/batman-adv/translation-table.h
+++ b/net/batman-adv/translation-table.h
@@ -22,8 +22,6 @@
#ifndef _NET_BATMAN_ADV_TRANSLATION_TABLE_H_
#define _NET_BATMAN_ADV_TRANSLATION_TABLE_H_
-#include "types.h"
-
int hna_local_init(struct bat_priv *bat_priv);
void hna_local_add(struct net_device *soft_iface, uint8_t *addr);
void hna_local_remove(struct bat_priv *bat_priv,
--
1.7.2.3
^ permalink raw reply related
* [PATCH 2/4] batman-adv: Split combined variable declarations
From: Sven Eckelmann @ 2011-02-11 23:21 UTC (permalink / raw)
To: davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
b.a.t.m.a.n-ZwoEplunGu2X36UT3dwllkB+6BGkLq7r, Marek Lindner
In-Reply-To: <1297466503-13246-1-git-send-email-sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
From: Marek Lindner <lindner_marek-LWAfsSFWpa4@public.gmane.org>
Multiple variable declarations in a single statements over multiple lines can
be split into multiple variable declarations without changing the actual
behavior.
Signed-off-by: Marek Lindner <lindner_marek-LWAfsSFWpa4@public.gmane.org>
Signed-off-by: Sven Eckelmann <sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
---
net/batman-adv/unicast.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/net/batman-adv/unicast.c b/net/batman-adv/unicast.c
index 9b2a222..6c92eef 100644
--- a/net/batman-adv/unicast.c
+++ b/net/batman-adv/unicast.c
@@ -39,8 +39,8 @@ static struct sk_buff *frag_merge_packet(struct list_head *head,
(struct unicast_frag_packet *)skb->data;
struct sk_buff *tmp_skb;
struct unicast_packet *unicast_packet;
- int hdr_len = sizeof(struct unicast_packet),
- uni_diff = sizeof(struct unicast_frag_packet) - hdr_len;
+ int hdr_len = sizeof(struct unicast_packet);
+ int uni_diff = sizeof(struct unicast_frag_packet) - hdr_len;
/* set skb to the first part and tmp_skb to the second part */
if (up->flags & UNI_FRAG_HEAD) {
--
1.7.2.3
^ permalink raw reply related
* [PATCH 1/4] batman-adv: Use successive sequence numbers for fragments
From: Sven Eckelmann @ 2011-02-11 23:21 UTC (permalink / raw)
To: davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
b.a.t.m.a.n-ZwoEplunGu2X36UT3dwllkB+6BGkLq7r
In-Reply-To: <1297466503-13246-1-git-send-email-sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
The two fragments of an unicast packet must have successive sequence numbers to
allow the receiver side to detect matching fragments and merge them again. The
current implementation doesn't provide that property because a sequence of two
atomic_inc_return may be interleaved with another sequence which also changes
the variable.
The access to the fragment sequence number pool has either to be protected by
correct locking or it has to reserve two sequence numbers in a single fetch.
The latter one can easily be done by increasing the value of the last used
sequence number by 2 in a single step. The generated window of two currently
unused sequence numbers can now be scattered across the two fragments.
Reported-by: Linus Lüssing <linus.luessing-S0/GAf8tV78@public.gmane.org>
Signed-off-by: Sven Eckelmann <sven-KaDOiPu9UxWEi8DpZVb4nw@public.gmane.org>
---
net/batman-adv/unicast.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/net/batman-adv/unicast.c b/net/batman-adv/unicast.c
index cbf022c..9b2a222 100644
--- a/net/batman-adv/unicast.c
+++ b/net/batman-adv/unicast.c
@@ -226,6 +226,7 @@ int frag_send_skb(struct sk_buff *skb, struct bat_priv *bat_priv,
int ucf_hdr_len = sizeof(struct unicast_frag_packet);
int data_len = skb->len - uc_hdr_len;
int large_tail = 0;
+ uint16_t seqno;
if (!bat_priv->primary_if)
goto dropped;
@@ -261,10 +262,9 @@ int frag_send_skb(struct sk_buff *skb, struct bat_priv *bat_priv,
frag1->flags = UNI_FRAG_HEAD | large_tail;
frag2->flags = large_tail;
- frag1->seqno = htons((uint16_t)atomic_inc_return(
- &batman_if->frag_seqno));
- frag2->seqno = htons((uint16_t)atomic_inc_return(
- &batman_if->frag_seqno));
+ seqno = atomic_add_return(2, &batman_if->frag_seqno);
+ frag1->seqno = htons(seqno - 1);
+ frag2->seqno = htons(seqno);
send_skb_packet(skb, batman_if, dstaddr);
send_skb_packet(frag_skb, batman_if, dstaddr);
--
1.7.2.3
^ permalink raw reply related
* pull request: batman-adv 2011-02-12
From: Sven Eckelmann @ 2011-02-11 23:21 UTC (permalink / raw)
To: davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: netdev-u79uwXL29TY76Z2rM5mHXA,
b.a.t.m.a.n-ZwoEplunGu2X36UT3dwllkB+6BGkLq7r
Hi,
I would like propose following changes for net-next-2.6.git. Two of them are
minor code style changes and the other two change minor issues in the
routing/fragmentation code.
thanks,
Sven
The following changes since commit 091b948306d2628320e77977eb7ae4a757b12180:
batman-adv: Merge README of v2011.0.0 release (2011-01-31 14:57:13 +0100)
are available in the git repository at:
git://git.open-mesh.org/ecsv/linux-merge.git batman-adv/next
Linus Lüssing (2):
batman-adv: Remove duplicate types.h inclusions
batman-adv: Disallow originator addressing within mesh layer
Marek Lindner (1):
batman-adv: Split combined variable declarations
Sven Eckelmann (1):
batman-adv: Use successive sequence numbers for fragments
net/batman-adv/icmp_socket.c | 1 -
net/batman-adv/icmp_socket.h | 2 --
net/batman-adv/main.c | 1 -
net/batman-adv/routing.c | 1 -
net/batman-adv/routing.h | 2 --
net/batman-adv/send.c | 1 -
net/batman-adv/send.h | 2 --
net/batman-adv/soft-interface.c | 1 -
net/batman-adv/translation-table.c | 1 -
net/batman-adv/translation-table.h | 2 --
net/batman-adv/unicast.c | 19 +++++++------------
11 files changed, 7 insertions(+), 26 deletions(-)
^ permalink raw reply
* Re: bridge: Fix mglist corruption that leads to memory corruption
From: Herbert Xu @ 2011-02-11 22:55 UTC (permalink / raw)
To: David S. Miller, netdev; +Cc: ihands, jbacik
In-Reply-To: <20110211223655.GA5585@gondor.apana.org.au>
On Sat, Feb 12, 2011 at 09:36:55AM +1100, Herbert Xu wrote:
>
> Normally this would be quite obvious as it would cause an infinite
> loop when walking the list. However, as this list is never actually
> walked (which means that we don't really need it, I'll get rid of
> it in a subsequent patch), this instead is hidden until we perform
> a delete operation on the affected nodes.
Here is the patch that replaces the mglist hlist with just a bool.
bridge: Replace mp->mglist hlist with a bool
As it turns out we never need to walk through the list of multicast
groups subscribed by the bridge interface itself (the only time we'd
want to do that is when we shut down the bridge, in which case we
simply walk through all multicast groups), we don't really need to
keep an hlist for mp->mglist.
This means that we can replace it with just a single bit to indicate
whether the bridge interface is subscribed to a group.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c
index 6f6d8e1..88e4aa9 100644
--- a/net/bridge/br_input.c
+++ b/net/bridge/br_input.c
@@ -80,7 +80,7 @@ int br_handle_frame_finish(struct sk_buff *skb)
if (is_multicast_ether_addr(dest)) {
mdst = br_mdb_get(br, skb);
if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) {
- if ((mdst && !hlist_unhashed(&mdst->mglist)) ||
+ if ((mdst && mdst->mglist) ||
br_multicast_is_router(br))
skb2 = skb;
br_multicast_forward(mdst, skb, skb2);
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index c558274..30e3a08 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -232,8 +232,7 @@ static void br_multicast_group_expired(unsigned long data)
if (!netif_running(br->dev) || timer_pending(&mp->timer))
goto out;
- if (!hlist_unhashed(&mp->mglist))
- hlist_del_init(&mp->mglist);
+ mp->mglist = 0;
if (mp->ports)
goto out;
@@ -276,7 +275,7 @@ static void br_multicast_del_pg(struct net_bridge *br,
del_timer(&p->query_timer);
call_rcu_bh(&p->rcu, br_multicast_free_pg);
- if (!mp->ports && hlist_unhashed(&mp->mglist) &&
+ if (!mp->ports && !mp->mglist &&
netif_running(br->dev))
mod_timer(&mp->timer, jiffies);
@@ -528,7 +527,7 @@ static void br_multicast_group_query_expired(unsigned long data)
struct net_bridge *br = mp->br;
spin_lock(&br->multicast_lock);
- if (!netif_running(br->dev) || hlist_unhashed(&mp->mglist) ||
+ if (!netif_running(br->dev) || !mp->mglist ||
mp->queries_sent >= br->multicast_last_member_count)
goto out;
@@ -719,8 +718,7 @@ static int br_multicast_add_group(struct net_bridge *br,
goto err;
if (!port) {
- if (hlist_unhashed(&mp->mglist))
- hlist_add_head(&mp->mglist, &br->mglist);
+ mp->mglist = 1;
mod_timer(&mp->timer, now + br->multicast_membership_interval);
goto out;
}
@@ -1166,7 +1164,7 @@ static int br_ip4_multicast_query(struct net_bridge *br,
max_delay *= br->multicast_last_member_count;
- if (!hlist_unhashed(&mp->mglist) &&
+ if (mp->mglist &&
(timer_pending(&mp->timer) ?
time_after(mp->timer.expires, now + max_delay) :
try_to_del_timer_sync(&mp->timer) >= 0))
@@ -1237,7 +1235,7 @@ static int br_ip6_multicast_query(struct net_bridge *br,
goto out;
max_delay *= br->multicast_last_member_count;
- if (!hlist_unhashed(&mp->mglist) &&
+ if (mp->mglist &&
(timer_pending(&mp->timer) ?
time_after(mp->timer.expires, now + max_delay) :
try_to_del_timer_sync(&mp->timer) >= 0))
@@ -1284,7 +1282,7 @@ static void br_multicast_leave_group(struct net_bridge *br,
br->multicast_last_member_interval;
if (!port) {
- if (!hlist_unhashed(&mp->mglist) &&
+ if (mp->mglist &&
(timer_pending(&mp->timer) ?
time_after(mp->timer.expires, time) :
try_to_del_timer_sync(&mp->timer) >= 0)) {
diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h
index 84aac77..4e1b620 100644
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -84,13 +84,13 @@ struct net_bridge_port_group {
struct net_bridge_mdb_entry
{
struct hlist_node hlist[2];
- struct hlist_node mglist;
struct net_bridge *br;
struct net_bridge_port_group __rcu *ports;
struct rcu_head rcu;
struct timer_list timer;
struct timer_list query_timer;
struct br_ip addr;
+ bool mglist;
u32 queries_sent;
};
@@ -238,7 +238,6 @@ struct net_bridge
spinlock_t multicast_lock;
struct net_bridge_mdb_htable __rcu *mdb;
struct hlist_head router_list;
- struct hlist_head mglist;
struct timer_list multicast_router_timer;
struct timer_list multicast_querier_timer;
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply related
* RE: [PATCH net-2.6] ixgbe: fix panic due to uninitialied pointer
From: Skidmore, Donald C @ 2011-02-11 22:47 UTC (permalink / raw)
To: Andy Gospodarek, netdev@vger.kernel.org
Cc: Duyck, Alexander H, Kirsher, Jeffrey T, Rose, Gregory V
In-Reply-To: <1297460747-31896-1-git-send-email-andy@greyhouse.net>
>-----Original Message-----
>From: Andy Gospodarek [mailto:andy@greyhouse.net]
>Sent: Friday, February 11, 2011 1:46 PM
>To: netdev@vger.kernel.org
>Cc: Skidmore, Donald C; Duyck, Alexander H; Kirsher, Jeffrey T; Rose,
>Gregory V
>Subject: [PATCH net-2.6] ixgbe: fix panic due to uninitialied pointer
>
>Systems containing an 82599EB and running a backported driver from
>upstream were panicing on boot. It turns out hw->mac.ops.setup_sfp is
>only set for 82599, so one should check to be sure that pointer is set
>before continuing in ixgbe_sfp_config_module_task. I verified by
>inspection that the upstream driver has the same issue and also added a
>check before the call in ixgbe_sfp_link_config.
>
>Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
>---
> drivers/net/ixgbe/ixgbe_main.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/ixgbe/ixgbe_main.c
>b/drivers/net/ixgbe/ixgbe_main.c
>index fbae703..30f9ccf 100644
>--- a/drivers/net/ixgbe/ixgbe_main.c
>+++ b/drivers/net/ixgbe/ixgbe_main.c
>@@ -3728,7 +3728,8 @@ static void ixgbe_sfp_link_config(struct
>ixgbe_adapter *adapter)
> * We need to try and force an autonegotiation
> * session, then bring up link.
> */
>- hw->mac.ops.setup_sfp(hw);
>+ if (hw->mac.ops.setup_sfp)
>+ hw->mac.ops.setup_sfp(hw);
> if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
> schedule_work(&adapter->multispeed_fiber_task);
> } else {
>@@ -5968,7 +5969,8 @@ static void ixgbe_sfp_config_module_task(struct
>work_struct *work)
> unregister_netdev(adapter->netdev);
> return;
> }
>- hw->mac.ops.setup_sfp(hw);
>+ if (hw->mac.ops.setup_sfp)
>+ hw->mac.ops.setup_sfp(hw);
>
> if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
> /* This will also work for DA Twinax connections */
>--
>1.7.4
Thanks for the patch. Jeff will pull it into our tree and we will give it some testing but it looks good to me.
-Don Skidmore <donald.c.skidmore@intel.com>
^ permalink raw reply
* Re: bridge: Fix mglist corruption that leads to memory corruption
From: Herbert Xu @ 2011-02-11 22:42 UTC (permalink / raw)
To: David S. Miller, netdev; +Cc: ihands, jbacik
In-Reply-To: <20110211223655.GA5585@gondor.apana.org.au>
Hi:
This patch fixes a typo that is not too serious.
bridge: Fix timer typo that may render snooping less effective
In a couple of spots where we are supposed to modify the port
group timer (p->timer) we instead modify the bridge interface
group timer (mp->timer).
The effect of this is mostly harmless. However, it can cause
port subscriptions to be longer than they should be, thus making
snooping less effective.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index f701a21..802d3f8 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -1177,7 +1178,7 @@ static int br_ip4_multicast_query(struct net_bridge *br,
if (timer_pending(&p->timer) ?
time_after(p->timer.expires, now + max_delay) :
try_to_del_timer_sync(&p->timer) >= 0)
- mod_timer(&mp->timer, now + max_delay);
+ mod_timer(&p->timer, now + max_delay);
}
out:
@@ -1248,7 +1249,7 @@ static int br_ip6_multicast_query(struct net_bridge *br,
if (timer_pending(&p->timer) ?
time_after(p->timer.expires, now + max_delay) :
try_to_del_timer_sync(&p->timer) >= 0)
- mod_timer(&mp->timer, now + max_delay);
+ mod_timer(&p->timer, now + max_delay);
}
out:
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply related
* Re: [PATCH net-2.6] ixgbe: fix panic due to uninitialied pointer
From: Jeff Kirsher @ 2011-02-11 22:41 UTC (permalink / raw)
To: Andy Gospodarek
Cc: netdev@vger.kernel.org, Skidmore, Donald C, Duyck, Alexander H,
Rose, Gregory V
In-Reply-To: <1297460747-31896-1-git-send-email-andy@greyhouse.net>
[-- Attachment #1: Type: text/plain, Size: 734 bytes --]
On Fri, 2011-02-11 at 13:45 -0800, Andy Gospodarek wrote:
> Systems containing an 82599EB and running a backported driver from
> upstream were panicing on boot. It turns out hw->mac.ops.setup_sfp is
> only set for 82599, so one should check to be sure that pointer is set
> before continuing in ixgbe_sfp_config_module_task. I verified by
> inspection that the upstream driver has the same issue and also added
> a
> check before the call in ixgbe_sfp_link_config.
>
> Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
> ---
> drivers/net/ixgbe/ixgbe_main.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
Thanks Andy! Have added the patch (with fixed subject) to my ixgbe
queue of patches.
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 490 bytes --]
^ permalink raw reply
* bridge: Fix mglist corruption that leads to memory corruption
From: Herbert Xu @ 2011-02-11 22:36 UTC (permalink / raw)
To: David S. Miller, netdev; +Cc: ihands, jbacik
Hi:
This patch fixes a nasty memory corruption issue.
bridge: Fix mglist corruption that leads to memory corruption
The list mp->mglist is used to indicate whether a multicast group
is active on the bridge interface itself as opposed to one of the
constituent interfaces in the bridge.
Unfortunately the operation that adds the mp->mglist node to the
list neglected to check whether it has already been added. This
leads to list corruption in the form of nodes pointing to itself.
Normally this would be quite obvious as it would cause an infinite
loop when walking the list. However, as this list is never actually
walked (which means that we don't really need it, I'll get rid of
it in a subsequent patch), this instead is hidden until we perform
a delete operation on the affected nodes.
As the same node may now be pointed to by more than one node, the
delete operations can then cause modification of freed memory.
This was observed in practice to cause corruption in 512-byte slabs,
most commonly leading to crashes in jbd2.
Thanks to Josef Bacik for pointing me in the right direction.
Reported-by: Ian Page Hands <ihands@redhat.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c
index f701a21..802d3f8 100644
--- a/net/bridge/br_multicast.c
+++ b/net/bridge/br_multicast.c
@@ -719,7 +719,8 @@ static int br_multicast_add_group(struct net_bridge *br,
goto err;
if (!port) {
- hlist_add_head(&mp->mglist, &br->mglist);
+ if (hlist_unhashed(&mp->mglist))
+ hlist_add_head(&mp->mglist, &br->mglist);
mod_timer(&mp->timer, now + br->multicast_membership_interval);
goto out;
}
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply related
* Re: [PATCH 2/2 v2] network: Allow af_packet to transmit +4 bytes for VLAN packets.
From: Eric Dumazet @ 2011-02-11 22:18 UTC (permalink / raw)
To: greearb; +Cc: netdev
In-Reply-To: <1297452918-16993-1-git-send-email-greearb@candelatech.com>
Le vendredi 11 février 2011 à 11:35 -0800, greearb@candelatech.com a
écrit :
> From: Ben Greear <greearb@candelatech.com>
>
> This allows user-space to send a '1500' MTU VLAN packet on a
> 1500 MTU ethernet frame. The extra 4 bytes of a VLAN header is
> not usually charged against the MTU when other parts of the
> network stack is transmitting vlans...
>
> Signed-off-by: Ben Greear <greearb@candelatech.com>
> ---
Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com>
^ permalink raw reply
* [PATCH] phy: Remove unneeded depends on PHYLIB
From: H Hartley Sweeten @ 2011-02-11 22:14 UTC (permalink / raw)
To: Linux Kernel; +Cc: netdev, davem
Remove unneeded depends on PHYLIB. The config selection is already in
an if PHYLIB / endif block.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: "David S. Miller" <davem@davemloft.net>
---
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 35fda5a..392a6c4 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -77,7 +77,6 @@ config NATIONAL_PHY
Currently supports the DP83865 PHY.
config STE10XP
- depends on PHYLIB
tristate "Driver for STMicroelectronics STe10Xp PHYs"
---help---
This is the driver for the STe100p and STe101p PHYs.
^ permalink raw reply related
* Re: any way to reset all marked connections when using CONNMARK?
From: Steven Kath @ 2011-02-11 22:11 UTC (permalink / raw)
To: Chris Friesen; +Cc: netdev, netfilter-devel, netfilter, coreteam
In-Reply-To: <256863566.648.1297461959805.JavaMail.root@tahiti.vyatta.com>
----- "Chris Friesen" <chris.friesen@genband.com> wrote: -----
> We've got a scenario where we want to use CONNMARK to mark connections
> that have passed a large number of rules in order to allow packets
> from those connections to skip rules in the future (for performance
> reasons).
>
> However, when we add new rules we want to ensure that all the
> connections need to pass the new rules as well.
>
> It has been proposed to add a custom patch to clear the mark for all
> marked connections--is there a better way of doing this?
>
> I thought maybe we could use the CONNMARK as a generation count and
> bumping it up each time a rule is added. This would require updating
> the bypass rule each time we modify the other rules though. If there
> are better options I'd like to hear them.
Using conntrack-tools might help:
conntrack --update --mark 0
^ permalink raw reply
* Re: [PATCH net-2.6] ixgbe: fix panic due to uninitialized pointer
From: Andy Gospodarek @ 2011-02-11 21:56 UTC (permalink / raw)
To: netdev; +Cc: Don Skidmore, Alexander Duyck, Jeff Kirsher, Greg Rose
In-Reply-To: <1297460747-31896-1-git-send-email-andy@greyhouse.net>
On Fri, Feb 11, 2011 at 04:45:47PM -0500, Andy Gospodarek wrote:
> Systems containing an 82599EB and running a backported driver from
> upstream were panicing on boot. It turns out hw->mac.ops.setup_sfp is
> only set for 82599, so one should check to be sure that pointer is set
> before continuing in ixgbe_sfp_config_module_task. I verified by
> inspection that the upstream driver has the same issue and also added a
> check before the call in ixgbe_sfp_link_config.
>
> Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
Corrected spelling error in Subject.
^ permalink raw reply
* [PATCH net-2.6] ixgbe: fix panic due to uninitialied pointer
From: Andy Gospodarek @ 2011-02-11 21:45 UTC (permalink / raw)
To: netdev; +Cc: Don Skidmore, Alexander Duyck, Jeff Kirsher, Greg Rose
Systems containing an 82599EB and running a backported driver from
upstream were panicing on boot. It turns out hw->mac.ops.setup_sfp is
only set for 82599, so one should check to be sure that pointer is set
before continuing in ixgbe_sfp_config_module_task. I verified by
inspection that the upstream driver has the same issue and also added a
check before the call in ixgbe_sfp_link_config.
Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
---
drivers/net/ixgbe/ixgbe_main.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index fbae703..30f9ccf 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3728,7 +3728,8 @@ static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
* We need to try and force an autonegotiation
* session, then bring up link.
*/
- hw->mac.ops.setup_sfp(hw);
+ if (hw->mac.ops.setup_sfp)
+ hw->mac.ops.setup_sfp(hw);
if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
schedule_work(&adapter->multispeed_fiber_task);
} else {
@@ -5968,7 +5969,8 @@ static void ixgbe_sfp_config_module_task(struct work_struct *work)
unregister_netdev(adapter->netdev);
return;
}
- hw->mac.ops.setup_sfp(hw);
+ if (hw->mac.ops.setup_sfp)
+ hw->mac.ops.setup_sfp(hw);
if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
/* This will also work for DA Twinax connections */
--
1.7.4
^ permalink raw reply related
* Re: [PATCH v2 09/13] can: pruss CAN driver.
From: Marc Kleine-Budde @ 2011-02-11 21:33 UTC (permalink / raw)
To: Subhasish Ghosh
Cc: sachi-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/,
davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
CAN NETWORK DRIVERS, nsekhar-l0cyMroinI0, open list,
CAN NETWORK DRIVERS,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
m-watkins-l0cyMroinI0,
Wolfgang Grandegger (maintainer:CAN NETWORK DRIVERS)
In-Reply-To: <1297435892-28278-10-git-send-email-subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 78981 bytes --]
On 02/11/2011 03:51 PM, Subhasish Ghosh wrote:
> This patch adds support for the CAN device emulated on PRUSS.
Is this a software CAN device running on the omap dsp? Nice :)
My first impression is that this driver needs a lot of work, but we'll
help you.
Being new to the OMAP world here are soo many names for the same thing,
i.e. the CAN core and driver:
- da8cc
- pruss
- omap
- pru
These or combination of these are used all over the code. I'm preferring
one common prefix. I like the PRU_ prefix for the defines and the pru_
for functions.
Please don't encode the variable type into their names (a.k.a. polish
notation), e.g. it's "u8 data" not "u8 u8data", No typedefs, enums just
like defines in uppercase.
Get rid of the of the extra layer in pruss_can_api.c.
More comments inline:
> Signed-off-by: Subhasish Ghosh <subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> drivers/net/can/Kconfig | 1 +
> drivers/net/can/Makefile | 1 +
> drivers/net/can/da8xx_pruss/Kconfig | 73 ++
> drivers/net/can/da8xx_pruss/Makefile | 7 +
> drivers/net/can/da8xx_pruss/pruss_can.c | 758 +++++++++++++++++
> drivers/net/can/da8xx_pruss/pruss_can_api.c | 1227 +++++++++++++++++++++++++++
> drivers/net/can/da8xx_pruss/pruss_can_api.h | 290 +++++++
> 7 files changed, 2357 insertions(+), 0 deletions(-)
> create mode 100644 drivers/net/can/da8xx_pruss/Kconfig
> create mode 100644 drivers/net/can/da8xx_pruss/Makefile
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can.c
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can_api.c
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can_api.h
>
> diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
> index d5a9db6..ae8f0f9 100644
> --- a/drivers/net/can/Kconfig
> +++ b/drivers/net/can/Kconfig
> @@ -112,6 +112,7 @@ config PCH_CAN
> This driver can access CAN bus.
>
> source "drivers/net/can/mscan/Kconfig"
> +source "drivers/net/can/da8xx_pruss/Kconfig"
>
> source "drivers/net/can/sja1000/Kconfig"
>
> diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
> index 07ca159..849cdbf 100644
> --- a/drivers/net/can/Makefile
> +++ b/drivers/net/can/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_CAN_SJA1000) += sja1000/
> obj-$(CONFIG_CAN_MSCAN) += mscan/
> obj-$(CONFIG_CAN_AT91) += at91_can.o
> obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
> +obj-$(CONFIG_CAN_TI_DA8XX_PRU) += da8xx_pruss/
> obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
> obj-$(CONFIG_CAN_BFIN) += bfin_can.o
> obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o
> diff --git a/drivers/net/can/da8xx_pruss/Kconfig b/drivers/net/can/da8xx_pruss/Kconfig
> new file mode 100644
> index 0000000..8b68f68
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/Kconfig
> @@ -0,0 +1,73 @@
> +#
> +# CAN Lite Kernel Configuration
^^^^^^^^^^^^^^^
what's can lite?
> +#
> +config CAN_TI_DA8XX_PRU
> + depends on CAN_DEV && ARCH_DAVINCI && ARCH_DAVINCI_DA850
> + tristate "PRU based CAN emulation for DA8XX"
> + ---help---
> + Enable this to emulate a CAN controller on the PRU of DA8XX.
> + If not sure, mark N
> +
> +config DA8XX_PRU_CANID_MBX0
> + hex "CANID for mailbox 0"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 0
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX1
> + hex "CANID for mailbox 1"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 1
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX2
> + hex "CANID for mailbox 2"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 2
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX3
> + hex "CANID for mailbox 3"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 3
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX4
> + hex "CANID for mailbox 4"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 4
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX5
> + hex "CANID for mailbox 5"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 5
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX6
> + hex "CANID for mailbox 6"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 6
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX7
> + hex "CANID for mailbox 7"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 7
> + Default value is set to 0x123, change this as required.
This doesn't fit to the Socketcan abstraction of a CAN card. Please
remove. After this "da8xx_pruss/Kconfig" just contains the
CAN_TI_DA8XX_PRU symbol, which can be added directly to
drivers/net/can/Kconfig. (With a perhaps a simpler kconfig symbol name.)
> diff --git a/drivers/net/can/da8xx_pruss/Makefile b/drivers/net/can/da8xx_pruss/Makefile
> new file mode 100644
> index 0000000..48f3055
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# Makefile for CAN Lite emulation
> +#
> +can_emu-objs := pruss_can.o \
> + pruss_can_api.o
Do we need two c file? I haven't look at them, yet.
> +
> +obj-$(CONFIG_CAN_TI_DA8XX_PRU) += can_emu.o
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can.c b/drivers/net/can/da8xx_pruss/pruss_can.c
> new file mode 100644
> index 0000000..1b3afde
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can.c
> @@ -0,0 +1,758 @@
> +/*
> + * TI DA8XX PRU CAN Emulation device driver
> + * Author: subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org
> + *
> + * This driver supports TI's PRU CAN Emulation and the
> + * specs for the same is available at <http://www.ti.com>
> + *
> + * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
You'll probably do some work on the driver, so add a 2011, here :)
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation version 2.
> + *
> + * This program is distributed as is WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/bitops.h>
> +#include <linux/interrupt.h>
> +#include <linux/errno.h>
> +#include <linux/netdevice.h>
> +#include <linux/skbuff.h>
> +#include <linux/platform_device.h>
> +#include <linux/firmware.h>
> +#include <linux/clk.h>
> +#include <linux/types.h>
> +
> +#include <linux/can.h>
> +#include <linux/can/dev.h>
> +#include <linux/can/error.h>
> +#include <mach/da8xx.h>
> +#include "pruss_can_api.h"
Do we need a separate header file?
> +
> +#define DRV_NAME "da8xx_pruss_can"
> +#define DRV_DESC "TI PRU CAN Controller Driver v0.1"
> +#define PRU_CAN_START 1
> +#define PRU_CAN_STOP 0
> +#define MB_MIN 0
> +#define MB_MAX 7
please add the common PRU_ prefis to the MB_*, too.
> +
> +#define PRU_CANMID_IDE BIT(29) /* Extended frame format */
> +
> +#define PRU_CAN_ISR_BIT_CCI BIT(15)
> +#define PRU_CAN_ISR_BIT_ESI BIT(14)
> +#define PRU_CAN_ISR_BIT_SRDI BIT(13)
> +#define PRU_CAN_ISR_BIT_RRI BIT(8)
> +
> +#define PRU_CAN_MBXSR_BIT_STATE BIT(7)
> +#define PRU_CAN_MBXSR_BIT_TC BIT(6)
> +#define PRU_CAN_MBXSR_BIT_ERR BIT(5)
> +#define PRU_CAN_MBXSR_BIT_OF BIT(0)
> +
> +#define PRU_CAN_GSR_BIT_TXM BIT(7)
> +#define PRU_CAN_GSR_BIT_RXM BIT(6)
> +#define PRU_CAN_GSR_BIT_CM BIT(5)
> +#define PRU_CAN_GSR_BIT_EPM BIT(4)
> +#define PRU_CAN_GSR_BIT_BFM BIT(3)
> +#define RTR_MBX_NO 8
We don't have special mailboxes for RTR, pleae remove.
add the PRU_ prefix here, too.
> +#define MAX_INIT_RETRIES 20
> +#define L138_PRU_ARM_FREQ 312000
> +#define DFLT_PRU_FREQ 156000000
Any change that you get these values from the a clock device?
e.g.:
http://lxr.linux.no/linux+v2.6.37/drivers/net/can/flexcan.c#L909
http://lxr.linux.no/linux+v2.6.37/drivers/net/can/flexcan.c#L946
> +#define DFLT_PRU_BITRATE 125000
Please remove, we don't have a default bitrate.
> +
> +#define CONFIG_DA8XX_PRU_CANID_MBX0 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX1 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX2 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX3 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX4 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX5 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX6 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX7 0x123
as alreadt said, we don't have default canids, please remove.
> +
> +#ifdef __CAN_DEBUG
> +#define __can_debug(fmt, args...) printk(KERN_DEBUG "can_debug: " fmt, ## args)
> +#else
> +#define __can_debug(fmt, args...)
> +#endif
> +#define __can_err(fmt, args...) printk(KERN_ERR "can_err: " fmt, ## args)
please use pr_<level> and and friends, use pr_fmt to set a common
prefix. Or even better use netdev_<level>.
> +
> +/*
> + * omapl_pru can private data
> + */
> +struct omapl_pru_can_priv {
> + struct can_priv can;
> + struct workqueue_struct *pru_can_wQ;
> + struct work_struct rx_work;
> + struct net_device *ndev;
> + struct device *dev; /* pdev->dev */
nitpick: pointless comment :)
> + struct clk *clk_timer;
> + u32 timer_freq;
> + can_emu_app_hndl can_tx_hndl;
> + can_emu_app_hndl can_rx_hndl;
please no new typedefs.
> + const struct firmware *fw_rx;
> + const struct firmware *fw_tx;
> + spinlock_t mbox_lock;
> + u32 trx_irq;
> + u32 tx_head;
> + u32 tx_tail;
> + u32 tx_next;
> + u32 rx_next;
If these don't reflect register values, just use "unsigned int"s here.
> +};
> +
> +static int omapl_pru_can_get_state(const struct net_device *ndev,
> + enum can_state *state)
just for consistency most other can drivers use "struct net_device *dev".
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + *state = priv->can.state;
> + return 0;
> +}
> +
> +static int omapl_pru_can_set_bittiming(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct can_bittiming *bt = &priv->can.bittiming;
> + long bit_error = 0;
> +
> + if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) {
> + dev_warn(priv->dev, "WARN: Triple"
> + "sampling not set due to h/w limitations");
> + }
No need to check this, just set the modes you support in
"priv->can.ctrlmode_supported".
http://lxr.linux.no/linux+v2.6.37/drivers/net/can/at91_can.c#L1091
> + if (pru_can_calc_timing(priv->dev, priv->can.clock.freq,
> + bt->bitrate) != 0)
The above function does _set_ the bit timing into the hardware, calling
it "can_calc_timing" is a bit misleading.
Don't calculate the bit timing yoursef. Please define your
bittiming_const and set it, see:
http://lxr.linux.no/linux+v2.6.37/drivers/net/can/at91_can.c#L173
http://lxr.linux.no/linux+v2.6.37/drivers/net/can/at91_can.c#L1088
> + return -EINVAL;
> + bit_error =
> + (((priv->timer_freq / (priv->timer_freq / bt->bitrate)) -
> + bt->bitrate) * 1000) / bt->bitrate;
> + if (bit_error) {
> + bit_error =
> + (((priv->timer_freq / (priv->timer_freq / bt->bitrate)) -
> + bt->bitrate) * 1000000) / bt->bitrate;
> + printk(KERN_INFO "\nBitrate error %ld.%ld%%\n",
> + bit_error / 10000, bit_error % 1000);
> + } else
> + printk(KERN_INFO "\nBitrate error 0.0%%\n");
> +
> + return 0;
> +}
> +
> +static void omapl_pru_can_stop(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u16 int_mask = 0;
> +
> + pru_can_mask_ints(priv->dev, int_mask); /* mask all ints */
> + pru_can_start_abort_tx(priv->dev, PRU_CAN_STOP);
> + priv->can.state = CAN_STATE_STOPPED;
> +}
> +
> +/*
> + * This is to just set the can state to ERROR_ACTIVE
> + * ip link set canX up type can bitrate 125000
> + */
> +static void omapl_pru_can_start(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u16 int_mask = 0xFFFF;
> +
> + if (priv->can.state != CAN_STATE_STOPPED)
> + omapl_pru_can_stop(ndev);
> +
> + pru_can_mask_ints(priv->dev, int_mask); /* unmask all ints */
> +
> + pru_can_get_global_status(priv->dev, &priv->can_tx_hndl);
> + pru_can_get_global_status(priv->dev, &priv->can_rx_hndl);
> +
> + if (PRU_CAN_GSR_BIT_EPM & priv->can_tx_hndl.u32globalstatus)
> + priv->can.state = CAN_STATE_ERROR_PASSIVE;
> + else if (PRU_CAN_GSR_BIT_BFM & priv->can_tx_hndl.u32globalstatus)
> + priv->can.state = CAN_STATE_BUS_OFF;
> + else
> + priv->can.state = CAN_STATE_ERROR_ACTIVE;
> +}
> +
> +static int omapl_pru_can_set_mode(struct net_device *ndev, enum can_mode mode)
> +{
> + int ret = 0;
> +
> + switch (mode) {
> + case CAN_MODE_START:
> + omapl_pru_can_start(ndev);
> + if (netif_queue_stopped(ndev))
> + netif_wake_queue(ndev);
> + break;
> + case CAN_MODE_STOP:
> + omapl_pru_can_stop(ndev);
> + if (!netif_queue_stopped(ndev))
> + netif_stop_queue(ndev);
> + break;
> + default:
> + ret = -EOPNOTSUPP;
> + break;
> + }
> + return ret;
> +}
> +
> +static netdev_tx_t omapl_pru_can_start_xmit(struct sk_buff *skb,
> + struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct can_frame *cf = (struct can_frame *)skb->data;
> + int count;
> + u8 *data = cf->data;
> + u8 dlc = cf->can_dlc;
> + u8 *ptr8data = NULL;
> +
> + netif_stop_queue(ndev);
> + if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) =
> + (cf->can_id & CAN_EFF_MASK) | PRU_CANMID_IDE;
> + else /* Standard frame format */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) =
> + (cf->can_id & CAN_SFF_MASK) << 18;
> +
> + if (cf->can_id & CAN_RTR_FLAG) /* Remote transmission request */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) |= CAN_RTR_FLAG;
> +
> + ptr8data = &priv->can_tx_hndl.strcanmailbox.u8data7 + (dlc - 1);
> + for (count = 0; count < (u8) dlc; count++) {
> + *ptr8data-- = *data++;
> + }
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox.u16datalength) = (u32) dlc;
> +/*
> + * search for the next available mbx
> + * if the next mbx is busy, then try the next + 1
> + * do this until the head is reached.
> + * if still unable to tx, stop accepting any packets
> + * if able to tx and the head is reached, then reset next to tail, i.e mbx0
> + * if head is not reached, then just point to the next mbx
> + */
> + for (; priv->tx_next <= priv->tx_head; priv->tx_next++) {
> + priv->can_tx_hndl.ecanmailboxnumber =
> + (can_mailbox_number) priv->tx_next;
> + if (-1 == pru_can_write_data_to_mailbox(priv->dev,
> + &priv->can_tx_hndl)) {
> + if (priv->tx_next == priv->tx_head) {
> + priv->tx_next = priv->tx_tail;
> + if (!netif_queue_stopped(ndev))
> + netif_stop_queue(ndev); /* IF stalled */
> + dev_err(priv->dev,
> + "%s: no tx mbx available", __func__);
> + return NETDEV_TX_BUSY;
> + } else
> + continue;
> + } else {
> + /* set transmit request */
> + pru_can_tx(priv->dev, priv->tx_next, CAN_TX_PRU_1);
> + pru_can_tx_mode_set(priv->dev, false, ecanreceive);
> + pru_can_tx_mode_set(priv->dev, true, ecantransmit);
> + pru_can_start_abort_tx(priv->dev, PRU_CAN_START);
> + priv->tx_next++;
> + can_put_echo_skb(skb, ndev, 0);
> + break;
> + }
> + }
> + if (priv->tx_next > priv->tx_head) {
> + priv->tx_next = priv->tx_tail;
> + }
> + return NETDEV_TX_OK;
> +}
> +
> +static int omapl_pru_can_rx(struct net_device *ndev, u32 mbxno)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct net_device_stats *stats = &ndev->stats;
> + struct can_frame *cf;
> + struct sk_buff *skb;
> + u32 pru_can_mbx_data;
> + u8 *data = NULL;
> + u8 *ptr8data = NULL;
> + int count = 0;
> +
> + skb = alloc_can_skb(ndev, &cf);
> + if (!skb) {
> + if (printk_ratelimit())
> + dev_err(priv->dev,
> + "alloc_can_skb() failed\n");
> + return -ENOMEM;
> + }
> + data = cf->data;
> + /* get payload */
> + priv->can_rx_hndl.ecanmailboxnumber = (can_mailbox_number) mbxno;
> + if (pru_can_get_data_from_mailbox(priv->dev, &priv->can_rx_hndl)) {
> + __can_err("failed to get data from mailbox\n");
> + return -EAGAIN;
> + }
> + /* give ownweship to pru */
> + pru_can_tx(priv->dev, mbxno, CAN_RX_PRU_0);
> +
> + /* get data length code */
> + cf->can_dlc =
> + get_can_dlc(*
> + ((u32 *) &priv->can_rx_hndl.strcanmailbox.
> + u16datalength) & 0xF);
> + if (cf->can_dlc <= 4) {
> + ptr8data =
> + &priv->can_rx_hndl.strcanmailbox.u8data3 + (4 -
> + cf->can_dlc);
> + for (count = 0; count < cf->can_dlc; count++) {
> + *data++ = *ptr8data++;
> + }
> + } else {
> + ptr8data = &priv->can_rx_hndl.strcanmailbox.u8data3;
> + for (count = 0; count < 4; count++) {
> + *data++ = *ptr8data++;
> + }
> + ptr8data =
> + &priv->can_rx_hndl.strcanmailbox.u8data4 - (cf->can_dlc -
> + 5);
> + for (count = 0; count < cf->can_dlc - 4; count++) {
> + *data++ = *ptr8data++;
> + }
> + }
> +
> + pru_can_mbx_data = *((u32 *) &priv->can_rx_hndl.strcanmailbox);
> + /* get id extended or std */
> + if (pru_can_mbx_data & PRU_CANMID_IDE)
> + cf->can_id = (pru_can_mbx_data & CAN_EFF_MASK) | CAN_EFF_FLAG;
> + else
> + cf->can_id = (pru_can_mbx_data >> 18) & CAN_SFF_MASK;
> +
> + if (pru_can_mbx_data & CAN_RTR_FLAG)
> + cf->can_id |= CAN_RTR_FLAG;
> +
> + netif_rx_ni(skb);
> + stats->rx_packets++;
> + stats->rx_bytes += cf->can_dlc;
> + return 0;
> +}
> +
> +static int omapl_pru_can_err(struct net_device *ndev, int int_status,
> + int err_status)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct net_device_stats *stats = &ndev->stats;
> + struct can_frame *cf;
> + struct sk_buff *skb;
> + int tx_err_cnt, rx_err_cnt;
> +
> + /* propogate the error condition to the can stack */
> + skb = alloc_can_err_skb(ndev, &cf);
> + if (!skb) {
> + if (printk_ratelimit())
> + dev_err(priv->dev,
> + "alloc_can_err_skb() failed\n");
> + return -ENOMEM;
> + }
> +
> + if (err_status & PRU_CAN_GSR_BIT_EPM) { /* error passive int */
> + priv->can.state = CAN_STATE_ERROR_PASSIVE;
> + ++priv->can.can_stats.error_passive;
> + cf->can_id |= CAN_ERR_CRTL;
> + tx_err_cnt = pru_can_get_error_cnt(priv->dev, CAN_TX_PRU_1);
> + rx_err_cnt = pru_can_get_error_cnt(priv->dev, CAN_RX_PRU_0);
> + if (tx_err_cnt > 127)
> + cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
> + if (rx_err_cnt > 127)
> + cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
> +
> + dev_dbg(priv->ndev->dev.parent, "Error passive interrupt\n");
> + }
> +
> + if (err_status & PRU_CAN_GSR_BIT_BFM) {
> + priv->can.state = CAN_STATE_BUS_OFF;
> + cf->can_id |= CAN_ERR_BUSOFF;
> + /*
> + * Disable all interrupts in bus-off to avoid int hog
> + * this should be handled by the pru
> + */
> + pru_can_mask_ints(priv->dev, 0xFFFF);
> + can_bus_off(ndev);
> + dev_dbg(priv->ndev->dev.parent, "Bus off mode\n");
> + }
> +
> + netif_rx(skb);
> + stats->rx_packets++;
> + stats->rx_bytes += cf->can_dlc;
> + return 0;
> +}
> +
> +void omapl_pru_can_rx_wQ(struct work_struct *work)
> +{
> + struct omapl_pru_can_priv *priv = container_of(work,
> + struct omapl_pru_can_priv, rx_work);
> + struct net_device *ndev = priv->ndev;
> + u32 bit_set, mbxno = 0;
> +
> + if (-1 == pru_can_get_intr_status(priv->dev, &priv->can_rx_hndl))
> + return;
> +
> + if (PRU_CAN_ISR_BIT_RRI & priv->can_rx_hndl.u32interruptstatus) {
> + mbxno = RTR_MBX_NO;
> + omapl_pru_can_rx(ndev, mbxno);
> + } else {
> + /* Extract the mboxno from the status */
> + for (bit_set = 0; ((priv->can_rx_hndl.u32interruptstatus & 0xFF)
> + >> bit_set != 0); bit_set++)
> + ;
> + if (0 == bit_set) {
> + dev_err(priv->dev,
> + "%s: invalid mailbox number: %X\n", __func__,
> + priv->can_rx_hndl.u32interruptstatus);
> + } else {
> + mbxno = bit_set - 1;
> + if (PRU_CAN_ISR_BIT_ESI & priv->can_rx_hndl.
> + u32interruptstatus) {
> + pru_can_get_global_status(priv->dev,
> + &priv->can_rx_hndl);
> + omapl_pru_can_err(ndev,
> + priv->can_rx_hndl.u32interruptstatus,
> + priv->can_rx_hndl.u32globalstatus);
> + } else {
> + omapl_pru_can_rx(ndev, mbxno);
> + }
> + }
> + }
> +}
> +
> +irqreturn_t omapl_tx_can_intr(int irq, void *dev_id)
> +{
> + struct net_device *ndev = dev_id;
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct net_device_stats *stats = &ndev->stats;
> + u32 bit_set, mbxno;
> +
> + pru_can_get_intr_status(priv->dev, &priv->can_tx_hndl);
> + if ((PRU_CAN_ISR_BIT_CCI & priv->can_tx_hndl.u32interruptstatus)
> + || (PRU_CAN_ISR_BIT_SRDI & priv->can_tx_hndl.u32interruptstatus)) {
> + __can_debug("tx_int_status = 0x%X\n",
> + priv->can_tx_hndl.u32interruptstatus);
> + can_free_echo_skb(ndev, 0);
> + } else {
> + for (bit_set = 0; ((priv->can_tx_hndl.u32interruptstatus & 0xFF)
> + >> bit_set != 0); bit_set++)
> + ;
> + if (0 == bit_set) {
> + __can_err("%s: invalid mailbox number\n", __func__);
> + can_free_echo_skb(ndev, 0);
> + } else {
> + mbxno = bit_set - 1; /* mail box numbering starts from 0 */
> + if (PRU_CAN_ISR_BIT_ESI & priv->can_tx_hndl.
> + u32interruptstatus) {
> + /* read gsr and ack pru */
> + pru_can_get_global_status(priv->dev, &priv->can_tx_hndl);
> + omapl_pru_can_err(ndev,
> + priv->can_tx_hndl.
> + u32interruptstatus,
> + priv->can_tx_hndl.
> + u32globalstatus);
> + } else {
> + stats->tx_packets++;
> + /* stats->tx_bytes += dlc; */
> + /*can_get_echo_skb(ndev, 0);*/
> + }
> + }
> + }
> + if (netif_queue_stopped(ndev))
> + netif_wake_queue(ndev);
> +
> + can_get_echo_skb(ndev, 0);
> + pru_can_tx_mode_set(priv->dev, true, ecanreceive);
> + return IRQ_HANDLED;
> +}
> +
> +irqreturn_t omapl_rx_can_intr(int irq, void *dev_id)
> +{
> +
> + struct net_device *ndev = dev_id;
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u32 intc_status = 0;
> +
> + intc_status = pru_can_get_intc_status(priv->dev);
> + if (intc_status & 4)
> + return omapl_tx_can_intr(irq, dev_id);
> + if (intc_status & 2) {
> + if (!work_pending(&priv->rx_work))
> + queue_work(priv->pru_can_wQ, &priv->rx_work);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int omapl_pru_can_open(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + int err;
> +
> + /* register interrupt handler */
> + err = request_irq(priv->trx_irq, &omapl_rx_can_intr, IRQF_SHARED,
> + "pru_can_irq", ndev);
> + if (err) {
> + dev_err(priv->dev, "error requesting rx interrupt\n");
> + goto exit_trx_irq;
> + }
> + /* common open */
> + err = open_candev(ndev);
> + if (err) {
> + dev_err(priv->dev, "open_candev() failed %d\n", err);
> + goto exit_open;
> + }
> +
> + pru_can_emu_init(priv->dev, priv->can.clock.freq);
> + priv->tx_tail = MB_MIN;
> + priv->tx_head = MB_MAX;
> +
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX0, 0);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX1, 1);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX2, 2);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX3, 3);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX4, 4);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX5, 5);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX6, 6);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX7, 7);
> +
> + omapl_pru_can_start(ndev);
> + netif_start_queue(ndev);
> + return 0;
> +
> +exit_open:
> + free_irq(priv->trx_irq, ndev);
> +exit_trx_irq:
> + return err;
> +}
> +
> +static int omapl_pru_can_close(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> +
> + if (!netif_queue_stopped(ndev))
> + netif_stop_queue(ndev);
> +
> + close_candev(ndev);
> +
> + free_irq(priv->trx_irq, ndev);
> + return 0;
> +}
> +
> +static const struct net_device_ops omapl_pru_can_netdev_ops = {
> + .ndo_open = omapl_pru_can_open,
> + .ndo_stop = omapl_pru_can_close,
> + .ndo_start_xmit = omapl_pru_can_start_xmit,
> +};
> +
> +static int __devinit omapl_pru_can_probe(struct platform_device *pdev)
> +{
> + struct net_device *ndev = NULL;
> + const struct da8xx_pru_can_data *pdata;
> + struct omapl_pru_can_priv *priv = NULL;
> + struct device *dev = &pdev->dev;
> + u32 err;
> +
> + pdata = dev->platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "platform data not found\n");
> + return -EINVAL;
> + }
> +
> + ndev = alloc_candev(sizeof(struct omapl_pru_can_priv), MB_MAX + 1);
> + if (!ndev) {
> + dev_err(&pdev->dev, "alloc_candev failed\n");
> + err = -ENOMEM;
> + goto probe_exit;
> + }
> + priv = netdev_priv(ndev);
> +
> + priv->trx_irq = platform_get_irq(to_platform_device(dev->parent), 0);
> + if (!priv->trx_irq) {
> + dev_err(&pdev->dev, "unable to get pru interrupt resources!\n");
> + err = -ENODEV;
> + goto probe_exit;
> + }
> +
> + priv->ndev = ndev;
> + priv->dev = dev; /* priv->dev = pdev->dev */
> +
> + priv->can.bittiming_const = NULL;
> + priv->can.do_set_bittiming = omapl_pru_can_set_bittiming;
> + priv->can.do_set_mode = omapl_pru_can_set_mode;
> + priv->can.do_get_state = omapl_pru_can_get_state;
> + priv->can_tx_hndl.u8prunumber = CAN_TX_PRU_1;
> + priv->can_rx_hndl.u8prunumber = CAN_RX_PRU_0;
> +
> + /* we support local echo, no arp */
> + ndev->flags |= (IFF_ECHO | IFF_NOARP);
> +
> + /* pdev->dev->device_private->driver_data = ndev */
> + platform_set_drvdata(pdev, ndev);
> + SET_NETDEV_DEV(ndev, &pdev->dev);
> + ndev->netdev_ops = &omapl_pru_can_netdev_ops;
> +
> + priv->can.clock.freq = pruss_get_clk_freq(priv->dev);
> +
> + priv->clk_timer = clk_get(&pdev->dev, "pll1_sysclk2");
> + if (IS_ERR(priv->clk_timer)) {
> + dev_err(&pdev->dev, "no timer clock available\n");
> + err = PTR_ERR(priv->clk_timer);
> + priv->clk_timer = NULL;
> + goto probe_exit_candev;
> + }
> + priv->timer_freq = clk_get_rate(priv->clk_timer);
> +
> + err = register_candev(ndev);
> + if (err) {
> + dev_err(&pdev->dev, "register_candev() failed\n");
> + err = -ENODEV;
> + goto probe_exit_clk;
> + }
> +
> + err = request_firmware(&priv->fw_tx, "PRU_CAN_Emulation_Tx.bin",
> + &pdev->dev);
> + if (err) {
> + dev_err(&pdev->dev, "can't load firmware\n");
> + err = -ENODEV;
> + goto probe_exit_clk;
> + }
> +
> + dev_info(&pdev->dev, "fw_tx size %d. downloading...\n",
> + priv->fw_tx->size);
> +
> + err = request_firmware(&priv->fw_rx, "PRU_CAN_Emulation_Rx.bin",
> + &pdev->dev);
> + if (err) {
> + dev_err(&pdev->dev, "can't load firmware\n");
> + err = -ENODEV;
> + goto probe_release_fw;
> + }
> + dev_info(&pdev->dev, "fw_rx size %d. downloading...\n",
> + priv->fw_rx->size);
> +
> + /* init the pru */
> + pru_can_emu_init(priv->dev, priv->can.clock.freq);
> + udelay(200);
> +
> + pruss_enable(priv->dev, CAN_RX_PRU_0);
> + pruss_enable(priv->dev, CAN_TX_PRU_1);
> +
> + /* download firmware into pru */
> + err = pruss_load(priv->dev, CAN_RX_PRU_0,
> + (u32 *)priv->fw_rx->data, (priv->fw_rx->size / 4));
> + if (err) {
> + dev_err(&pdev->dev, "firmware download error\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> + err = pruss_load(priv->dev, CAN_TX_PRU_1,
> + (u32 *)priv->fw_tx->data, (priv->fw_tx->size / 4));
> + if (err) {
> + dev_err(&pdev->dev, "firmware download error\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> +
> + if (pru_can_calc_timing(priv->dev, DFLT_PRU_FREQ,
> + DFLT_PRU_BITRATE) != 0)
> + return -EINVAL;
> +
> + pruss_run(priv->dev, CAN_RX_PRU_0);
> + pruss_run(priv->dev, CAN_TX_PRU_1);
> +
> + /*Create The Work Queue */
> + priv->pru_can_wQ = create_freezeable_workqueue("omapl_pru_wQ");
> + if (priv->pru_can_wQ == NULL) {
> + dev_err(&pdev->dev, "failed to create work queue\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> +
> + INIT_WORK(&priv->rx_work, omapl_pru_can_rx_wQ);
> + dev_info(&pdev->dev,
> + "%s device registered (trx_irq = %d, clk = %d)\n",
> + DRV_NAME, priv->trx_irq, priv->can.clock.freq);
> +
> + return 0;
> +
> +probe_release_fw_1:
> + release_firmware(priv->fw_rx);
> +probe_release_fw:
> + release_firmware(priv->fw_tx);
> +probe_exit_clk:
> + clk_put(priv->clk_timer);
> +probe_exit_candev:
> + if (NULL != ndev)
> + free_candev(ndev);
> +probe_exit:
> + return err;
> +}
> +
> +static int __devexit omapl_pru_can_remove(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> +
> + omapl_pru_can_stop(ndev);
> +
> + pru_can_emu_exit(priv->dev);
> + release_firmware(priv->fw_tx);
> + release_firmware(priv->fw_rx);
> + clk_put(priv->clk_timer);
> + flush_workqueue(priv->pru_can_wQ);
> + destroy_workqueue(priv->pru_can_wQ);
> + unregister_candev(ndev);
> + free_candev(ndev);
> + platform_set_drvdata(pdev, NULL);
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int omapl_pru_can_suspend(struct platform_device *pdev,
> + pm_message_t mesg)
> +{
> + dev_info(&pdev->dev, "%s not yet implemented\n", __func__);
> + return 0;
> +}
> +
> +static int omapl_pru_can_resume(struct platform_device *pdev)
> +{
> + dev_info(&pdev->dev, "%s not yet implemented\n", __func__);
> + return 0;
> +}
> +#else
> +#define omapl_pru_can_suspend NULL
> +#define omapl_pru_can_resume NULL
> +#endif /* CONFIG_PM */
> +
> +static struct platform_driver omapl_pru_can_driver = {
> + .probe = omapl_pru_can_probe,
> + .remove = __devexit_p(omapl_pru_can_remove),
> + .suspend = omapl_pru_can_suspend,
> + .resume = omapl_pru_can_resume,
> + .driver = {
> + .name = DRV_NAME,
> + .owner = THIS_MODULE,
> + },
> +};
> +
> +static int __init omapl_pru_can_init(void)
> +{
> + __can_debug(KERN_INFO DRV_DESC "\n");
> + return platform_driver_register(&omapl_pru_can_driver);
> +}
> +
> +module_init(omapl_pru_can_init);
> +
> +static void __exit omapl_pru_can_exit(void)
> +{
> + __can_debug(KERN_INFO DRV_DESC " unloaded\n");
> + platform_driver_unregister(&omapl_pru_can_driver);
> +}
> +
> +module_exit(omapl_pru_can_exit);
> +
> +MODULE_AUTHOR("Subhasish Ghosh <subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("omapl pru CAN netdevice driver");
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can_api.c b/drivers/net/can/da8xx_pruss/pruss_can_api.c
> new file mode 100644
> index 0000000..2f7438a
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can_api.c
> @@ -0,0 +1,1227 @@
> +/*
> + * Copyright (C) 2010 Texas Instruments Incorporated
> + * Author: Wilfred Felix
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation version 2.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
> + * whether express or implied; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include "pruss_can_api.h"
> +
> +static can_emu_drv_inst gstr_can_inst[ecanmaxinst];
> +
> +/*
> + * pru_can_set_brp() Updates the BRP register of PRU0
> + * and PRU1 of OMAP L138. This API will be called by the
> + * Application to updtae the BRP register of PRU0 and PRU1
> + *
> + * param u16bitrateprescaler The can bus bitrate
> + * prescaler value be set
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_set_brp(struct device *dev, u16 u16bitrateprescaler)
> +{
> +
> + u32 u32offset;
> +
> + if (u16bitrateprescaler > 255) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_CLOCK_BRP_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u16bitrateprescaler, 1);
> +
> + u32offset = (PRU_CAN_TX_CLOCK_BRP_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u16bitrateprescaler, 1);
> +
> + return 0;
> +
> +}
> +
> +/*
> + * pru_can_set_bit_timing() Updates the timing register
> + * of PRU0 and PRU1 of OMAP L138. This API will be called by
> + * the Application to updtae the timing register of PRU0 and PRU1
> + *
> + * param pstrbittiming Pointer to structure holding
> + * the bit timing values for can bus.
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_set_bit_timing(struct device *dev,
> + can_bit_timing_consts *pstrbittiming)
> +{
> +
> + u32 u32offset;
> + u32 u32serregister;
> +
> + u32serregister = 0;
> +
> + if (pstrbittiming == NULL) {
> + return -1;
> + }
> +
> + if ((pstrbittiming->u8syncjumpwidth > PRU_CAN_MAX_SJW) ||
> + (pstrbittiming->u8phseg1 > PRU_CAN_MAX_PHSEG1) ||
> + (pstrbittiming->u8phseg2 > PRU_CAN_MAX_PHSEG2)) {
> + return -1;
> + }
> +
> + u32serregister = u32serregister |
> + ((pstrbittiming->u8syncjumpwidth << 7) |
> + (pstrbittiming->u8phseg1 << 3) |
> + (pstrbittiming->u8phseg2));
> +
> + u32offset = (PRU_CAN_TX_TIMING_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u32serregister, 1);
> +
> + u32offset = (PRU_CAN_RX_TIMING_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u32serregister, 1);
> +
> + return 0;
> +}
> +
> +
> +/*
> + * pru_can_calc_timing()
> + * Updates the timing values of PRU0 and PRU1 of OMAP L138.
> + * This API will be called by the
> + * Application to updtae the timing values of PRU0 and PRU1
> + *
> + * return SUCCESS or FAILURE
> + */
> +
> +s16 pru_can_calc_timing(struct device *dev, u32 pru_freq, u32 bit_rate)
> +{
> + u16 u16phaseseg1;
> + u16 u16phaseseg2;
> + u32 u32offset;
> + u32 u32timing_value;
> + u32 u32setup_value;
> + u32timing_value = TIMER_CLK_FREQ / bit_rate;
> + u32offset = (PRU_CAN_TIMING_VAL_TX);
> + pruss_writel(dev, u32offset, (u32 *) &u32timing_value, 4);
> + pruss_readl(dev, u32offset, (u32 *) &u32timing_value, 4);
> + u32setup_value =
> + (GPIO_SETUP_DELAY * (pru_freq / 1000000) / 1000) /
> + DELAY_LOOP_LENGTH;
> + u32offset = (PRU_CAN_TIMING_VAL_TX_SJW);
> + pruss_writel(dev, u32offset, (u32 *) &u32setup_value, 4);
> + u16phaseseg1 = (u16) (u32timing_value / 2);
> + u16phaseseg2 = u32timing_value - u16phaseseg1;
> + u16phaseseg1 -= TIMER_SETUP_DELAY;
> + u16phaseseg2 -= TIMER_SETUP_DELAY;
> + u32setup_value = (u16phaseseg1 << 16) | u16phaseseg2;
> + u32offset = (PRU_CAN_TIMING_VAL_RX);
> + pruss_writel(dev, u32offset, (u32 *) &u32setup_value, 4);
> + u32offset = (PRU_CAN_TIMING_VAL_RX + 4);
> + pruss_writel(dev, u32offset, (u32 *) &u32timing_value, 4);
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_write_data_to_mailbox()
> + * Updates the transmit mailboxes of PRU1 of OMAP L138.
> + * This API will be called by the Application to update
> + * the transmit mailboxes of PRU1
> + *
> + * param pu16canframedata Can mailbox data buffer
> + *
> + * param u8mailboxnum Mailbox to be updated
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_write_data_to_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + s16 s16subrtnretval;
> + u32 u32offset;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + switch ((u8) pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7);
> + break;
> + default:
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &(pstremuapphndl->strcanmailbox), 4);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_data_from_mailbox()
> + * Receive data from the receive mailboxes of PRU0 of OMAP L138.
> + * This API will be called by the Application to get data from
> + * the receive mailboxes of PRU0
> + *
> + * param pu16canframedata Can mailbox data buffer
> + *
> + * param u8mailboxnum Mailbox to be updated
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_data_from_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + s16 s16subrtnretval;
> + u32 u32offset;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + switch ((u8) pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7);
> + break;
> + case 8:
> + u32offset = (PRU_CAN_RX_MAILBOX8);
> + break;
> + default:
> + return -1;
> + }
> +
> + s16subrtnretval =
> + pruss_readl(dev, u32offset,
> + (u32 *) &(pstremuapphndl->strcanmailbox),
> + 4);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +/*
> + * pru_can_receive_id_map()
> + * Receive mailboxes ID Mapping of PRU0 of OMAP L138.
> + * This API will be called by the Application
> + * to map the IDs to receive mailboxes of PRU0
> + *
> + * param u32nodeid Can node ID
> + *
> + * param ecanmailboxno Mailbox to be mapped
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_rx_id_map(struct device *dev, u32 u32nodeid,
> + can_mailbox_number ecanmailboxno)
> +{
> +
> + pruss_writel(dev, (PRU_CAN_ID_MAP +
> + (((u8) ecanmailboxno) * 4)), (u32 *) &u32nodeid, 1);
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_intr_status()
> + * Gets the interrupts status register value.
> + * This API will be called by the Application
> + * to get the interrupts status register value
> + *
> + * param u8prunumber PRU number for which IntStatusReg
> + * has to be read
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_intr_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + s16 s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + u32offset = (PRU_CAN_TX_INTERRUPT_STATUS_REGISTER);
> + } else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER);
> + } else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32interruptstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_global_status() Gets the globalstatus
> + * register value. This API will be called by the Application
> + * to get the global status register value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_global_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + int s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + } else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + } else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32globalstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_mailbox_status() Gets the mailbox status
> + * register value. This API will be called by the Application
> + * to get the mailbox status register value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_mailbox_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + s16 s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + switch (pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER);
> + break;
> + default:
> + return -1;
> + }
> + }
> +
> + else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + switch (pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER);
> + break;
> + case 8:
> + u32offset = (PRU_CAN_RX_MAILBOX8_STATUS_REGISTER);
> + break;
> + default:
> + return -1;
> + }
> + }
> +
> + else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32mailboxstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +s16 pru_can_tx_mode_set(struct device *dev, bool btransfer_flag,
> + can_transfer_direction ecan_trx)
> +{
> + u32 u32offset;
> + u32 u32value;
> +
> + if (ecan_trx == ecantransmit) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + pruss_readl(dev, u32offset, &u32value, 1);
> + if (btransfer_flag == true) {
> + u32value &= 0x1F;
> + u32value |= 0x80;
> + } else {
> + u32value &= 0x7F;
> + }
> + pruss_writel(dev, u32offset, &u32value, 1);
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + pruss_writel(dev, u32offset, &u32value, 1);
> + } else if (ecan_trx == ecanreceive) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + pruss_readl(dev, u32offset, &u32value, 1);
> + if (btransfer_flag == true) {
> + u32value &= 0x1F;
> + u32value |= 0x40;
> + } else {
> + u32value &= 0xBF;
> + }
> + pruss_writel(dev, u32offset, &u32value, 1);
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + pruss_writel(dev, u32offset, &u32value, 1);
> + } else
> + return -1;
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_config_mode_set() Sets the timing value
> + * for data transfer. This API will be called by the Application
> + * to set timing valus for data transfer
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_config_mode_set(struct device *dev, bool bconfigmodeflag)
> +{
> +
> + u32 u32bitrateprescaler;
> + u32 u32canbittiming;
> +
> + pruss_readl(dev, (PRU_CAN_TX_CLOCK_BRP_REGISTER),
> + (u32 *) &u32bitrateprescaler, 1);
> + pruss_readl(dev, (PRU_CAN_TX_TIMING_REGISTER),
> + (u32 *) &u32canbittiming, 1);
> +
> + if (bconfigmodeflag == 1) {
> + pru_can_calc_timing(dev, u32canbittiming, u32bitrateprescaler);
> + }
> +
> + else {
> + pru_can_calc_timing(dev, 0, 0);
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_emu_init() Initializes the Can
> + * Emulation Parameters. This API will be called by the Application
> + * to Initialize the Can Emulation Parameters
> + *
> + * param u32pruclock PRU Clock value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_init(struct device *dev, u32 u32pruclock)
> +{
> + u32 u32offset;
> + u32 u32value;
> + s16 s16subrtnretval = -1;
> + u8 u8loop;
> +
> + for (u8loop = 0; u8loop < (u8) ecanmaxinst; u8loop++) {
> + gstr_can_inst[u8loop].bcaninststate = (bool) 0;
> + gstr_can_inst[u8loop].ecantransferdirection =
> + (can_transfer_direction) 0;
> + gstr_can_inst[u8loop].u32apphandlerptr = 0;
> + }
> +
> + u32offset = (PRU_CAN_TX_GLOBAL_CONTROL_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_INTERRUPT_MASK_REGISTER & 0xFFFF);
> + u32value = 0x00004000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval =
> + pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_TIMING_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_CLOCK_BRP_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_POLARITY0 & 0xFFFF);
> + u32value = 0xFFFFFFFF;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_POLARITY1 & 0xFFFF);
> + u32value = 0xFFFFFFFF;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_TYPE0 & 0xFFFF);
> + u32value = 0x1C000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_TYPE1 & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HSTINTENIDXCLR & 0xFFFF);
> + u32value = 0x0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_GLBLEN & 0xFFFF);
> + u32value = 0x1;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + /* tx intr map arm->pru */
> + u32offset = (PRUSS_INTC_HSTINTENIDXSET & 0xFFFF);
> + u32value = 0x0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP0 & 0xFFFF);
> + u32value = 0x03020100;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP1 & 0xFFFF);
> + u32value = 0x07060504;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP2 & 0xFFFF);
> + u32value = 0x0000908;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_CHANMAP0 & 0xFFFF);
> + u32value = 0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_CHANMAP8 & 0xFFFF);
> + u32value = 0x00020200;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 19;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 19;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 18;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 18;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 34;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 34;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTINTEN & 0xFFFF);
> + u32value = 0x5;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> +/* PRU0 - Rx Internal Registers Initializations */
> +
> + u32offset = (PRU_CAN_RX_GLOBAL_CONTROL_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_MASK_REGISTER & 0xFFFF);
> + u32value = 0x00004000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x0000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_TIMING_REGISTER & 0xFFFF);
> + u32value = 0x0000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_CLOCK_BRP_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +
> +/*
> + * pru_can_emu_open() Opens the can emu for
> + * application to use. This API will be called by the Application
> + * to Open the can emu for application to use.
> + *
> + * param pstremuapphndl Pointer to application handler
> + * structure
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_open(struct device *dev, can_emu_app_hndl *pstremuapphndl)
> +{
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (gstr_can_inst[pstremuapphndl->ecaninstance].bcaninststate == 1) {
> + return -1;
> + }
> +
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].
> + bcaninststate = (bool)1;
> + gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].ecantransferdirection =
> + (can_transfer_direction)(u8)pstremuapphndl->ecantransferdirection;
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].
> + u32apphandlerptr = (u32) pstremuapphndl;
> +
> + return 0;
> +}
> +
> +
> +/*
> + * brief pru_can_emu_close() Closes the can emu for other
> + * applications to use. This API will be called by the Application to Close
> + * the can emu for other applications to use
> + *
> + * param pstremuapphndl Pointer to application handler structure
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_close(struct device *dev, can_emu_app_hndl *pstremuapphndl)
> +{
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> + if (gstr_can_inst[pstremuapphndl->ecaninstance].bcaninststate == 0) {
> + return -1;
> + }
> + if ((u32) pstremuapphndl != gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].u32apphandlerptr){
> + return -1;
> + }
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].bcaninststate
> + = (bool) 0;
> + gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].ecantransferdirection = (can_transfer_direction) 0;
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].u32apphandlerptr = 0;
> +
> + return 0;
> +}
> +
> +/*
> + * brief pru_can_emu_exit() Diables all the PRUs
> + * This API will be called by the Application to disable all PRUs
> + * param None
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_exit(struct device *dev)
> +{
> + s16 s16subrtnretval;
> +
> + s16subrtnretval = pruss_disable(dev, CAN_RX_PRU_0);
> + if (s16subrtnretval == -1)
> + return -1;
> + s16subrtnretval = pruss_disable(dev, CAN_TX_PRU_1);
> + if (s16subrtnretval == -1)
> + return -1;
> +
> + return 0;
> +}
> +
> +s16 pru_can_emu_sreset(struct device *dev)
> +{
> + return 0;
> +}
> +
> +s16 pru_can_tx(struct device *dev, u8 u8mailboxnumber, u8 u8prunumber)
> +{
> + u32 u32offset = 0;
> + u32 u32value = 0;
> + s16 s16subrtnretval = -1;
> +
> + if (DA8XX_PRUCORE_1 == u8prunumber) {
> + switch (u8mailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + default:
> + return -1;
> + }
> + } else {
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32value = u32value & ~(1 << u8mailboxnumber);
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + switch (u8mailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + default:
> + return -1;
> + }
> + }
> + return 0;
> +}
> +
> +s16 pru_can_start_abort_tx(struct device *dev, bool bcantransmitabortflag)
> +{
> + u32 u32offset;
> + u32 u32value;
> + s16 s16subrtnretval;
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> +
> + u32offset = (PRUSS_INTC_STATIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +s16 pru_can_mask_ints(struct device *dev, u32 int_mask)
> +{
> + return 0;
> +}
> +
> +int pru_can_get_error_cnt(struct device *dev, u8 u8prunumber)
> +{
> + return 0;
> +}
> +
> +int pru_can_get_intc_status(struct device *dev)
> +{
> + u32 u32offset = 0;
> + u32 u32getvalue = 0;
> + u32 u32clrvalue = 0;
> +
> + u32offset = (PRUSS_INTC_STATCLRINT1 & 0xFFFF);
> + pruss_readl(dev, u32offset, (u32 *) &u32getvalue, 1);
> +
> + if (u32getvalue & 4)
> + u32clrvalue = 34; /* CLR Event 34 */
> +
> + if (u32getvalue & 2)
> + u32clrvalue = 33; /* CLR Event 33 */
> +
> + if (u32clrvalue) {
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + pruss_writel(dev, u32offset, &u32clrvalue, 1);
> + } else
> + return -1;
> +
> + return u32getvalue;
> +}
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can_api.h b/drivers/net/can/da8xx_pruss/pruss_can_api.h
> new file mode 100644
> index 0000000..7550456
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can_api.h
> @@ -0,0 +1,290 @@
> +/*
> + * Copyright (C) 2010 Texas Instruments Incorporated
> + * Author: Ganeshan N
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation version 2.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
> + * whether express or implied; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _PRU_CAN_API_H_
> +#define _PRU_CAN_API_H_
> +
> +#include <linux/types.h>
> +#include <linux/mfd/pruss/da8xx_pru.h>
> +
> +
> +#define CAN_BIT_TIMINGS (0x273)
> +
> +/* Timer Clock is sourced from DDR freq (PLL1 SYS CLK 2) */
> +#define TIMER_CLK_FREQ 132000000
any change to get this from a clk_dev?
> +
> +#define TIMER_SETUP_DELAY 14
> +#define GPIO_SETUP_DELAY 150
> +
> +#define CAN_RX_PRU_0 PRUSS_NUM0
> +#define CAN_TX_PRU_1 PRUSS_NUM1
> +
> +/* Number of Instruction in the Delay loop */
> +#define DELAY_LOOP_LENGTH 2
please create a struct describing your register layout.
> +
> +#define PRU1_BASE_ADDR 0x2000
> +
> +#define PRU_CAN_TX_GLOBAL_CONTROL_REGISTER (PRU1_BASE_ADDR)
> +#define PRU_CAN_TX_GLOBAL_STATUS_REGISTER (PRU1_BASE_ADDR + 0x04)
> +#define PRU_CAN_TX_INTERRUPT_MASK_REGISTER (PRU1_BASE_ADDR + 0x08)
> +#define PRU_CAN_TX_INTERRUPT_STATUS_REGISTER (PRU1_BASE_ADDR + 0x0C)
> +#define PRU_CAN_TX_MAILBOX0_STATUS_REGISTER (PRU1_BASE_ADDR + 0x10)
> +#define PRU_CAN_TX_MAILBOX1_STATUS_REGISTER (PRU1_BASE_ADDR + 0x14)
> +#define PRU_CAN_TX_MAILBOX2_STATUS_REGISTER (PRU1_BASE_ADDR + 0x18)
> +#define PRU_CAN_TX_MAILBOX3_STATUS_REGISTER (PRU1_BASE_ADDR + 0x1C)
> +#define PRU_CAN_TX_MAILBOX4_STATUS_REGISTER (PRU1_BASE_ADDR + 0x20)
> +#define PRU_CAN_TX_MAILBOX5_STATUS_REGISTER (PRU1_BASE_ADDR + 0x24)
> +#define PRU_CAN_TX_MAILBOX6_STATUS_REGISTER (PRU1_BASE_ADDR + 0x28)
> +#define PRU_CAN_TX_MAILBOX7_STATUS_REGISTER (PRU1_BASE_ADDR + 0x2C)
please use an array for the mailbox status register.
> +#define PRU_CAN_TX_ERROR_COUNTER_REGISTER (PRU1_BASE_ADDR + 0x30)
> +#define PRU_CAN_TX_TIMING_REGISTER (PRU1_BASE_ADDR + 0x34)
> +#define PRU_CAN_TX_CLOCK_BRP_REGISTER (PRU1_BASE_ADDR + 0x38)
> +
> +#define PRU_CAN_TX_MAILBOX0 (PRU1_BASE_ADDR + 0x40)
> +#define PRU_CAN_TX_MAILBOX1 (PRU1_BASE_ADDR + 0x50)
> +#define PRU_CAN_TX_MAILBOX2 (PRU1_BASE_ADDR + 0x60)
> +#define PRU_CAN_TX_MAILBOX3 (PRU1_BASE_ADDR + 0x70)
> +#define PRU_CAN_TX_MAILBOX4 (PRU1_BASE_ADDR + 0x80)
> +#define PRU_CAN_TX_MAILBOX5 (PRU1_BASE_ADDR + 0x90)
> +#define PRU_CAN_TX_MAILBOX6 (PRU1_BASE_ADDR + 0xA0)
> +#define PRU_CAN_TX_MAILBOX7 (PRU1_BASE_ADDR + 0xB0)
also use an array here
> +
> +#define PRU_CAN_TIMING_VAL_TX (PRU1_BASE_ADDR + 0xC0)
> +#define PRU_CAN_TIMING_VAL_TX_SJW (PRU1_BASE_ADDR + 0xC4)
> +#define PRU_CAN_TRANSMIT_FRAME (PRU1_BASE_ADDR + 0xE0)
> +
> +#define PRU0_BASE_ADDR 0
> +
> +#define PRU_CAN_RX_GLOBAL_CONTROL_REGISTER (PRU0_BASE_ADDR)
> +#define PRU_CAN_RX_GLOBAL_STATUS_REGISTER (PRU0_BASE_ADDR + 0x04)
> +#define PRU_CAN_RX_INTERRUPT_MASK_REGISTER (PRU0_BASE_ADDR + 0x08)
> +#define PRU_CAN_RX_INTERRUPT_STATUS_REGISTER (PRU0_BASE_ADDR + 0x0C)
> +#define PRU_CAN_RX_MAILBOX0_STATUS_REGISTER (PRU0_BASE_ADDR + 0x10)
> +#define PRU_CAN_RX_MAILBOX1_STATUS_REGISTER (PRU0_BASE_ADDR + 0x14)
> +#define PRU_CAN_RX_MAILBOX2_STATUS_REGISTER (PRU0_BASE_ADDR + 0x18)
> +#define PRU_CAN_RX_MAILBOX3_STATUS_REGISTER (PRU0_BASE_ADDR + 0x1C)
> +#define PRU_CAN_RX_MAILBOX4_STATUS_REGISTER (PRU0_BASE_ADDR + 0x20)
> +#define PRU_CAN_RX_MAILBOX5_STATUS_REGISTER (PRU0_BASE_ADDR + 0x24)
> +#define PRU_CAN_RX_MAILBOX6_STATUS_REGISTER (PRU0_BASE_ADDR + 0x28)
> +#define PRU_CAN_RX_MAILBOX7_STATUS_REGISTER (PRU0_BASE_ADDR + 0x2C)
> +#define PRU_CAN_RX_MAILBOX8_STATUS_REGISTER (PRU0_BASE_ADDR + 0x30)
...array
> +#define PRU_CAN_RX_ERROR_COUNTER_REGISTER (PRU0_BASE_ADDR + 0x34)
> +#define PRU_CAN_RX_TIMING_REGISTER (PRU0_BASE_ADDR + 0x38)
> +#define PRU_CAN_RX_CLOCK_BRP_REGISTER (PRU0_BASE_ADDR + 0x3C)
> +
> +#define PRU_CAN_RX_MAILBOX0 (PRU0_BASE_ADDR + 0x40)
> +#define PRU_CAN_RX_MAILBOX1 (PRU0_BASE_ADDR + 0x50)
> +#define PRU_CAN_RX_MAILBOX2 (PRU0_BASE_ADDR + 0x60)
> +#define PRU_CAN_RX_MAILBOX3 (PRU0_BASE_ADDR + 0x70)
> +#define PRU_CAN_RX_MAILBOX4 (PRU0_BASE_ADDR + 0x80)
> +#define PRU_CAN_RX_MAILBOX5 (PRU0_BASE_ADDR + 0x90)
> +#define PRU_CAN_RX_MAILBOX6 (PRU0_BASE_ADDR + 0xA0)
> +#define PRU_CAN_RX_MAILBOX7 (PRU0_BASE_ADDR + 0xB0)
> +#define PRU_CAN_RX_MAILBOX8 (PRU0_BASE_ADDR + 0xC0)
..array
The rx and tx register set look quite similar. Is it intended that you
have 8 tx but 9 rx mailboxes? Anyway....make a struct descriing the
register set and use it twice, one for rx and one for tx.
> +
> +#define PRU_CAN_TIMING_VAL_RX (PRU0_BASE_ADDR + 0xD0)
> +#define PRU_CAN_RECEIVE_FRAME (PRU0_BASE_ADDR + 0xD4)
> +#define PRU_CAN_ID_MAP (PRU0_BASE_ADDR + 0xF0)
> +
> +#define PRU_CAN_ERROR_ACTIVE 128
> +
> +#define CAN_ACK_FAILED 0xE
> +#define CAN_ARBTR_FAIL 0xD
> +#define CAN_BIT_ERROR 0xC
> +#define CAN_TRANSMISSION_SUCCESS 0xA
> +
> +#define STD_DATA_FRAME 0x1
> +#define EXTD_DATA_FRAME 0x2
> +#define STD_REMOTE_FRAME 0x3
> +#define EXTD_REMOTE_FRAME 0x4
> +
> +#define PRU_CAN_MAX_SJW 8
> +#define PRU_CAN_MAX_PHSEG1 25
> +#define PRU_CAN_MAX_PHSEG2 25
> +
> +#define DA8XX_PRUCANCORE_0_REGS 0x7000
> +#define DA8XX_PRUCANCORE_1_REGS 0x7800
> +#define PRU0_PROG_RAM_START_OFFSET 0x8000
> +#define PRU1_PROG_RAM_START_OFFSET 0xC000
> +#define PRU_CAN_INIT_MAX_TIMEOUT 0xFF
> +
> +typedef enum {
> + ecaninst0 = 0,
> + ecaninst1,
> + ecanmaxinst
> +} can_instance_enum;
seens unused
> +
> +typedef enum {
> + ecanmailbox0 = 0,
> + ecanmailbox1,
> + ecanmailbox2,
> + ecanmailbox3,
> + ecanmailbox4,
> + ecanmailbox5,
> + ecanmailbox6,
> + ecanmailbox7
> +} can_mailbox_number;
unused, too
> +
> +typedef enum {
> + ecandirectioninit = 0,
> + ecantransmit,
> + ecanreceive
> +} can_transfer_direction;
please add a common prefix and please write them uppsercase.
> +
> +typedef struct {
> + u16 u16extendedidentifier;
> + u16 u16baseidentifier;
> + u8 u8data7;
> + u8 u8data6;
> + u8 u8data5;
> + u8 u8data4;
> + u8 u8data3;
> + u8 u8data2;
> + u8 u8data1;
> + u8 u8data0;
use an array for the data.
> + u16 u16datalength;
> + u16 u16crc;
> +} can_mail_box_structure;
> +
> +typedef struct {
> + can_transfer_direction ecantransferdirection;
> +} can_mailbox_config;
> +
> +typedef struct {
> + can_instance_enum ecaninstance;
> + can_transfer_direction ecantransferdirection;
> + can_mail_box_structure strcanmailbox;
> + can_mailbox_number ecanmailboxnumber;
> + u8 u8prunumber;
> + u32 u32globalstatus;
> + u32 u32interruptstatus;
> + u32 u32mailboxstatus;
> +} can_emu_app_hndl;
You already have defines your priv. No need for further structs.
> +
> +typedef struct {
> + bool bcaninststate;
> + can_transfer_direction ecantransferdirection;
> + u32 u32apphandlerptr;
> +} can_emu_drv_inst;
dito
> +
> +typedef struct {
> + u8 u8syncjumpwidth;
> + u8 u8phseg1;
> + u8 u8phseg2;
> +} can_bit_timing_consts;
> +
> +/* Field Definition Macros */
> +
> +/* CONTROL */
>
get rid of all the following functions, you don't need that extra layer
in the can driver.
> +/*
> + * pru_can_set_brp() Updates the BRP register of PRU.
> + */
> +s16 pru_can_set_brp(struct device *dev, u16 u16prescaler);
> +
> +/*
> + * pru_can_set_bit_timing() Updates the timing register of PRU
> + */
> +s16 pru_can_set_bit_timing(struct device *dev,
> + can_bit_timing_consts *pstrbittiming);
> +
> +/*
> + * pru_can_calc_timing() Updates the timing values of PRU
> + */
> +s16 pru_can_calc_timing(struct device *dev,
> + u32 u32bittiming, u32 u32bitrateprescaler);
> +
> +/*
> + * pru_can_write_data_to_mailbox() Updates the transmit mailboxes of PRU1
> + */
> +s16 pru_can_write_data_to_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_get_data_from_mailbox() Receive data from receive mailboxes
> + */
> +s16 pru_can_get_data_from_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_rx_id_map() Receive mailboxes ID Mapping of PRU0
> + */
> +s16 pru_can_rx_id_map(struct device *dev,
> + u32 u32nodeid, can_mailbox_number ecanmailboxno);
> +
> +/*
> + *pru_can_get_intr_status() Get interrupts status register value
> + */
> +s16 pru_can_get_intr_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +
> +/*
> + * pru_can_get_global_status() Get the globalstatus register value
> + */
> +s16 pru_can_get_global_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_get_mailbox_status() Get mailbox status reg value
> + */
> +s16 pru_can_get_mailbox_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_configuration_mode_set() Sets timing val for data transfer
> + */
> +s16 pru_can_config_mode_set(struct device *dev,
> + bool bconfig_modeflag);
> +
> +/*
> + * pru_can_emu_init() Initializes Can Emulation Parameters
> + */
> +s16 pru_can_emu_init(struct device *dev,
> + u32 u32pruclock);
> +
> +/*
> + * pru_can_emu_open() Opens can emu for application to use
> + */
> +s16 pru_can_emu_open(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_emu_close() Closes can emu for applications to use
> + */
> +s16 pru_can_emu_close(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl);
> +
> +/*
> + * pru_can_emu_exit() Diables all the PRUs
> + */
> +s16 pru_can_emu_exit(struct device *dev);
> +
> +s16 pru_can_tx_mode_set(struct device *dev, bool btransfer_flag,
> + can_transfer_direction ecan_trx);
> +
> +s16 pru_can_emu_sreset(struct device *dev);
> +
> +s16 pru_can_tx(struct device *dev,
> + u8 u8mailboxnumber, u8 u8prunumber);
> +
> +s16 pru_can_start_abort_tx(struct device *dev,
> + bool btxabort_flag);
> +
> +s16 pru_can_mask_ints(struct device *dev, u32 int_mask);
> +
> +s32 pru_can_get_error_cnt(struct device *dev, u8 u8prunumber);
> +
> +s32 pru_can_get_intc_status(struct device *dev);
> +#endif
regards, Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core
^ permalink raw reply
* any way to reset all marked connections when using CONNMARK?
From: Chris Friesen @ 2011-02-11 21:24 UTC (permalink / raw)
To: netdev, netfilter-devel, netfilter, coreteam
Hi,
We've got a scenario where we want to use CONNMARK to mark connections
that have passed a large number of rules in order to allow packets from
those connections to skip rules in the future (for performance reasons).
However, when we add new rules we want to ensure that all the
connections need to pass the new rules as well.
It has been proposed to add a custom patch to clear the mark for all
marked connections--is there a better way of doing this?
I thought maybe we could use the CONNMARK as a generation count and
bumping it up each time a rule is added. This would require updating
the bypass rule each time we modify the other rules though. If there
are better options I'd like to hear them.
Thanks,
Chris
--
Chris Friesen
Software Developer
GENBAND
chris.friesen@genband.com
www.genband.com
^ permalink raw reply
* Re: [PATCH v2 09/13] can: pruss CAN driver.
From: Wolfgang Grandegger @ 2011-02-11 20:33 UTC (permalink / raw)
To: Subhasish Ghosh
Cc: sachi-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/,
davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/,
CAN NETWORK DRIVERS, nsekhar-l0cyMroinI0, open list,
CAN NETWORK DRIVERS, m-watkins-l0cyMroinI0,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1297435892-28278-10-git-send-email-subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Hello,
thanks for your contribution.
First some general comments:
- Please send a separate patch for the Socket-CAN driver.
Or are there good reasons why we should look at the other 12 patches?
- Please run checkpatch.pl and fix the reported warnings. There are
many.
- You are using casts extensively. Please get rid of them.
- Decoding the variable type into the name is *deprecated* in Linux.
- Also very long names are *deprecated* in Linux.
- Don't use typedef's.
Some more comments inline...
On 02/11/2011 03:51 PM, Subhasish Ghosh wrote:
> This patch adds support for the CAN device emulated on PRUSS.
>
> Signed-off-by: Subhasish Ghosh <subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> drivers/net/can/Kconfig | 1 +
> drivers/net/can/Makefile | 1 +
> drivers/net/can/da8xx_pruss/Kconfig | 73 ++
> drivers/net/can/da8xx_pruss/Makefile | 7 +
> drivers/net/can/da8xx_pruss/pruss_can.c | 758 +++++++++++++++++
> drivers/net/can/da8xx_pruss/pruss_can_api.c | 1227 +++++++++++++++++++++++++++
> drivers/net/can/da8xx_pruss/pruss_can_api.h | 290 +++++++
> 7 files changed, 2357 insertions(+), 0 deletions(-)
> create mode 100644 drivers/net/can/da8xx_pruss/Kconfig
> create mode 100644 drivers/net/can/da8xx_pruss/Makefile
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can.c
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can_api.c
> create mode 100644 drivers/net/can/da8xx_pruss/pruss_can_api.h
Why not s/da8xx_pruss/pruss_can/ ?
> diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
> index d5a9db6..ae8f0f9 100644
> --- a/drivers/net/can/Kconfig
> +++ b/drivers/net/can/Kconfig
> @@ -112,6 +112,7 @@ config PCH_CAN
> This driver can access CAN bus.
>
> source "drivers/net/can/mscan/Kconfig"
> +source "drivers/net/can/da8xx_pruss/Kconfig"
>
> source "drivers/net/can/sja1000/Kconfig"
>
> diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
> index 07ca159..849cdbf 100644
> --- a/drivers/net/can/Makefile
> +++ b/drivers/net/can/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_CAN_SJA1000) += sja1000/
> obj-$(CONFIG_CAN_MSCAN) += mscan/
> obj-$(CONFIG_CAN_AT91) += at91_can.o
> obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
> +obj-$(CONFIG_CAN_TI_DA8XX_PRU) += da8xx_pruss/
Please use a common name/prefix, e.g. pruss_can.
> obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
> obj-$(CONFIG_CAN_BFIN) += bfin_can.o
> obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o
> diff --git a/drivers/net/can/da8xx_pruss/Kconfig b/drivers/net/can/da8xx_pruss/Kconfig
> new file mode 100644
> index 0000000..8b68f68
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/Kconfig
> @@ -0,0 +1,73 @@
> +#
> +# CAN Lite Kernel Configuration
> +#
> +config CAN_TI_DA8XX_PRU
> + depends on CAN_DEV && ARCH_DAVINCI && ARCH_DAVINCI_DA850
> + tristate "PRU based CAN emulation for DA8XX"
> + ---help---
> + Enable this to emulate a CAN controller on the PRU of DA8XX.
> + If not sure, mark N
> +
> +config DA8XX_PRU_CANID_MBX0
> + hex "CANID for mailbox 0"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 0
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX1
> + hex "CANID for mailbox 1"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 1
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX2
> + hex "CANID for mailbox 2"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 2
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX3
> + hex "CANID for mailbox 3"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 3
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX4
> + hex "CANID for mailbox 4"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 4
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX5
> + hex "CANID for mailbox 5"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 5
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX6
> + hex "CANID for mailbox 6"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 6
> + Default value is set to 0x123, change this as required.
> +
> +config DA8XX_PRU_CANID_MBX7
> + hex "CANID for mailbox 7"
> + depends on CAN_TI_DA8XX_PRU
> + default "0x123"
> + ---help---
> + Enter the CANID for mailbox 7
> + Default value is set to 0x123, change this as required.
Well, defining CAN identifiers via Kconfig entries is really wired.
Could you please explain why that's necessary and what's so special with
that CAN hardware. We need a better solution if the CAN controller
cannot handle and CAN id.
> diff --git a/drivers/net/can/da8xx_pruss/Makefile b/drivers/net/can/da8xx_pruss/Makefile
> new file mode 100644
> index 0000000..48f3055
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# Makefile for CAN Lite emulation
> +#
> +can_emu-objs := pruss_can.o \
> + pruss_can_api.o
> +
> +obj-$(CONFIG_CAN_TI_DA8XX_PRU) += can_emu.o
Again another name.
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can.c b/drivers/net/can/da8xx_pruss/pruss_can.c
> new file mode 100644
> index 0000000..1b3afde
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can.c
> @@ -0,0 +1,758 @@
> +/*
> + * TI DA8XX PRU CAN Emulation device driver
> + * Author: subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org
> + *
> + * This driver supports TI's PRU CAN Emulation and the
> + * specs for the same is available at <http://www.ti.com>
> + *
> + * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation version 2.
> + *
> + * This program is distributed as is WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/bitops.h>
> +#include <linux/interrupt.h>
> +#include <linux/errno.h>
> +#include <linux/netdevice.h>
> +#include <linux/skbuff.h>
> +#include <linux/platform_device.h>
> +#include <linux/firmware.h>
> +#include <linux/clk.h>
> +#include <linux/types.h>
> +
> +#include <linux/can.h>
> +#include <linux/can/dev.h>
> +#include <linux/can/error.h>
> +#include <mach/da8xx.h>
> +#include "pruss_can_api.h"
> +
> +#define DRV_NAME "da8xx_pruss_can"
> +#define DRV_DESC "TI PRU CAN Controller Driver v0.1"
> +#define PRU_CAN_START 1
> +#define PRU_CAN_STOP 0
> +#define MB_MIN 0
> +#define MB_MAX 7
> +
> +#define PRU_CANMID_IDE BIT(29) /* Extended frame format */
> +
> +#define PRU_CAN_ISR_BIT_CCI BIT(15)
> +#define PRU_CAN_ISR_BIT_ESI BIT(14)
> +#define PRU_CAN_ISR_BIT_SRDI BIT(13)
> +#define PRU_CAN_ISR_BIT_RRI BIT(8)
> +
> +#define PRU_CAN_MBXSR_BIT_STATE BIT(7)
> +#define PRU_CAN_MBXSR_BIT_TC BIT(6)
> +#define PRU_CAN_MBXSR_BIT_ERR BIT(5)
> +#define PRU_CAN_MBXSR_BIT_OF BIT(0)
> +
> +#define PRU_CAN_GSR_BIT_TXM BIT(7)
> +#define PRU_CAN_GSR_BIT_RXM BIT(6)
> +#define PRU_CAN_GSR_BIT_CM BIT(5)
> +#define PRU_CAN_GSR_BIT_EPM BIT(4)
> +#define PRU_CAN_GSR_BIT_BFM BIT(3)
> +#define RTR_MBX_NO 8
> +#define MAX_INIT_RETRIES 20
> +#define L138_PRU_ARM_FREQ 312000
> +#define DFLT_PRU_FREQ 156000000
> +#define DFLT_PRU_BITRATE 125000
> +
> +#define CONFIG_DA8XX_PRU_CANID_MBX0 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX1 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX2 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX3 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX4 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX5 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX6 0x123
> +#define CONFIG_DA8XX_PRU_CANID_MBX7 0x123
> +
> +#ifdef __CAN_DEBUG
> +#define __can_debug(fmt, args...) printk(KERN_DEBUG "can_debug: " fmt, ## args)
> +#else
> +#define __can_debug(fmt, args...)
> +#endif
> +#define __can_err(fmt, args...) printk(KERN_ERR "can_err: " fmt, ## args)
Please use dev_dbg, dev_err, ... or netif_dbg, netdev_err, ... instead.
> +/*
> + * omapl_pru can private data
> + */
> +struct omapl_pru_can_priv {
> + struct can_priv can;
> + struct workqueue_struct *pru_can_wQ;
> + struct work_struct rx_work;
> + struct net_device *ndev;
> + struct device *dev; /* pdev->dev */
> + struct clk *clk_timer;
> + u32 timer_freq;
> + can_emu_app_hndl can_tx_hndl;
> + can_emu_app_hndl can_rx_hndl;
> + const struct firmware *fw_rx;
> + const struct firmware *fw_tx;
> + spinlock_t mbox_lock;
> + u32 trx_irq;
> + u32 tx_head;
> + u32 tx_tail;
> + u32 tx_next;
> + u32 rx_next;
> +};
> +
> +static int omapl_pru_can_get_state(const struct net_device *ndev,
> + enum can_state *state)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + *state = priv->can.state;
> + return 0;
> +}
There is no need for that function as you handle state changes in the
interrupt context.
> +static int omapl_pru_can_set_bittiming(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct can_bittiming *bt = &priv->can.bittiming;
> + long bit_error = 0;
> +
> + if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) {
> + dev_warn(priv->dev, "WARN: Triple"
> + "sampling not set due to h/w limitations");
> + }
No need for this test as you have not set the CAN_CTRLMODE_3_SAMPLES bit
in priv.ctrlmode_supported.
> + if (pru_can_calc_timing(priv->dev, priv->can.clock.freq,
> + bt->bitrate) != 0)
> + return -EINVAL;
> + bit_error =
> + (((priv->timer_freq / (priv->timer_freq / bt->bitrate)) -
> + bt->bitrate) * 1000) / bt->bitrate;
> + if (bit_error) {
> + bit_error =
> + (((priv->timer_freq / (priv->timer_freq / bt->bitrate)) -
> + bt->bitrate) * 1000000) / bt->bitrate;
> + printk(KERN_INFO "\nBitrate error %ld.%ld%%\n",
> + bit_error / 10000, bit_error % 1000);
> + } else
> + printk(KERN_INFO "\nBitrate error 0.0%%\n");
> +
> + return 0;
Please use the pre-calculated bit-timing parameters. Have a look to the
SJA1000 driver for further information:
http://lxr.linux.no/#linux+v2.6.37/drivers/net/can/sja1000/sja1000.c#L202
In general, please use the bit-timing interface of Socket-CAN and drop
you own.
> +}
> +
> +static void omapl_pru_can_stop(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u16 int_mask = 0;
> +
> + pru_can_mask_ints(priv->dev, int_mask); /* mask all ints */
> + pru_can_start_abort_tx(priv->dev, PRU_CAN_STOP);
> + priv->can.state = CAN_STATE_STOPPED;
> +}
> +
> +/*
> + * This is to just set the can state to ERROR_ACTIVE
> + * ip link set canX up type can bitrate 125000
> + */
> +static void omapl_pru_can_start(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u16 int_mask = 0xFFFF;
> +
> + if (priv->can.state != CAN_STATE_STOPPED)
> + omapl_pru_can_stop(ndev);
> +
> + pru_can_mask_ints(priv->dev, int_mask); /* unmask all ints */
> +
> + pru_can_get_global_status(priv->dev, &priv->can_tx_hndl);
> + pru_can_get_global_status(priv->dev, &priv->can_rx_hndl);
> +
> + if (PRU_CAN_GSR_BIT_EPM & priv->can_tx_hndl.u32globalstatus)
Decoding the variable type into the name is deprecated in Linux.
> + priv->can.state = CAN_STATE_ERROR_PASSIVE;
> + else if (PRU_CAN_GSR_BIT_BFM & priv->can_tx_hndl.u32globalstatus)
> + priv->can.state = CAN_STATE_BUS_OFF;
> + else
> + priv->can.state = CAN_STATE_ERROR_ACTIVE;
> +}
> +
> +static int omapl_pru_can_set_mode(struct net_device *ndev, enum can_mode mode)
> +{
> + int ret = 0;
> +
> + switch (mode) {
> + case CAN_MODE_START:
> + omapl_pru_can_start(ndev);
> + if (netif_queue_stopped(ndev))
> + netif_wake_queue(ndev);
> + break;
> + case CAN_MODE_STOP:
> + omapl_pru_can_stop(ndev);
> + if (!netif_queue_stopped(ndev))
> + netif_stop_queue(ndev);
> + break;
This case is not supported.
> + default:
> + ret = -EOPNOTSUPP;
> + break;
> + }
> + return ret;
> +}
> +
> +static netdev_tx_t omapl_pru_can_start_xmit(struct sk_buff *skb,
> + struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + struct can_frame *cf = (struct can_frame *)skb->data;
> + int count;
> + u8 *data = cf->data;
> + u8 dlc = cf->can_dlc;
> + u8 *ptr8data = NULL;
> +
> + netif_stop_queue(ndev);
> + if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) =
> + (cf->can_id & CAN_EFF_MASK) | PRU_CANMID_IDE;
> + else /* Standard frame format */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) =
> + (cf->can_id & CAN_SFF_MASK) << 18;
You use many of such wired expressions. strcanmailbox is a struct
typedef struct {
u16 u16extendedidentifier;
u16 u16baseidentifier;
...
} can_mail_box_structure;
and you obviously set the fist two fields. In contrast, the member
u16extendedidentifier is never directly used. Puh, that's magic. Please
make your code more transparent and readable.
> + if (cf->can_id & CAN_RTR_FLAG) /* Remote transmission request */
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox) |= CAN_RTR_FLAG;
> +
> + ptr8data = &priv->can_tx_hndl.strcanmailbox.u8data7 + (dlc - 1);
> + for (count = 0; count < (u8) dlc; count++) {
> + *ptr8data-- = *data++;
> + }
> + *((u32 *) &priv->can_tx_hndl.strcanmailbox.u16datalength) = (u32) dlc;
...
> +irqreturn_t omapl_rx_can_intr(int irq, void *dev_id)
> +{
> +
> + struct net_device *ndev = dev_id;
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + u32 intc_status = 0;
> +
> + intc_status = pru_can_get_intc_status(priv->dev);
> + if (intc_status & 4)
> + return omapl_tx_can_intr(irq, dev_id);
> + if (intc_status & 2) {
> + if (!work_pending(&priv->rx_work))
> + queue_work(priv->pru_can_wQ, &priv->rx_work);
You handle RX in a work queue!? Please use NAPI instead.
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int omapl_pru_can_open(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> + int err;
> +
> + /* register interrupt handler */
> + err = request_irq(priv->trx_irq, &omapl_rx_can_intr, IRQF_SHARED,
> + "pru_can_irq", ndev);
> + if (err) {
> + dev_err(priv->dev, "error requesting rx interrupt\n");
> + goto exit_trx_irq;
> + }
> + /* common open */
> + err = open_candev(ndev);
> + if (err) {
> + dev_err(priv->dev, "open_candev() failed %d\n", err);
> + goto exit_open;
> + }
> +
> + pru_can_emu_init(priv->dev, priv->can.clock.freq);
> + priv->tx_tail = MB_MIN;
> + priv->tx_head = MB_MAX;
> +
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX0, 0);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX1, 1);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX2, 2);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX3, 3);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX4, 4);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX5, 5);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX6, 6);
> + pru_can_rx_id_map(priv->dev, CONFIG_DA8XX_PRU_CANID_MBX7, 7);
> +
> + omapl_pru_can_start(ndev);
> + netif_start_queue(ndev);
> + return 0;
> +
> +exit_open:
> + free_irq(priv->trx_irq, ndev);
> +exit_trx_irq:
> + return err;
> +}
> +
> +static int omapl_pru_can_close(struct net_device *ndev)
> +{
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> +
> + if (!netif_queue_stopped(ndev))
> + netif_stop_queue(ndev);
> +
> + close_candev(ndev);
> +
> + free_irq(priv->trx_irq, ndev);
> + return 0;
> +}
> +
> +static const struct net_device_ops omapl_pru_can_netdev_ops = {
> + .ndo_open = omapl_pru_can_open,
> + .ndo_stop = omapl_pru_can_close,
> + .ndo_start_xmit = omapl_pru_can_start_xmit,
> +};
> +
> +static int __devinit omapl_pru_can_probe(struct platform_device *pdev)
> +{
> + struct net_device *ndev = NULL;
> + const struct da8xx_pru_can_data *pdata;
> + struct omapl_pru_can_priv *priv = NULL;
> + struct device *dev = &pdev->dev;
> + u32 err;
> +
> + pdata = dev->platform_data;
> + if (!pdata) {
> + dev_err(&pdev->dev, "platform data not found\n");
> + return -EINVAL;
> + }
> +
> + ndev = alloc_candev(sizeof(struct omapl_pru_can_priv), MB_MAX + 1);
> + if (!ndev) {
> + dev_err(&pdev->dev, "alloc_candev failed\n");
> + err = -ENOMEM;
> + goto probe_exit;
> + }
> + priv = netdev_priv(ndev);
> +
> + priv->trx_irq = platform_get_irq(to_platform_device(dev->parent), 0);
> + if (!priv->trx_irq) {
> + dev_err(&pdev->dev, "unable to get pru interrupt resources!\n");
> + err = -ENODEV;
> + goto probe_exit;
> + }
> +
> + priv->ndev = ndev;
> + priv->dev = dev; /* priv->dev = pdev->dev */
> +
> + priv->can.bittiming_const = NULL;
> + priv->can.do_set_bittiming = omapl_pru_can_set_bittiming;
> + priv->can.do_set_mode = omapl_pru_can_set_mode;
> + priv->can.do_get_state = omapl_pru_can_get_state;
> + priv->can_tx_hndl.u8prunumber = CAN_TX_PRU_1;
> + priv->can_rx_hndl.u8prunumber = CAN_RX_PRU_0;
> +
> + /* we support local echo, no arp */
> + ndev->flags |= (IFF_ECHO | IFF_NOARP);
> +
> + /* pdev->dev->device_private->driver_data = ndev */
> + platform_set_drvdata(pdev, ndev);
> + SET_NETDEV_DEV(ndev, &pdev->dev);
> + ndev->netdev_ops = &omapl_pru_can_netdev_ops;
> +
> + priv->can.clock.freq = pruss_get_clk_freq(priv->dev);
> +
> + priv->clk_timer = clk_get(&pdev->dev, "pll1_sysclk2");
> + if (IS_ERR(priv->clk_timer)) {
> + dev_err(&pdev->dev, "no timer clock available\n");
> + err = PTR_ERR(priv->clk_timer);
> + priv->clk_timer = NULL;
> + goto probe_exit_candev;
> + }
> + priv->timer_freq = clk_get_rate(priv->clk_timer);
> +
> + err = register_candev(ndev);
> + if (err) {
> + dev_err(&pdev->dev, "register_candev() failed\n");
> + err = -ENODEV;
> + goto probe_exit_clk;
> + }
> +
> + err = request_firmware(&priv->fw_tx, "PRU_CAN_Emulation_Tx.bin",
> + &pdev->dev);
> + if (err) {
> + dev_err(&pdev->dev, "can't load firmware\n");
> + err = -ENODEV;
> + goto probe_exit_clk;
> + }
> +
> + dev_info(&pdev->dev, "fw_tx size %d. downloading...\n",
> + priv->fw_tx->size);
> +
> + err = request_firmware(&priv->fw_rx, "PRU_CAN_Emulation_Rx.bin",
> + &pdev->dev);
> + if (err) {
> + dev_err(&pdev->dev, "can't load firmware\n");
> + err = -ENODEV;
> + goto probe_release_fw;
> + }
> + dev_info(&pdev->dev, "fw_rx size %d. downloading...\n",
> + priv->fw_rx->size);
> +
> + /* init the pru */
> + pru_can_emu_init(priv->dev, priv->can.clock.freq);
> + udelay(200);
> +
> + pruss_enable(priv->dev, CAN_RX_PRU_0);
> + pruss_enable(priv->dev, CAN_TX_PRU_1);
> +
> + /* download firmware into pru */
> + err = pruss_load(priv->dev, CAN_RX_PRU_0,
> + (u32 *)priv->fw_rx->data, (priv->fw_rx->size / 4));
> + if (err) {
> + dev_err(&pdev->dev, "firmware download error\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> + err = pruss_load(priv->dev, CAN_TX_PRU_1,
> + (u32 *)priv->fw_tx->data, (priv->fw_tx->size / 4));
> + if (err) {
> + dev_err(&pdev->dev, "firmware download error\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> +
> + if (pru_can_calc_timing(priv->dev, DFLT_PRU_FREQ,
> + DFLT_PRU_BITRATE) != 0)
> + return -EINVAL;
Please don't define a default bit-rate. It's error prune.
> +
> + pruss_run(priv->dev, CAN_RX_PRU_0);
> + pruss_run(priv->dev, CAN_TX_PRU_1);
> +
> + /*Create The Work Queue */
> + priv->pru_can_wQ = create_freezeable_workqueue("omapl_pru_wQ");
> + if (priv->pru_can_wQ == NULL) {
> + dev_err(&pdev->dev, "failed to create work queue\n");
> + err = -ENODEV;
> + goto probe_release_fw_1;
> + }
> +
> + INIT_WORK(&priv->rx_work, omapl_pru_can_rx_wQ);
> + dev_info(&pdev->dev,
> + "%s device registered (trx_irq = %d, clk = %d)\n",
> + DRV_NAME, priv->trx_irq, priv->can.clock.freq);
> +
> + return 0;
> +
> +probe_release_fw_1:
> + release_firmware(priv->fw_rx);
> +probe_release_fw:
> + release_firmware(priv->fw_tx);
> +probe_exit_clk:
> + clk_put(priv->clk_timer);
> +probe_exit_candev:
> + if (NULL != ndev)
> + free_candev(ndev);
> +probe_exit:
> + return err;
> +}
> +
> +static int __devexit omapl_pru_can_remove(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct omapl_pru_can_priv *priv = netdev_priv(ndev);
> +
> + omapl_pru_can_stop(ndev);
> +
> + pru_can_emu_exit(priv->dev);
> + release_firmware(priv->fw_tx);
> + release_firmware(priv->fw_rx);
> + clk_put(priv->clk_timer);
> + flush_workqueue(priv->pru_can_wQ);
> + destroy_workqueue(priv->pru_can_wQ);
> + unregister_candev(ndev);
> + free_candev(ndev);
> + platform_set_drvdata(pdev, NULL);
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int omapl_pru_can_suspend(struct platform_device *pdev,
> + pm_message_t mesg)
> +{
> + dev_info(&pdev->dev, "%s not yet implemented\n", __func__);
> + return 0;
> +}
> +
> +static int omapl_pru_can_resume(struct platform_device *pdev)
> +{
> + dev_info(&pdev->dev, "%s not yet implemented\n", __func__);
> + return 0;
> +}
> +#else
> +#define omapl_pru_can_suspend NULL
> +#define omapl_pru_can_resume NULL
> +#endif /* CONFIG_PM */
> +
> +static struct platform_driver omapl_pru_can_driver = {
> + .probe = omapl_pru_can_probe,
> + .remove = __devexit_p(omapl_pru_can_remove),
> + .suspend = omapl_pru_can_suspend,
> + .resume = omapl_pru_can_resume,
> + .driver = {
> + .name = DRV_NAME,
> + .owner = THIS_MODULE,
> + },
> +};
> +
> +static int __init omapl_pru_can_init(void)
> +{
> + __can_debug(KERN_INFO DRV_DESC "\n");
> + return platform_driver_register(&omapl_pru_can_driver);
> +}
> +
> +module_init(omapl_pru_can_init);
> +
> +static void __exit omapl_pru_can_exit(void)
> +{
> + __can_debug(KERN_INFO DRV_DESC " unloaded\n");
> + platform_driver_unregister(&omapl_pru_can_driver);
> +}
> +
> +module_exit(omapl_pru_can_exit);
> +
> +MODULE_AUTHOR("Subhasish Ghosh <subhasish-EvXpCiN+lbve9wHmmfpqLFaTQe2KTcn/@public.gmane.org>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("omapl pru CAN netdevice driver");
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can_api.c b/drivers/net/can/da8xx_pruss/pruss_can_api.c
> new file mode 100644
> index 0000000..2f7438a
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can_api.c
> @@ -0,0 +1,1227 @@
> +/*
> + * Copyright (C) 2010 Texas Instruments Incorporated
> + * Author: Wilfred Felix
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation version 2.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
> + * whether express or implied; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include "pruss_can_api.h"
> +
> +static can_emu_drv_inst gstr_can_inst[ecanmaxinst];
> +
> +/*
> + * pru_can_set_brp() Updates the BRP register of PRU0
> + * and PRU1 of OMAP L138. This API will be called by the
> + * Application to updtae the BRP register of PRU0 and PRU1
> + *
> + * param u16bitrateprescaler The can bus bitrate
> + * prescaler value be set
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_set_brp(struct device *dev, u16 u16bitrateprescaler)
> +{
> +
> + u32 u32offset;
> +
> + if (u16bitrateprescaler > 255) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_CLOCK_BRP_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u16bitrateprescaler, 1);
> +
> + u32offset = (PRU_CAN_TX_CLOCK_BRP_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u16bitrateprescaler, 1);
> +
> + return 0;
> +
> +}
> +
> +/*
> + * pru_can_set_bit_timing() Updates the timing register
> + * of PRU0 and PRU1 of OMAP L138. This API will be called by
> + * the Application to updtae the timing register of PRU0 and PRU1
> + *
> + * param pstrbittiming Pointer to structure holding
> + * the bit timing values for can bus.
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_set_bit_timing(struct device *dev,
> + can_bit_timing_consts *pstrbittiming)
> +{
> +
> + u32 u32offset;
> + u32 u32serregister;
> +
> + u32serregister = 0;
> +
> + if (pstrbittiming == NULL) {
> + return -1;
> + }
> +
> + if ((pstrbittiming->u8syncjumpwidth > PRU_CAN_MAX_SJW) ||
> + (pstrbittiming->u8phseg1 > PRU_CAN_MAX_PHSEG1) ||
> + (pstrbittiming->u8phseg2 > PRU_CAN_MAX_PHSEG2)) {
> + return -1;
> + }
> +
> + u32serregister = u32serregister |
> + ((pstrbittiming->u8syncjumpwidth << 7) |
> + (pstrbittiming->u8phseg1 << 3) |
> + (pstrbittiming->u8phseg2));
> +
> + u32offset = (PRU_CAN_TX_TIMING_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u32serregister, 1);
> +
> + u32offset = (PRU_CAN_RX_TIMING_REGISTER);
> + pruss_writel(dev, u32offset, (u32 *) &u32serregister, 1);
> +
> + return 0;
> +}
> +
> +
> +/*
> + * pru_can_calc_timing()
> + * Updates the timing values of PRU0 and PRU1 of OMAP L138.
> + * This API will be called by the
> + * Application to updtae the timing values of PRU0 and PRU1
> + *
> + * return SUCCESS or FAILURE
> + */
> +
> +s16 pru_can_calc_timing(struct device *dev, u32 pru_freq, u32 bit_rate)
> +{
> + u16 u16phaseseg1;
> + u16 u16phaseseg2;
> + u32 u32offset;
> + u32 u32timing_value;
> + u32 u32setup_value;
> + u32timing_value = TIMER_CLK_FREQ / bit_rate;
> + u32offset = (PRU_CAN_TIMING_VAL_TX);
> + pruss_writel(dev, u32offset, (u32 *) &u32timing_value, 4);
> + pruss_readl(dev, u32offset, (u32 *) &u32timing_value, 4);
> + u32setup_value =
> + (GPIO_SETUP_DELAY * (pru_freq / 1000000) / 1000) /
> + DELAY_LOOP_LENGTH;
> + u32offset = (PRU_CAN_TIMING_VAL_TX_SJW);
> + pruss_writel(dev, u32offset, (u32 *) &u32setup_value, 4);
> + u16phaseseg1 = (u16) (u32timing_value / 2);
> + u16phaseseg2 = u32timing_value - u16phaseseg1;
> + u16phaseseg1 -= TIMER_SETUP_DELAY;
> + u16phaseseg2 -= TIMER_SETUP_DELAY;
> + u32setup_value = (u16phaseseg1 << 16) | u16phaseseg2;
> + u32offset = (PRU_CAN_TIMING_VAL_RX);
> + pruss_writel(dev, u32offset, (u32 *) &u32setup_value, 4);
> + u32offset = (PRU_CAN_TIMING_VAL_RX + 4);
> + pruss_writel(dev, u32offset, (u32 *) &u32timing_value, 4);
> +
> + return 0;
> +}
Why can't you use the common Socket-CAN bit-timing infrastructure.
> +/*
> + * pru_can_write_data_to_mailbox()
> + * Updates the transmit mailboxes of PRU1 of OMAP L138.
> + * This API will be called by the Application to update
> + * the transmit mailboxes of PRU1
> + *
> + * param pu16canframedata Can mailbox data buffer
> + *
> + * param u8mailboxnum Mailbox to be updated
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_write_data_to_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + s16 s16subrtnretval;
> + u32 u32offset;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + switch ((u8) pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7);
> + break;
> + default:
> + return -1;
> + }
There are more efficient ways to implemet that, e.g. by using an array.
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &(pstremuapphndl->strcanmailbox), 4);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_data_from_mailbox()
> + * Receive data from the receive mailboxes of PRU0 of OMAP L138.
> + * This API will be called by the Application to get data from
> + * the receive mailboxes of PRU0
> + *
> + * param pu16canframedata Can mailbox data buffer
> + *
> + * param u8mailboxnum Mailbox to be updated
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_data_from_mailbox(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + s16 s16subrtnretval;
> + u32 u32offset;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + switch ((u8) pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7);
> + break;
> + case 8:
> + u32offset = (PRU_CAN_RX_MAILBOX8);
> + break;
> + default:
> + return -1;
> + }
Ditto.
> + s16subrtnretval =
> + pruss_readl(dev, u32offset,
> + (u32 *) &(pstremuapphndl->strcanmailbox),
> + 4);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +/*
> + * pru_can_receive_id_map()
> + * Receive mailboxes ID Mapping of PRU0 of OMAP L138.
> + * This API will be called by the Application
> + * to map the IDs to receive mailboxes of PRU0
> + *
> + * param u32nodeid Can node ID
> + *
> + * param ecanmailboxno Mailbox to be mapped
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_rx_id_map(struct device *dev, u32 u32nodeid,
> + can_mailbox_number ecanmailboxno)
> +{
> +
> + pruss_writel(dev, (PRU_CAN_ID_MAP +
> + (((u8) ecanmailboxno) * 4)), (u32 *) &u32nodeid, 1);
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_intr_status()
> + * Gets the interrupts status register value.
> + * This API will be called by the Application
> + * to get the interrupts status register value
> + *
> + * param u8prunumber PRU number for which IntStatusReg
> + * has to be read
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_intr_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + s16 s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + u32offset = (PRU_CAN_TX_INTERRUPT_STATUS_REGISTER);
> + } else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER);
> + } else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32interruptstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_global_status() Gets the globalstatus
> + * register value. This API will be called by the Application
> + * to get the global status register value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_global_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + int s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + } else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + } else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32globalstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_get_mailbox_status() Gets the mailbox status
> + * register value. This API will be called by the Application
> + * to get the mailbox status register value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_get_mailbox_status(struct device *dev,
> + can_emu_app_hndl *pstremuapphndl)
> +{
> + u32 u32offset;
> + s16 s16subrtnretval = -1;
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_1) {
> + switch (pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER);
> + break;
> + default:
> + return -1;
> + }
> + }
> +
> + else if (pstremuapphndl->u8prunumber == DA8XX_PRUCORE_0) {
> + switch (pstremuapphndl->ecanmailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER);
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER);
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER);
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER);
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER);
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER);
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER);
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER);
> + break;
> + case 8:
> + u32offset = (PRU_CAN_RX_MAILBOX8_STATUS_REGISTER);
> + break;
> + default:
> + return -1;
> + }
> + }
> +
> + else {
> + return -1;
> + }
> +
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &pstremuapphndl->u32mailboxstatus, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +s16 pru_can_tx_mode_set(struct device *dev, bool btransfer_flag,
> + can_transfer_direction ecan_trx)
> +{
> + u32 u32offset;
> + u32 u32value;
> +
> + if (ecan_trx == ecantransmit) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + pruss_readl(dev, u32offset, &u32value, 1);
> + if (btransfer_flag == true) {
> + u32value &= 0x1F;
> + u32value |= 0x80;
> + } else {
> + u32value &= 0x7F;
> + }
> + pruss_writel(dev, u32offset, &u32value, 1);
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + pruss_writel(dev, u32offset, &u32value, 1);
> + } else if (ecan_trx == ecanreceive) {
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER);
> + pruss_readl(dev, u32offset, &u32value, 1);
> + if (btransfer_flag == true) {
> + u32value &= 0x1F;
> + u32value |= 0x40;
> + } else {
> + u32value &= 0xBF;
> + }
> + pruss_writel(dev, u32offset, &u32value, 1);
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER);
> + pruss_writel(dev, u32offset, &u32value, 1);
> + } else
> + return -1;
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_config_mode_set() Sets the timing value
> + * for data transfer. This API will be called by the Application
> + * to set timing valus for data transfer
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_config_mode_set(struct device *dev, bool bconfigmodeflag)
> +{
> +
> + u32 u32bitrateprescaler;
> + u32 u32canbittiming;
> +
> + pruss_readl(dev, (PRU_CAN_TX_CLOCK_BRP_REGISTER),
> + (u32 *) &u32bitrateprescaler, 1);
> + pruss_readl(dev, (PRU_CAN_TX_TIMING_REGISTER),
> + (u32 *) &u32canbittiming, 1);
> +
> + if (bconfigmodeflag == 1) {
> + pru_can_calc_timing(dev, u32canbittiming, u32bitrateprescaler);
> + }
> +
> + else {
> + pru_can_calc_timing(dev, 0, 0);
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * pru_can_emu_init() Initializes the Can
> + * Emulation Parameters. This API will be called by the Application
> + * to Initialize the Can Emulation Parameters
> + *
> + * param u32pruclock PRU Clock value
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_init(struct device *dev, u32 u32pruclock)
> +{
> + u32 u32offset;
> + u32 u32value;
> + s16 s16subrtnretval = -1;
> + u8 u8loop;
> +
> + for (u8loop = 0; u8loop < (u8) ecanmaxinst; u8loop++) {
> + gstr_can_inst[u8loop].bcaninststate = (bool) 0;
> + gstr_can_inst[u8loop].ecantransferdirection =
> + (can_transfer_direction) 0;
> + gstr_can_inst[u8loop].u32apphandlerptr = 0;
> + }
> +
> + u32offset = (PRU_CAN_TX_GLOBAL_CONTROL_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_INTERRUPT_MASK_REGISTER & 0xFFFF);
> + u32value = 0x00004000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval =
> + pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000001;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_TIMING_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_CLOCK_BRP_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_TX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_POLARITY0 & 0xFFFF);
> + u32value = 0xFFFFFFFF;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_POLARITY1 & 0xFFFF);
> + u32value = 0xFFFFFFFF;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_TYPE0 & 0xFFFF);
> + u32value = 0x1C000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_TYPE1 & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HSTINTENIDXCLR & 0xFFFF);
> + u32value = 0x0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_GLBLEN & 0xFFFF);
> + u32value = 0x1;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + /* tx intr map arm->pru */
> + u32offset = (PRUSS_INTC_HSTINTENIDXSET & 0xFFFF);
> + u32value = 0x0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP0 & 0xFFFF);
> + u32value = 0x03020100;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP1 & 0xFFFF);
> + u32value = 0x07060504;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTMAP2 & 0xFFFF);
> + u32value = 0x0000908;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_CHANMAP0 & 0xFFFF);
> + u32value = 0;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_CHANMAP8 & 0xFFFF);
> + u32value = 0x00020200;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 19;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 19;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 18;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 18;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 34;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 34;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRUSS_INTC_HOSTINTEN & 0xFFFF);
> + u32value = 0x5;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> +/* PRU0 - Rx Internal Registers Initializations */
> +
> + u32offset = (PRU_CAN_RX_GLOBAL_CONTROL_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_GLOBAL_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000040;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_MASK_REGISTER & 0xFFFF);
> + u32value = 0x00004000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x0000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_ERROR_COUNTER_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_TIMING_REGISTER & 0xFFFF);
> + u32value = 0x0000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + u32offset = (PRU_CAN_RX_CLOCK_BRP_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset, (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
Above I realize a lot of duplicated code. Could be handled by an array
more efficiently, I believe.
> + return 0;
> +}
> +
> +
> +/*
> + * pru_can_emu_open() Opens the can emu for
> + * application to use. This API will be called by the Application
> + * to Open the can emu for application to use.
> + *
> + * param pstremuapphndl Pointer to application handler
> + * structure
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_open(struct device *dev, can_emu_app_hndl *pstremuapphndl)
> +{
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> +
> + if (gstr_can_inst[pstremuapphndl->ecaninstance].bcaninststate == 1) {
> + return -1;
> + }
> +
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].
> + bcaninststate = (bool)1;
> + gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].ecantransferdirection =
> + (can_transfer_direction)(u8)pstremuapphndl->ecantransferdirection;
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].
> + u32apphandlerptr = (u32) pstremuapphndl;
> +
> + return 0;
> +}
> +
> +
> +/*
> + * brief pru_can_emu_close() Closes the can emu for other
> + * applications to use. This API will be called by the Application to Close
> + * the can emu for other applications to use
> + *
> + * param pstremuapphndl Pointer to application handler structure
> + *
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_close(struct device *dev, can_emu_app_hndl *pstremuapphndl)
> +{
> +
> + if (pstremuapphndl == NULL) {
> + return -1;
> + }
> + if (gstr_can_inst[pstremuapphndl->ecaninstance].bcaninststate == 0) {
> + return -1;
> + }
> + if ((u32) pstremuapphndl != gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].u32apphandlerptr){
> + return -1;
> + }
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].bcaninststate
> + = (bool) 0;
> + gstr_can_inst[(u8) pstremuapphndl->
> + ecaninstance].ecantransferdirection = (can_transfer_direction) 0;
> + gstr_can_inst[(u8) pstremuapphndl->ecaninstance].u32apphandlerptr = 0;
> +
> + return 0;
> +}
> +
> +/*
> + * brief pru_can_emu_exit() Diables all the PRUs
> + * This API will be called by the Application to disable all PRUs
> + * param None
> + * return SUCCESS or FAILURE
> + */
> +s16 pru_can_emu_exit(struct device *dev)
> +{
> + s16 s16subrtnretval;
> +
> + s16subrtnretval = pruss_disable(dev, CAN_RX_PRU_0);
> + if (s16subrtnretval == -1)
> + return -1;
> + s16subrtnretval = pruss_disable(dev, CAN_TX_PRU_1);
> + if (s16subrtnretval == -1)
> + return -1;
> +
> + return 0;
> +}
> +
> +s16 pru_can_emu_sreset(struct device *dev)
> +{
> + return 0;
> +}
> +
> +s16 pru_can_tx(struct device *dev, u8 u8mailboxnumber, u8 u8prunumber)
> +{
> + u32 u32offset = 0;
> + u32 u32value = 0;
> + s16 s16subrtnretval = -1;
> +
> + if (DA8XX_PRUCORE_1 == u8prunumber) {
> + switch (u8mailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_TX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 1:
> + u32offset = (PRU_CAN_TX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 2:
> + u32offset = (PRU_CAN_TX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 3:
> + u32offset = (PRU_CAN_TX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 4:
> + u32offset = (PRU_CAN_TX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 5:
> + u32offset = (PRU_CAN_TX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 6:
> + u32offset = (PRU_CAN_TX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 7:
> + u32offset = (PRU_CAN_TX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000080;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + default:
> + return -1;
> + }
> + } else {
> +
> + u32offset = (PRU_CAN_RX_INTERRUPT_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_readl(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + u32value = u32value & ~(1 << u8mailboxnumber);
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> +
> + switch (u8mailboxnumber) {
> + case 0:
> + u32offset = (PRU_CAN_RX_MAILBOX0_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 1:
> + u32offset = (PRU_CAN_RX_MAILBOX1_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 2:
> + u32offset = (PRU_CAN_RX_MAILBOX2_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 3:
> + u32offset = (PRU_CAN_RX_MAILBOX3_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 4:
> + u32offset = (PRU_CAN_RX_MAILBOX4_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 5:
> + u32offset = (PRU_CAN_RX_MAILBOX5_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 6:
> + u32offset = (PRU_CAN_RX_MAILBOX6_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + case 7:
> + u32offset = (PRU_CAN_RX_MAILBOX7_STATUS_REGISTER & 0xFFFF);
> + u32value = 0x00000000;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + break;
> + default:
> + return -1;
> + }
Ditto.
> + }
> + return 0;
> +}
> +
> +s16 pru_can_start_abort_tx(struct device *dev, bool bcantransmitabortflag)
> +{
> + u32 u32offset;
> + u32 u32value;
> + s16 s16subrtnretval;
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> +
> + u32offset = (PRUSS_INTC_ENIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> +
> + u32offset = (PRUSS_INTC_STATIDXSET & 0xFFFF);
> + u32value = 32;
> + s16subrtnretval = pruss_writel(dev, u32offset,
> + (u32 *) &u32value, 1);
> + if (s16subrtnretval == -1) {
> + return -1;
> + }
> + return 0;
> +}
> +
> +s16 pru_can_mask_ints(struct device *dev, u32 int_mask)
> +{
> + return 0;
> +}
> +
> +int pru_can_get_error_cnt(struct device *dev, u8 u8prunumber)
> +{
> + return 0;
> +}
> +
> +int pru_can_get_intc_status(struct device *dev)
> +{
> + u32 u32offset = 0;
> + u32 u32getvalue = 0;
> + u32 u32clrvalue = 0;
> +
> + u32offset = (PRUSS_INTC_STATCLRINT1 & 0xFFFF);
> + pruss_readl(dev, u32offset, (u32 *) &u32getvalue, 1);
> +
> + if (u32getvalue & 4)
> + u32clrvalue = 34; /* CLR Event 34 */
> +
> + if (u32getvalue & 2)
> + u32clrvalue = 33; /* CLR Event 33 */
> +
> + if (u32clrvalue) {
> + u32offset = (PRUSS_INTC_STATIDXCLR & 0xFFFF);
> + pruss_writel(dev, u32offset, &u32clrvalue, 1);
> + } else
> + return -1;
> +
> + return u32getvalue;
> +}
> diff --git a/drivers/net/can/da8xx_pruss/pruss_can_api.h b/drivers/net/can/da8xx_pruss/pruss_can_api.h
> new file mode 100644
> index 0000000..7550456
> --- /dev/null
> +++ b/drivers/net/can/da8xx_pruss/pruss_can_api.h
> @@ -0,0 +1,290 @@
> +/*
> + * Copyright (C) 2010 Texas Instruments Incorporated
> + * Author: Ganeshan N
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation version 2.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
> + * whether express or implied; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _PRU_CAN_API_H_
> +#define _PRU_CAN_API_H_
> +
> +#include <linux/types.h>
> +#include <linux/mfd/pruss/da8xx_pru.h>
> +
> +
> +#define CAN_BIT_TIMINGS (0x273)
> +
> +/* Timer Clock is sourced from DDR freq (PLL1 SYS CLK 2) */
> +#define TIMER_CLK_FREQ 132000000
> +
> +#define TIMER_SETUP_DELAY 14
> +#define GPIO_SETUP_DELAY 150
> +
> +#define CAN_RX_PRU_0 PRUSS_NUM0
> +#define CAN_TX_PRU_1 PRUSS_NUM1
> +
> +/* Number of Instruction in the Delay loop */
> +#define DELAY_LOOP_LENGTH 2
> +
> +#define PRU1_BASE_ADDR 0x2000
> +
> +#define PRU_CAN_TX_GLOBAL_CONTROL_REGISTER (PRU1_BASE_ADDR)
> +#define PRU_CAN_TX_GLOBAL_STATUS_REGISTER (PRU1_BASE_ADDR + 0x04)
> +#define PRU_CAN_TX_INTERRUPT_MASK_REGISTER (PRU1_BASE_ADDR + 0x08)
> +#define PRU_CAN_TX_INTERRUPT_STATUS_REGISTER (PRU1_BASE_ADDR + 0x0C)
> +#define PRU_CAN_TX_MAILBOX0_STATUS_REGISTER (PRU1_BASE_ADDR + 0x10)
> +#define PRU_CAN_TX_MAILBOX1_STATUS_REGISTER (PRU1_BASE_ADDR + 0x14)
> +#define PRU_CAN_TX_MAILBOX2_STATUS_REGISTER (PRU1_BASE_ADDR + 0x18)
> +#define PRU_CAN_TX_MAILBOX3_STATUS_REGISTER (PRU1_BASE_ADDR + 0x1C)
> +#define PRU_CAN_TX_MAILBOX4_STATUS_REGISTER (PRU1_BASE_ADDR + 0x20)
> +#define PRU_CAN_TX_MAILBOX5_STATUS_REGISTER (PRU1_BASE_ADDR + 0x24)
> +#define PRU_CAN_TX_MAILBOX6_STATUS_REGISTER (PRU1_BASE_ADDR + 0x28)
> +#define PRU_CAN_TX_MAILBOX7_STATUS_REGISTER (PRU1_BASE_ADDR + 0x2C)
> +#define PRU_CAN_TX_ERROR_COUNTER_REGISTER (PRU1_BASE_ADDR + 0x30)
> +#define PRU_CAN_TX_TIMING_REGISTER (PRU1_BASE_ADDR + 0x34)
> +#define PRU_CAN_TX_CLOCK_BRP_REGISTER (PRU1_BASE_ADDR + 0x38)
> +
> +#define PRU_CAN_TX_MAILBOX0 (PRU1_BASE_ADDR + 0x40)
> +#define PRU_CAN_TX_MAILBOX1 (PRU1_BASE_ADDR + 0x50)
> +#define PRU_CAN_TX_MAILBOX2 (PRU1_BASE_ADDR + 0x60)
> +#define PRU_CAN_TX_MAILBOX3 (PRU1_BASE_ADDR + 0x70)
> +#define PRU_CAN_TX_MAILBOX4 (PRU1_BASE_ADDR + 0x80)
> +#define PRU_CAN_TX_MAILBOX5 (PRU1_BASE_ADDR + 0x90)
> +#define PRU_CAN_TX_MAILBOX6 (PRU1_BASE_ADDR + 0xA0)
> +#define PRU_CAN_TX_MAILBOX7 (PRU1_BASE_ADDR + 0xB0)
> +
> +#define PRU_CAN_TIMING_VAL_TX (PRU1_BASE_ADDR + 0xC0)
> +#define PRU_CAN_TIMING_VAL_TX_SJW (PRU1_BASE_ADDR + 0xC4)
> +#define PRU_CAN_TRANSMIT_FRAME (PRU1_BASE_ADDR + 0xE0)
> +
> +#define PRU0_BASE_ADDR 0
> +
> +#define PRU_CAN_RX_GLOBAL_CONTROL_REGISTER (PRU0_BASE_ADDR)
> +#define PRU_CAN_RX_GLOBAL_STATUS_REGISTER (PRU0_BASE_ADDR + 0x04)
> +#define PRU_CAN_RX_INTERRUPT_MASK_REGISTER (PRU0_BASE_ADDR + 0x08)
> +#define PRU_CAN_RX_INTERRUPT_STATUS_REGISTER (PRU0_BASE_ADDR + 0x0C)
> +#define PRU_CAN_RX_MAILBOX0_STATUS_REGISTER (PRU0_BASE_ADDR + 0x10)
> +#define PRU_CAN_RX_MAILBOX1_STATUS_REGISTER (PRU0_BASE_ADDR + 0x14)
> +#define PRU_CAN_RX_MAILBOX2_STATUS_REGISTER (PRU0_BASE_ADDR + 0x18)
> +#define PRU_CAN_RX_MAILBOX3_STATUS_REGISTER (PRU0_BASE_ADDR + 0x1C)
> +#define PRU_CAN_RX_MAILBOX4_STATUS_REGISTER (PRU0_BASE_ADDR + 0x20)
> +#define PRU_CAN_RX_MAILBOX5_STATUS_REGISTER (PRU0_BASE_ADDR + 0x24)
> +#define PRU_CAN_RX_MAILBOX6_STATUS_REGISTER (PRU0_BASE_ADDR + 0x28)
> +#define PRU_CAN_RX_MAILBOX7_STATUS_REGISTER (PRU0_BASE_ADDR + 0x2C)
> +#define PRU_CAN_RX_MAILBOX8_STATUS_REGISTER (PRU0_BASE_ADDR + 0x30)
> +#define PRU_CAN_RX_ERROR_COUNTER_REGISTER (PRU0_BASE_ADDR + 0x34)
> +#define PRU_CAN_RX_TIMING_REGISTER (PRU0_BASE_ADDR + 0x38)
> +#define PRU_CAN_RX_CLOCK_BRP_REGISTER (PRU0_BASE_ADDR + 0x3C)
> +
> +#define PRU_CAN_RX_MAILBOX0 (PRU0_BASE_ADDR + 0x40)
> +#define PRU_CAN_RX_MAILBOX1 (PRU0_BASE_ADDR + 0x50)
> +#define PRU_CAN_RX_MAILBOX2 (PRU0_BASE_ADDR + 0x60)
> +#define PRU_CAN_RX_MAILBOX3 (PRU0_BASE_ADDR + 0x70)
> +#define PRU_CAN_RX_MAILBOX4 (PRU0_BASE_ADDR + 0x80)
> +#define PRU_CAN_RX_MAILBOX5 (PRU0_BASE_ADDR + 0x90)
> +#define PRU_CAN_RX_MAILBOX6 (PRU0_BASE_ADDR + 0xA0)
> +#define PRU_CAN_RX_MAILBOX7 (PRU0_BASE_ADDR + 0xB0)
> +#define PRU_CAN_RX_MAILBOX8 (PRU0_BASE_ADDR + 0xC0)
> +
> +#define PRU_CAN_TIMING_VAL_RX (PRU0_BASE_ADDR + 0xD0)
> +#define PRU_CAN_RECEIVE_FRAME (PRU0_BASE_ADDR + 0xD4)
> +#define PRU_CAN_ID_MAP (PRU0_BASE_ADDR + 0xF0)
Please consider using a struct to define the register layout. This would
make you code much much more readable and compact:
writel(®s->brp_register, bitrateprescaler);
instead of:
u32offset = (PRU_CAN_TX_CLOCK_BRP_REGISTER);
pruss_writel(dev, u32offset, (u32 *) &u16bitrateprescaler, 1);
> +#define PRU_CAN_ERROR_ACTIVE 128
> +
> +#define CAN_ACK_FAILED 0xE
> +#define CAN_ARBTR_FAIL 0xD
> +#define CAN_BIT_ERROR 0xC
> +#define CAN_TRANSMISSION_SUCCESS 0xA
> +
> +#define STD_DATA_FRAME 0x1
> +#define EXTD_DATA_FRAME 0x2
> +#define STD_REMOTE_FRAME 0x3
> +#define EXTD_REMOTE_FRAME 0x4
> +
> +#define PRU_CAN_MAX_SJW 8
> +#define PRU_CAN_MAX_PHSEG1 25
> +#define PRU_CAN_MAX_PHSEG2 25
> +
> +#define DA8XX_PRUCANCORE_0_REGS 0x7000
> +#define DA8XX_PRUCANCORE_1_REGS 0x7800
> +#define PRU0_PROG_RAM_START_OFFSET 0x8000
> +#define PRU1_PROG_RAM_START_OFFSET 0xC000
> +#define PRU_CAN_INIT_MAX_TIMEOUT 0xFF
> +
> +typedef enum {
> + ecaninst0 = 0,
> + ecaninst1,
> + ecanmaxinst
> +} can_instance_enum;
> +
> +typedef enum {
> + ecanmailbox0 = 0,
> + ecanmailbox1,
> + ecanmailbox2,
> + ecanmailbox3,
> + ecanmailbox4,
> + ecanmailbox5,
> + ecanmailbox6,
> + ecanmailbox7
> +} can_mailbox_number;
> +
> +typedef enum {
> + ecandirectioninit = 0,
> + ecantransmit,
> + ecanreceive
> +} can_transfer_direction;
> +
> +typedef struct {
> + u16 u16extendedidentifier;
> + u16 u16baseidentifier;
> + u8 u8data7;
> + u8 u8data6;
> + u8 u8data5;
> + u8 u8data4;
> + u8 u8data3;
> + u8 u8data2;
> + u8 u8data1;
> + u8 u8data0;
> + u16 u16datalength;
> + u16 u16crc;
> +} can_mail_box_structure;
> +
> +typedef struct {
> + can_transfer_direction ecantransferdirection;
> +} can_mailbox_config;
> +
> +typedef struct {
> + can_instance_enum ecaninstance;
> + can_transfer_direction ecantransferdirection;
> + can_mail_box_structure strcanmailbox;
> + can_mailbox_number ecanmailboxnumber;
> + u8 u8prunumber;
> + u32 u32globalstatus;
> + u32 u32interruptstatus;
> + u32 u32mailboxstatus;
> +} can_emu_app_hndl;
> +
> +typedef struct {
> + bool bcaninststate;
> + can_transfer_direction ecantransferdirection;
> + u32 u32apphandlerptr;
> +} can_emu_drv_inst;
> +
> +typedef struct {
> + u8 u8syncjumpwidth;
> + u8 u8phseg1;
> + u8 u8phseg2;
> +} can_bit_timing_consts;
Don't use typedef's!
Thanks.
Wolfgang.
^ permalink raw reply
* Re: [PATCH 0/3] Net driver fixes related to power management
From: David Miller @ 2011-02-11 19:39 UTC (permalink / raw)
To: rjw
Cc: netdev, mcarlson, mchan, linux-pm, thomas, jcliburn, chris.snook,
jie.yang
In-Reply-To: <201102101751.56508.rjw@sisk.pl>
From: "Rafael J. Wysocki" <rjw@sisk.pl>
Date: Thu, 10 Feb 2011 17:51:56 +0100
> The following series of patches fix minor issues related to power management
> in the tg3, alt1 and atl1c drivers.
>
> [1/3] - tg3: Don't use device_init_wakeup() (PCI does that)
> [2/3] - atl1c: Don't use device_init_wakeup() (ditto)
> [3/3] - atl1: Don't use legacy PCI power management.
>
> Please consider for applying.
All applied to net-next-2.6, thank you.
^ permalink raw reply
* [PATCH 2/2 v2] network: Allow af_packet to transmit +4 bytes for VLAN packets.
From: greearb @ 2011-02-11 19:35 UTC (permalink / raw)
To: netdev; +Cc: Ben Greear
From: Ben Greear <greearb@candelatech.com>
This allows user-space to send a '1500' MTU VLAN packet on a
1500 MTU ethernet frame. The extra 4 bytes of a VLAN header is
not usually charged against the MTU when other parts of the
network stack is transmitting vlans...
Signed-off-by: Ben Greear <greearb@candelatech.com>
---
v2: Fix ETH_HLEN to be VLAN_HLEN
:100644 100644 91cb1d7... eb39d70... M net/packet/af_packet.c
net/packet/af_packet.c | 31 +++++++++++++++++++++++++++++--
1 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 91cb1d7..eb39d70 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -466,7 +466,7 @@ retry:
*/
err = -EMSGSIZE;
- if (len > dev->mtu + dev->hard_header_len)
+ if (len > dev->mtu + dev->hard_header_len + VLAN_HLEN)
goto out_unlock;
if (!skb) {
@@ -497,6 +497,19 @@ retry:
goto retry;
}
+ if (len > (dev->mtu + dev->hard_header_len)) {
+ /* Earlier code assumed this would be a VLAN pkt,
+ * double-check this now that we have the actual
+ * packet in hand.
+ */
+ struct ethhdr *ehdr;
+ skb_reset_mac_header(skb);
+ ehdr = eth_hdr(skb);
+ if (ehdr->h_proto != htons(ETH_P_8021Q)) {
+ err = -EMSGSIZE;
+ goto out_unlock;
+ }
+ }
skb->protocol = proto;
skb->dev = dev;
@@ -1200,7 +1213,7 @@ static int packet_snd(struct socket *sock,
}
err = -EMSGSIZE;
- if (!gso_type && (len > dev->mtu+reserve))
+ if (!gso_type && (len > dev->mtu + reserve + VLAN_HLEN))
goto out_unlock;
err = -ENOBUFS;
@@ -1225,6 +1238,20 @@ static int packet_snd(struct socket *sock,
if (err < 0)
goto out_free;
+ if (!gso_type && (len > dev->mtu + reserve)) {
+ /* Earlier code assumed this would be a VLAN pkt,
+ * double-check this now that we have the actual
+ * packet in hand.
+ */
+ struct ethhdr *ehdr;
+ skb_reset_mac_header(skb);
+ ehdr = eth_hdr(skb);
+ if (ehdr->h_proto != htons(ETH_P_8021Q)) {
+ err = -EMSGSIZE;
+ goto out_free;
+ }
+ }
+
skb->protocol = proto;
skb->dev = dev;
skb->priority = sk->sk_priority;
--
1.7.2.3
^ permalink raw reply related
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