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* Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: Robin Holt @ 2011-08-09 13:17 UTC (permalink / raw)
  To: Wolfgang Grandegger
  Cc: Robin Holt, U Bhaskar-B22300, socketcan-core@lists.berlios.de,
	netdev@vger.kernel.org, Devicetree-discuss@lists.ozlabs.org,
	Marc Kleine-Budde
In-Reply-To: <4E413036.5080207@grandegger.com>

On Tue, Aug 09, 2011 at 03:03:50PM +0200, Wolfgang Grandegger wrote:
> On 08/09/2011 02:49 PM, Robin Holt wrote:
> > On Tue, Aug 09, 2011 at 12:41:39PM +0000, U Bhaskar-B22300 wrote:
> >>
> >>
> >>> -----Original Message-----
> >>> From: Wolfgang Grandegger [mailto:wg@grandegger.com]
> >>> Sent: Tuesday, August 09, 2011 4:19 PM
> >>> To: U Bhaskar-B22300
> >>> Cc: Marc Kleine-Budde; socketcan-core@lists.berlios.de;
> >>> netdev@vger.kernel.org; Devicetree-discuss@lists.ozlabs.org
> >>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> >>>
> >>> On 08/09/2011 11:27 AM, U Bhaskar-B22300 wrote:
> >>>>
> >>>>
> >>>>> -----Original Message-----
> >>>>> From: Wolfgang Grandegger [mailto:wg@grandegger.com]
> >>>>> Sent: Tuesday, August 09, 2011 2:03 PM
> >>>>> To: U Bhaskar-B22300
> >>>>> Cc: Marc Kleine-Budde; socketcan-core@lists.berlios.de;
> >>>>> netdev@vger.kernel.org; Devicetree-discuss@lists.ozlabs.org
> >>>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> >>>>>
> >>>>> Hi Bhaskar,
> >>>>>
> >>>>> On 08/09/2011 09:57 AM, U Bhaskar-B22300 wrote:
> >>>>>>
> >>>>>>
> >>>>>>> -----Original Message-----
> >>>>>>> From: Marc Kleine-Budde [mailto:mkl@pengutronix.de]
> >>>>>>> Sent: Tuesday, August 09, 2011 12:23 AM
> >>>>>>> To: Wolfgang Grandegger
> >>>>>>> Cc: socketcan-core@lists.berlios.de; netdev@vger.kernel.org; U
> >>>>>>> Bhaskar- B22300
> >>>>>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> >>>>>>>
> >>>>>>> On 08/08/2011 05:33 PM, Wolfgang Grandegger wrote:
> >>>>>>>>> ACK - The device tree bindings as in mainline's Documentation is
> >>>>>>>>> a
> >>>>>>> mess.
> >>>>>>>>> If the powerpc guys are happy with a clock interfaces based
> >>>>>>>>> approach somewhere in arch/ppc, I'm more than happy to remove:
> >>>>>>>>> - fsl,flexcan-clock-source (not implemented, even in the fsl
> >>>>>>>>> driver)
> >>>>>> [Bhaskar]I have pushed the FlexCAN series of patches, It contains
> >>>>>> the usage of all the fields posted in the FlexCAN bindings at
> >>>>>> http://git.kernel.org/?p=linux/kernel/git/stable/linux-3.0.y.git;a=b
> >>>>>> lo
> >>>>>> b;f=Documentation/devicetree/bindings/net/can/fsl-flexcan.txt;h=1a72
> >>>>>> 9f
> >>>>>> 089866259ef82d0db5893ff7a8c54d5ccf;hb=94ed5b4788a7cdbe68bc7cb8516972
> >>>>>> cb
> >>>>>> ebdc8274
> >>>>>
> >>>>> As Marc already pointed out, Robin already has a much more advanced
> >>>>> patch stack in preparation. Especially your patches do not care about
> >>>>> the already existing Flexcan core on the Freescale's ARM socks.
> >>>> [Bhaskar] No, the patches are taking care of the existing ARM
> >>> functionality.
> >>>> 	I have not tested on the ARM based board, but the patches are made
> >>> in a
> >>>>       Manner that it should not break the ARM based functionality.
> >>>>>
> >>>>>>>>>
> >>>>>>>>> - fsl,flexcan-clock-divider \__ replace with code in arch/ppc, or
> >>>>>>>>> - clock-frequency           /   a single clock-frequency attribute
> >>>>>>>>
> >>>>>>>> In the "net-next-2.6" tree there is also:
> >>>>>>>>
> >>>>>>>>  $ grep flexcan arch/powerpc/boots/dts/*.dts
> >>>>>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> >>>>> "platform";
> >>>>>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> >>>>> "platform";
> >>>>>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> >>>>>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> >>>>>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> >>>>>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> >>>>>>>>
> >>>>>>>> Especially the fsl,flexcan-clock-divider = <2>; might make people
> >>>>>>>> think, that they could set something else.
> >>>>>>>
> >>>>>> [Bhaskar] As it is mentioned in the Flexcan bindings, the need of
> >>>>> fsl,flexcan-clock-divider = <2>;
> >>>>>> 	    But I kept it as "2" because FlexCan clock source is the
> >>>>> platform clock and it is CCB/2
> >>>>>> 	    If the "2" is misleading, the bindings can be changed or some
> >>>>> text can be written to make the meaning of "2"
> >>>>>>           Understandable , Please suggest ..
> >>>>>
> >>>>> The clock source and frequency is fixed. Why do we need an extra
> >>>>> properties for that. We have panned to remove these bogus bindings
> >>>>> from the Linux kernel, which sneaked in *without* any review on the
> >>>>> relevant mailing lists (at least I have not realized any posting). We
> >>>>> do not think they are really needed. They just confuse the user. We
> >>>>> also prefer to use the compatibility string "fsl,flexcan" instead
> >>>>> "fsl,flexcan-v1.0". It's unusual to add a version number, which is
> >>>>> for the Flexcan on the PowerPC cores only, I assume, but there will
> >>>>> be device tree for ARM soon. A proper compatibility string would be
> >>>>> "fsl,p1010-flexcan" if we really need to distinguish.
> >>>>>
> >>>> [Bhaskar] About clock source.. There can be two sources of clock for
> >>> the CAN.
> >>>> 	Oscillator or the platform clock, but at present only platform
> >>> clock is supported
> >>>> 	in P1010.If we remove the fsl,flexcan-clock-source property, we
> >>> will lost the flexibility
> >>>> 	of changing the clock source ..
> >>>>
> >>>>           About clock-frequency... it is also not fixed. It depends on
> >>> the platform clock which in turns
> >>>>           Depends on the CCB clock. So it will be better to keep clock-
> >>> frequency property which is getting fixed via u-boot.
> >>>
> >>> The frequency is fixed to CCB-frequency / 2. Will that ever change? What
> >>> can we expect from future Flexcan hardware? Will it support further clock
> >>> sources?
> >> [Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the CCB gets changed that will be taken care by the u-boot fixup code for
> >> 	clock-frequency. clock-frequency is not filled by somebody in the dts file. It will be done by u-boot.
> >> 	For clock source,I can't say right now, that's why I have kept a property for this in the can node. So that in future, we need to fill it 
> >> 	appropriately
> > 
> > Speaking of the dts file, I have left the p1010si.dtsi file with
> > the fsl,flexcan-v1.0 .compatible definition.  The flexcan folks
> > (IIRC Wolfgang) objected to that as it does not follow the standard
> > which should be just fsl,flexcan.
> > 
> > How would you like to change that?  Should I add it as part of this patch,
> > add another patch to the series, or let you take care of it?
> > 
> > Also, I assume the uboot project will need to be changed as well to
> > reflect the corrected name.
> 
> I think you should provide patches within this series to cleanup the
> obsolete stuff, dts and binding doc.

Will do.

Robin

^ permalink raw reply

* [PATCH net 0/5] bnx2x fixes
From: Dmitry Kravkov @ 2011-08-09 13:13 UTC (permalink / raw)
  To: davem; +Cc: Eilon Greenstein, Vladislav Zolotarov, netdev@vger.kernel.org

Hello Dave,

Please, consider applying the short bug-fixes series to the 'net'.

Thanks,
Dmitry





^ permalink raw reply

* [PATCH net 5/5] bnx2x: disable dcb on 578xx since not supported yet
From: Dmitry Kravkov @ 2011-08-09 13:11 UTC (permalink / raw)
  To: davem, netdev@vger.kernel.org; +Cc: Vladislav Zolotarov, Eilon Greenstein


Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
 drivers/net/bnx2x/bnx2x_dcb.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x_dcb.c b/drivers/net/bnx2x/bnx2x_dcb.c
index a4ea35f..a1e004a 100644
--- a/drivers/net/bnx2x/bnx2x_dcb.c
+++ b/drivers/net/bnx2x/bnx2x_dcb.c
@@ -920,7 +920,7 @@ static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
 
 void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
 {
-	if (!CHIP_IS_E1x(bp)) {
+	if (!CHIP_IS_E1x(bp) && !CHIP_IS_E3(bp)) {
 		bp->dcb_state = dcb_on;
 		bp->dcbx_enabled = dcbx_enabled;
 	} else {
-- 
1.7.2.2





^ permalink raw reply related

* [PATCH net 4/5] bnx2x: properly clean indirect addresses
From: Dmitry Kravkov @ 2011-08-09 13:10 UTC (permalink / raw)
  To: davem, netdev; +Cc: Vladislav Zolotarov, Eilon Greenstein


Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
 drivers/net/bnx2x/bnx2x_main.c |   15 +++++++++++----
 drivers/net/bnx2x/bnx2x_reg.h  |   26 +++++++++++++++++++++-----
 2 files changed, 32 insertions(+), 9 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c
index 1f5467f..f74582a 100644
--- a/drivers/net/bnx2x/bnx2x_main.c
+++ b/drivers/net/bnx2x/bnx2x_main.c
@@ -10259,10 +10259,17 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
 	/* clean indirect addresses */
 	pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS,
 			       PCICFG_VENDOR_ID_OFFSET);
-	REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0 + BP_PORT(bp)*16, 0);
-	REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0 + BP_PORT(bp)*16, 0);
-	REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0 + BP_PORT(bp)*16, 0);
-	REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0 + BP_PORT(bp)*16, 0);
+	/* Clean the following indirect addresses for all functions since it
+	 * is not used by the driver.
+	 */
+	REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0);
+	REG_WR(bp, PXP2_REG_PGL_ADDR_94_F1, 0);
 
 	/*
 	 * Enable internal target-read (in case we are probed after PF FLR).
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h
index 27b5ecb..40266c1 100644
--- a/drivers/net/bnx2x/bnx2x_reg.h
+++ b/drivers/net/bnx2x/bnx2x_reg.h
@@ -3007,11 +3007,27 @@
 /* [R 6] Debug only: Number of used entries in the data FIFO */
 #define PXP2_REG_HST_DATA_FIFO_STATUS				 0x12047c
 /* [R 7] Debug only: Number of used entries in the header FIFO */
-#define PXP2_REG_HST_HEADER_FIFO_STATUS 			 0x120478
-#define PXP2_REG_PGL_ADDR_88_F0 				 0x120534
-#define PXP2_REG_PGL_ADDR_8C_F0 				 0x120538
-#define PXP2_REG_PGL_ADDR_90_F0 				 0x12053c
-#define PXP2_REG_PGL_ADDR_94_F0 				 0x120540
+#define PXP2_REG_HST_HEADER_FIFO_STATUS				 0x120478
+#define PXP2_REG_PGL_ADDR_88_F0					 0x120534
+/* [R 32] GRC address for configuration access to PCIE config address 0x88.
+ * any write to this PCIE address will cause a GRC write access to the
+ * address that's in t this register */
+#define PXP2_REG_PGL_ADDR_88_F1					 0x120544
+#define PXP2_REG_PGL_ADDR_8C_F0					 0x120538
+/* [R 32] GRC address for configuration access to PCIE config address 0x8c.
+ * any write to this PCIE address will cause a GRC write access to the
+ * address that's in t this register */
+#define PXP2_REG_PGL_ADDR_8C_F1					 0x120548
+#define PXP2_REG_PGL_ADDR_90_F0					 0x12053c
+/* [R 32] GRC address for configuration access to PCIE config address 0x90.
+ * any write to this PCIE address will cause a GRC write access to the
+ * address that's in t this register */
+#define PXP2_REG_PGL_ADDR_90_F1					 0x12054c
+#define PXP2_REG_PGL_ADDR_94_F0					 0x120540
+/* [R 32] GRC address for configuration access to PCIE config address 0x94.
+ * any write to this PCIE address will cause a GRC write access to the
+ * address that's in t this register */
+#define PXP2_REG_PGL_ADDR_94_F1					 0x120550
 #define PXP2_REG_PGL_CONTROL0					 0x120490
 #define PXP2_REG_PGL_CONTROL1					 0x120514
 #define PXP2_REG_PGL_DEBUG					 0x120520
-- 
1.7.2.2





^ permalink raw reply related

* [PATCH net 3/5] bnx2x: prevent race between undi_unload and load flows
From: Dmitry Kravkov @ 2011-08-09 13:09 UTC (permalink / raw)
  To: davem, netdev; +Cc: Vladislav Zolotarov, Eilon Greenstein



Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
 drivers/net/bnx2x/bnx2x_main.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c
index 1507091..1f5467f 100644
--- a/drivers/net/bnx2x/bnx2x_main.c
+++ b/drivers/net/bnx2x/bnx2x_main.c
@@ -5798,6 +5798,12 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
 
 	DP(BNX2X_MSG_MCP, "starting common init  func %d\n", BP_ABS_FUNC(bp));
 
+	/*
+	 * take the UNDI lock to protect undi_unload flow from accessing
+	 * registers while we're resetting the chip
+	 */
+	bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
+
 	bnx2x_reset_common(bp);
 	REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff);
 
@@ -5808,6 +5814,8 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
 	}
 	REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, val);
 
+	bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI);
+
 	bnx2x_init_block(bp, BLOCK_MISC, PHASE_COMMON);
 
 	if (!CHIP_IS_E1x(bp)) {
-- 
1.7.2.2





^ permalink raw reply related

* [PATCH net 2/5] bnx2x: fix select_queue when FCoE is disabled
From: Dmitry Kravkov @ 2011-08-09 13:08 UTC (permalink / raw)
  To: davem, netdev@vger.kernel.org; +Cc: Vladislav Zolotarov, Eilon Greenstein

From: Vladislav Zolotarov <vladz@broadcom.com>

Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
 drivers/net/bnx2x/bnx2x_cmn.c |   30 +++++++++++++++++++++++++-----
 1 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c
index 64df0ef..37e5790 100644
--- a/drivers/net/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/bnx2x/bnx2x_cmn.c
@@ -1405,10 +1405,9 @@ void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
 {
 	struct bnx2x *bp = netdev_priv(dev);
+
 #ifdef BCM_CNIC
-	if (NO_FCOE(bp))
-		return skb_tx_hash(dev, skb);
-	else {
+	if (!NO_FCOE(bp)) {
 		struct ethhdr *hdr = (struct ethhdr *)skb->data;
 		u16 ether_type = ntohs(hdr->h_proto);
 
@@ -1425,8 +1424,7 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
 			return bnx2x_fcoe_tx(bp, txq_index);
 	}
 #endif
-	/* Select a none-FCoE queue:  if FCoE is enabled, exclude FCoE L2 ring
-	 */
+	/* select a non-FCoE queue */
 	return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
 }
 
@@ -1449,6 +1447,28 @@ void bnx2x_set_num_queues(struct bnx2x *bp)
 	bp->num_queues += NON_ETH_CONTEXT_USE;
 }
 
+/**
+ * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
+ *
+ * @bp:		Driver handle
+ *
+ * We currently support for at most 16 Tx queues for each CoS thus we will
+ * allocate a multiple of 16 for ETH L2 rings according to the value of the
+ * bp->max_cos.
+ *
+ * If there is an FCoE L2 queue the appropriate Tx queue will have the next
+ * index after all ETH L2 indices.
+ *
+ * If the actual number of Tx queues (for each CoS) is less than 16 then there
+ * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
+ * 16..31,...) with indicies that are not coupled with any real Tx queue.
+ *
+ * The proper configuration of skb->queue_mapping is handled by
+ * bnx2x_select_queue() and __skb_tx_hash().
+ *
+ * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
+ * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
+ */
 static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)
 {
 	int rc, tx, rx;
-- 
1.7.2.2





^ permalink raw reply related

* [PATCH net 1/5] bnx2x: init FCOE FP only once
From: Dmitry Kravkov @ 2011-08-09 13:08 UTC (permalink / raw)
  To: davem, netdev@vger.kernel.org; +Cc: Eilon Greenstein, Vladislav Zolotarov

From: Vladislav Zolotarov <vladz@broadcom.com>


Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
 drivers/net/bnx2x/bnx2x_cmn.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c
index d724a18..64df0ef 100644
--- a/drivers/net/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/bnx2x/bnx2x_cmn.c
@@ -63,8 +63,9 @@ static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)
 	fp->disable_tpa = ((bp->flags & TPA_ENABLE_FLAG) == 0);
 
 #ifdef BCM_CNIC
-	/* We don't want TPA on FCoE, FWD and OOO L2 rings */
-	bnx2x_fcoe(bp, disable_tpa) = 1;
+	/* We don't want TPA on an FCoE L2 ring */
+	if (IS_FCOE_FP(fp))
+		fp->disable_tpa = 1;
 #endif
 }
 
-- 
1.7.2.2





^ permalink raw reply related

* Re: [forcedeth bug] Re: [GIT] Networking
From: Jiri Pirko @ 2011-08-09 13:13 UTC (permalink / raw)
  To: Ingo Molnar; +Cc: David Miller, torvalds, akpm, netdev, linux-kernel
In-Reply-To: <20110805143732.GH1928@minipsycho.orion>

Fri, Aug 05, 2011 at 04:37:33PM CEST, jpirko@redhat.com wrote:
>Fri, Aug 05, 2011 at 02:31:37PM CEST, jpirko@redhat.com wrote:
>>Fri, Aug 05, 2011 at 02:18:55PM CEST, mingo@elte.hu wrote:
>>>
>>>* Jiri Pirko <jpirko@redhat.com> wrote:
>>>
>>>> >> Is DEV_HAS_VLAN set in id->driver_data (L5344) ?
>>>> >
>>>> >How do i tell that without hacking the driver?
>>>> 
>>>> look in dmesg for line like:
>>>> "forcedeth 0000:00:08.0: highdma csum vlan pwrctl mgmt gbit lnktim msi
>>>> desc-v3"
>>>> 
>>>> if "vlan" is there, DEV_HAS_VLAN is set
>>>
>>>[    3.534489] forcedeth 0000:00:0a.0: highdma csum gbit lnktim desc-v3
>>>
>>>Note, this is a pretty old system with an old nvidia chipset and 
>>>on-board ethernet:
>>>
>>>00:0a.0 Bridge: nVidia Corporation CK804 Ethernet Controller (rev a3)
>>>        Subsystem: ASUSTeK Computer Inc. K8N4-E Mainboard
>>>        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
>>>        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
>>>        Latency: 0 (250ns min, 5000ns max)
>>>        Interrupt: pin A routed to IRQ 11
>>>        Region 0: Memory at da100000 (32-bit, non-prefetchable) [size=4K]
>>>        Region 1: I/O ports at d000 [size=8]
>>>        Capabilities: [44] Power Management version 2
>>>                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
>>>                Status: D0 PME-Enable+ DSel=0 DScale=0 PME-
>>
>>Please do lspci -nn
>>
>>There are two CK804 chips:
>>0x10DE, 0x0056
>>0x10DE, 0x0057
>>
>>I have only the second one handy - Getting the machine as we speak.
>
>I'm unable to see problems you are referring to on my machine.
>
>Would you please try following patch if it fixes your issue? It's
>in fact returning everything back to the original state (for your card).


Ingo, any news with this?

Thanks.

Jirka

>
>diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
>index e55df30..d7d43d4 100644
>--- a/drivers/net/forcedeth.c
>+++ b/drivers/net/forcedeth.c
>@@ -2763,18 +2763,18 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
> 			skb->protocol = eth_type_trans(skb, dev);
> 			prefetch(skb->data);
> 
>-			vlanflags = le32_to_cpu(np->get_rx.ex->buflow);
>-
> 			/*
> 			 * There's need to check for NETIF_F_HW_VLAN_RX here.
> 			 * Even if vlan rx accel is disabled,
> 			 * NV_RX3_VLAN_TAG_PRESENT is pseudo randomly set.
> 			 */
>-			if (dev->features & NETIF_F_HW_VLAN_RX &&
>-			    vlanflags & NV_RX3_VLAN_TAG_PRESENT) {
>-				u16 vid = vlanflags & NV_RX3_VLAN_TAG_MASK;
>+			if (dev->features & NETIF_F_HW_VLAN_RX) {
>+				vlanflags = le32_to_cpu(np->get_rx.ex->buflow);
>+				if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) {
>+					u16 vid = vlanflags & NV_RX3_VLAN_TAG_MASK;
> 
>-				__vlan_hwaccel_put_tag(skb, vid);
>+					__vlan_hwaccel_put_tag(skb, vid);
>+				}
> 			}
> 			napi_gro_receive(&np->napi, skb);
> 
>@@ -5615,7 +5615,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
> 		goto out_error;
> 	}
> 
>-	nv_vlan_mode(dev, dev->features);
>+	//nv_vlan_mode(dev, dev->features);
> 
> 	netif_carrier_off(dev);
> 

^ permalink raw reply

* Re: [RFC 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Marc Kleine-Budde @ 2011-08-09 13:09 UTC (permalink / raw)
  To: Robin Holt
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
	netdev-u79uwXL29TY76Z2rM5mHXA, U Bhaskar-B22300, PPC list,
	Wolfgang Grandegger
In-Reply-To: <20110809124042.GR4926-sJ/iWh9BUns@public.gmane.org>


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On 08/09/2011 02:40 PM, Robin Holt wrote:
> On Tue, Aug 09, 2011 at 02:33:31PM +0200, Marc Kleine-Budde wrote:
>> On 08/09/2011 07:55 AM, Robin Holt wrote:
>>> I added a clock source for the p1010rdb so the flexcan driver
>>> could find its clock frequency.
>>>
>>> Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
>>> To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
>>> To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>,
>>> To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
>>> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
>>> Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
>>
>> After fixing Wolfgangs remarks add by Acked-by, for what it's worth in
>> the ppc-world :)
> 
> Does that go for the other two patches in the series you have not
> commented on in many revs as well?

They look pretty good so far! I'll compile the next round on arm and
hopefully find time to test on HW.

cheers, Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


[-- Attachment #1.2: OpenPGP digital signature --]
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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core

^ permalink raw reply

* Re: gianfar.c null pointer deref in gfar_start_xmit().
From: Robin Holt @ 2011-08-09 13:06 UTC (permalink / raw)
  To: Eric Dumazet; +Cc: Robin Holt, Sandeep Gopalpet, David S. Miller, netdev
In-Reply-To: <1312873813.2531.54.camel@edumazet-laptop>

On Tue, Aug 09, 2011 at 09:10:13AM +0200, Eric Dumazet wrote:
> Le mardi 09 août 2011 à 01:54 -0500, Robin Holt a écrit :
> > On Tue, Aug 02, 2011 at 09:44:38PM -0500, Robin Holt wrote:
> > > 
> > > While using the v3.0 kernel on a Freescale P1010RDB with 3 minor patches
> > > (None which affect gianfar.c), I get a NULL pointer deref at:
> > > 
> > > static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
> > > {
> > > ...
> > > 	regs = tx_queue->grp->regs;
> > > 
> > > I put a BUG_ON(tx_queue->grp) just before this line and it did trip.
> > > I have not looked at this any more than that.
> > > 
> > > Any suggestions would be welcome.   To reproduce, all I need to do is
> > > a few sequences of pings.
> > 
> > I was able to reproduce this with the net-next-2.6 kernel as well.
> > 
> 
> This driver incorrectly assumes a non dense txqueue array is possible
> for a netdev, but its not true.
> 
> In the meantime, you could force it to use one tx_queue only.
> 
> tx_queues = (u32 *)of_get_property(np, "fsl,num_tx_queues", NULL);
> num_tx_qs = tx_queues ? *tx_queues : 1;

I fixed up the .dts file and now it works.  I have not tested the RGMII
interface yet so I do not know if that supports multiple queues.  I assume
I could find it in the documentation.  What might I be looking for?

Thanks,
Robin

^ permalink raw reply

* Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: Wolfgang Grandegger @ 2011-08-09 13:03 UTC (permalink / raw)
  To: Robin Holt
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	U Bhaskar-B22300, Marc Kleine-Budde
In-Reply-To: <20110809124919.GS4926-sJ/iWh9BUns@public.gmane.org>

On 08/09/2011 02:49 PM, Robin Holt wrote:
> On Tue, Aug 09, 2011 at 12:41:39PM +0000, U Bhaskar-B22300 wrote:
>>
>>
>>> -----Original Message-----
>>> From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
>>> Sent: Tuesday, August 09, 2011 4:19 PM
>>> To: U Bhaskar-B22300
>>> Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
>>> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
>>>
>>> On 08/09/2011 11:27 AM, U Bhaskar-B22300 wrote:
>>>>
>>>>
>>>>> -----Original Message-----
>>>>> From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
>>>>> Sent: Tuesday, August 09, 2011 2:03 PM
>>>>> To: U Bhaskar-B22300
>>>>> Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
>>>>> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>>>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
>>>>>
>>>>> Hi Bhaskar,
>>>>>
>>>>> On 08/09/2011 09:57 AM, U Bhaskar-B22300 wrote:
>>>>>>
>>>>>>
>>>>>>> -----Original Message-----
>>>>>>> From: Marc Kleine-Budde [mailto:mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
>>>>>>> Sent: Tuesday, August 09, 2011 12:23 AM
>>>>>>> To: Wolfgang Grandegger
>>>>>>> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org; netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; U
>>>>>>> Bhaskar- B22300
>>>>>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
>>>>>>>
>>>>>>> On 08/08/2011 05:33 PM, Wolfgang Grandegger wrote:
>>>>>>>>> ACK - The device tree bindings as in mainline's Documentation is
>>>>>>>>> a
>>>>>>> mess.
>>>>>>>>> If the powerpc guys are happy with a clock interfaces based
>>>>>>>>> approach somewhere in arch/ppc, I'm more than happy to remove:
>>>>>>>>> - fsl,flexcan-clock-source (not implemented, even in the fsl
>>>>>>>>> driver)
>>>>>> [Bhaskar]I have pushed the FlexCAN series of patches, It contains
>>>>>> the usage of all the fields posted in the FlexCAN bindings at
>>>>>> http://git.kernel.org/?p=linux/kernel/git/stable/linux-3.0.y.git;a=b
>>>>>> lo
>>>>>> b;f=Documentation/devicetree/bindings/net/can/fsl-flexcan.txt;h=1a72
>>>>>> 9f
>>>>>> 089866259ef82d0db5893ff7a8c54d5ccf;hb=94ed5b4788a7cdbe68bc7cb8516972
>>>>>> cb
>>>>>> ebdc8274
>>>>>
>>>>> As Marc already pointed out, Robin already has a much more advanced
>>>>> patch stack in preparation. Especially your patches do not care about
>>>>> the already existing Flexcan core on the Freescale's ARM socks.
>>>> [Bhaskar] No, the patches are taking care of the existing ARM
>>> functionality.
>>>> 	I have not tested on the ARM based board, but the patches are made
>>> in a
>>>>       Manner that it should not break the ARM based functionality.
>>>>>
>>>>>>>>>
>>>>>>>>> - fsl,flexcan-clock-divider \__ replace with code in arch/ppc, or
>>>>>>>>> - clock-frequency           /   a single clock-frequency attribute
>>>>>>>>
>>>>>>>> In the "net-next-2.6" tree there is also:
>>>>>>>>
>>>>>>>>  $ grep flexcan arch/powerpc/boots/dts/*.dts
>>>>>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
>>>>> "platform";
>>>>>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
>>>>> "platform";
>>>>>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
>>>>>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
>>>>>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
>>>>>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
>>>>>>>>
>>>>>>>> Especially the fsl,flexcan-clock-divider = <2>; might make people
>>>>>>>> think, that they could set something else.
>>>>>>>
>>>>>> [Bhaskar] As it is mentioned in the Flexcan bindings, the need of
>>>>> fsl,flexcan-clock-divider = <2>;
>>>>>> 	    But I kept it as "2" because FlexCan clock source is the
>>>>> platform clock and it is CCB/2
>>>>>> 	    If the "2" is misleading, the bindings can be changed or some
>>>>> text can be written to make the meaning of "2"
>>>>>>           Understandable , Please suggest ..
>>>>>
>>>>> The clock source and frequency is fixed. Why do we need an extra
>>>>> properties for that. We have panned to remove these bogus bindings
>>>>> from the Linux kernel, which sneaked in *without* any review on the
>>>>> relevant mailing lists (at least I have not realized any posting). We
>>>>> do not think they are really needed. They just confuse the user. We
>>>>> also prefer to use the compatibility string "fsl,flexcan" instead
>>>>> "fsl,flexcan-v1.0". It's unusual to add a version number, which is
>>>>> for the Flexcan on the PowerPC cores only, I assume, but there will
>>>>> be device tree for ARM soon. A proper compatibility string would be
>>>>> "fsl,p1010-flexcan" if we really need to distinguish.
>>>>>
>>>> [Bhaskar] About clock source.. There can be two sources of clock for
>>> the CAN.
>>>> 	Oscillator or the platform clock, but at present only platform
>>> clock is supported
>>>> 	in P1010.If we remove the fsl,flexcan-clock-source property, we
>>> will lost the flexibility
>>>> 	of changing the clock source ..
>>>>
>>>>           About clock-frequency... it is also not fixed. It depends on
>>> the platform clock which in turns
>>>>           Depends on the CCB clock. So it will be better to keep clock-
>>> frequency property which is getting fixed via u-boot.
>>>
>>> The frequency is fixed to CCB-frequency / 2. Will that ever change? What
>>> can we expect from future Flexcan hardware? Will it support further clock
>>> sources?
>> [Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the CCB gets changed that will be taken care by the u-boot fixup code for
>> 	clock-frequency. clock-frequency is not filled by somebody in the dts file. It will be done by u-boot.
>> 	For clock source,I can't say right now, that's why I have kept a property for this in the can node. So that in future, we need to fill it 
>> 	appropriately
> 
> Speaking of the dts file, I have left the p1010si.dtsi file with
> the fsl,flexcan-v1.0 .compatible definition.  The flexcan folks
> (IIRC Wolfgang) objected to that as it does not follow the standard
> which should be just fsl,flexcan.
> 
> How would you like to change that?  Should I add it as part of this patch,
> add another patch to the series, or let you take care of it?
> 
> Also, I assume the uboot project will need to be changed as well to
> reflect the corrected name.

I think you should provide patches within this series to cleanup the
obsolete stuff, dts and binding doc.

Wolfgang.

^ permalink raw reply

* Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Wolfgang Grandegger @ 2011-08-09 13:00 UTC (permalink / raw)
  To: Robin Holt
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w, U Bhaskar-B22300,
	Marc Kleine-Budde, PPC list, netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1312892907-20419-5-git-send-email-holt-sJ/iWh9BUns@public.gmane.org>

Hi Robin,

On 08/09/2011 02:28 PM, Robin Holt wrote:
> I added a simple clock source for the p1010rdb so the flexcan driver
> could determine a clock frequency.  The p1010 can device only has an
> oscillator of system bus frequency divided by 2.
> 
> Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
> To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
> To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>,
> To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
> Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
> ---
>  arch/powerpc/platforms/85xx/Kconfig    |    2 +
>  arch/powerpc/platforms/85xx/Makefile   |    2 +
>  arch/powerpc/platforms/85xx/clock.c    |   42 ++++++++++++++++++++++++++++++++
>  arch/powerpc/platforms/85xx/p1010rdb.c |    8 ++++++
>  4 files changed, 54 insertions(+), 0 deletions(-)
>  create mode 100644 arch/powerpc/platforms/85xx/clock.c
> 
> diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
> index 498534c..c4304ae 100644
> --- a/arch/powerpc/platforms/85xx/Kconfig
> +++ b/arch/powerpc/platforms/85xx/Kconfig
> @@ -70,6 +70,8 @@ config MPC85xx_RDB
>  config P1010_RDB
>  	bool "Freescale P1010RDB"
>  	select DEFAULT_UIMAGE
> +	select HAVE_CAN_FLEXCAN if NET && CAN
> +	select PPC_CLOCK if CAN_FLEXCAN
>  	help
>  	  This option enables support for the MPC85xx RDB (P1010 RDB) board
>  
> diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
> index a971b32..cc7f381 100644
> --- a/arch/powerpc/platforms/85xx/Makefile
> +++ b/arch/powerpc/platforms/85xx/Makefile
> @@ -3,6 +3,8 @@
>  #
>  obj-$(CONFIG_SMP) += smp.o
>  
> +obj-$(CONFIG_PPC_CLOCK)   += clock.o
> +
>  obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
>  obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
>  obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
> diff --git a/arch/powerpc/platforms/85xx/clock.c b/arch/powerpc/platforms/85xx/clock.c
> new file mode 100644
> index 0000000..a6fd2c8
> --- /dev/null
> +++ b/arch/powerpc/platforms/85xx/clock.c
> @@ -0,0 +1,42 @@
> +
> +#include <linux/device.h>
> +#include <linux/err.h>
> +
> +#include <asm/clk_interface.h>
> +
> +#include <sysdev/fsl_soc.h>
> +
> +/*
> + * p1010 needs to provide a clock source for the flexcan driver. The
> + * oscillator for the p1010 processor is only ever the system clock / 2.
> + */
> +
> +static struct clk *mpc85xx_clk_get(struct device *dev, const char *id)
> +{
> +	if (!dev)
> +		return ERR_PTR(-ENOENT);
> +

Ah, I think you removed too much code here. I obviously did not
understand what the device node check is good for, sorry. The clock is
only implemented for the Flexcan and therefore we should add a check here:

	if (!dev->of_node ||
	    !of_device_is_compatible(dev->of_node, "fsl,flexcan"))
		return ERR_PTR(-ENOENT);

Something like that should work. For the next version you can then add
my "Acked-by: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org" to all patches.

Wolfgang.

^ permalink raw reply

* Re: [PATCH] net_sched: prio: use qdisc_dequeue_peeked
From: Eric Dumazet @ 2011-08-09 12:56 UTC (permalink / raw)
  To: Florian Westphal; +Cc: netdev
In-Reply-To: <1312891483-30034-1-git-send-email-fw@strlen.de>

Le mardi 09 août 2011 à 14:04 +0200, Florian Westphal a écrit :
> commit 07bd8df5df4369487812bf85a237322ff3569b77
> (sch_sfq: fix peek() implementation) changed sfq to use generic
> peek helper.
> 
> This makes HFSC complain about a non-work-conserving child qdisc, if
> prio with sfq child is used within hfsc:
> 
> hfsc peeks into prio qdisc, which will then peek into sfq.
> returned skb is stashed in sch->gso_skb.
> 
> Next, hfsc tries to dequeue from prio, but prio will call sfq dequeue
> directly, which may return NULL instead of previously peeked-at skb.
> 
> Have prio call qdisc_dequeue_peeked, so sfq->dequeue() is
> not called in this case.
> 
> Cc: Eric Dumazet <eric.dumazet@gmail.com>
> Signed-off-by: Florian Westphal <fw@strlen.de>
> ---
>  Eric, does this look correct to you?
>  I am not sure if sfq needs fixing instead of this patch here.
> 
> diff --git a/net/sched/sch_prio.c b/net/sched/sch_prio.c
> index 2a318f2..b5d56a2 100644
> --- a/net/sched/sch_prio.c
> +++ b/net/sched/sch_prio.c
> @@ -112,7 +112,7 @@ static struct sk_buff *prio_dequeue(struct Qdisc *sch)
>  
>  	for (prio = 0; prio < q->bands; prio++) {
>  		struct Qdisc *qdisc = q->queues[prio];
> -		struct sk_buff *skb = qdisc->dequeue(qdisc);
> +		struct sk_buff *skb = qdisc_dequeue_peeked(qdisc);
>  		if (skb) {
>  			qdisc_bstats_update(sch, skb);
>  			sch->q.qlen--;


Hi Florian

Are you sure this patch is still needed, after commit 
e1738bd9cecc5c867b0e2996470c1ff20f66ba79
(sch_sfq: fix sfq_enqueue())

I am asking before fully reviewing the code, I dont know who
should/shouldnt call qdisc_dequeue_peeked() instead of qdisc->dequeue()

Thanks !







^ permalink raw reply

* RE: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: U Bhaskar-B22300 @ 2011-08-09 12:54 UTC (permalink / raw)
  To: Marc Kleine-Budde
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Wolfgang Grandegger
In-Reply-To: <4E412D26.9020608-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>



> -----Original Message-----
> From: Marc Kleine-Budde [mailto:mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
> Sent: Tuesday, August 09, 2011 6:21 PM
> To: U Bhaskar-B22300
> Cc: Wolfgang Grandegger; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> 
> Bhaskar,
> 
> On 08/09/2011 02:41 PM, U Bhaskar-B22300 wrote:
> >> The frequency is fixed to CCB-frequency / 2. Will that ever change?
> >> What can we expect from future Flexcan hardware? Will it support
> >> further clock sources?
> > [Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the
> CCB gets changed that will be taken care by the u-boot fixup code for
> > 	clock-frequency. clock-frequency is not filled by somebody in the
> dts file. It will be done by u-boot.
> > 	For clock source,I can't say right now, that's why I have kept a
> property for this in the can node. So that in future, we need to fill it
> > 	appropriately
> 
> are you actually following the discussion about Robin's patches? Robin
> has provided patch that work without the clock frequency in the DT at
> all..
[Bhaskar] Hi Marc,
	Yes I am following the discussion on Robin's patch. Just going tru the patches. I will respond
> 
> Marc
> 
> --
> Pengutronix e.K.                  | Marc Kleine-Budde           |
> Industrial Linux Solutions        | Phone: +49-231-2826-924     |
> Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
> Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

^ permalink raw reply

* Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: Marc Kleine-Budde @ 2011-08-09 12:50 UTC (permalink / raw)
  To: U Bhaskar-B22300
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Wolfgang Grandegger
In-Reply-To: <9C64B7751C3BCA41B64A68E23005A7BE1C3552-TcFNo7jSaXPiTqIcKZ1S2K4g8xLGJsHaLnY5E4hWTkheoWH0uzbU5w@public.gmane.org>


[-- Attachment #1.1: Type: text/plain, Size: 1077 bytes --]

Bhaskar,

On 08/09/2011 02:41 PM, U Bhaskar-B22300 wrote:
>> The frequency is fixed to CCB-frequency / 2. Will that ever change? What
>> can we expect from future Flexcan hardware? Will it support further clock
>> sources?
> [Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the CCB gets changed that will be taken care by the u-boot fixup code for
> 	clock-frequency. clock-frequency is not filled by somebody in the dts file. It will be done by u-boot.
> 	For clock source,I can't say right now, that's why I have kept a property for this in the can node. So that in future, we need to fill it 
> 	appropriately

are you actually following the discussion about Robin's patches? Robin
has provided patch that work without the clock frequency in the DT at all..

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core

^ permalink raw reply

* Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: Robin Holt @ 2011-08-09 12:49 UTC (permalink / raw)
  To: U Bhaskar-B22300
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Marc Kleine-Budde, Wolfgang Grandegger
In-Reply-To: <9C64B7751C3BCA41B64A68E23005A7BE1C3552-TcFNo7jSaXPiTqIcKZ1S2K4g8xLGJsHaLnY5E4hWTkheoWH0uzbU5w@public.gmane.org>

On Tue, Aug 09, 2011 at 12:41:39PM +0000, U Bhaskar-B22300 wrote:
> 
> 
> > -----Original Message-----
> > From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
> > Sent: Tuesday, August 09, 2011 4:19 PM
> > To: U Bhaskar-B22300
> > Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
> > netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> > Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> > 
> > On 08/09/2011 11:27 AM, U Bhaskar-B22300 wrote:
> > >
> > >
> > >> -----Original Message-----
> > >> From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
> > >> Sent: Tuesday, August 09, 2011 2:03 PM
> > >> To: U Bhaskar-B22300
> > >> Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
> > >> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> > >> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> > >>
> > >> Hi Bhaskar,
> > >>
> > >> On 08/09/2011 09:57 AM, U Bhaskar-B22300 wrote:
> > >>>
> > >>>
> > >>>> -----Original Message-----
> > >>>> From: Marc Kleine-Budde [mailto:mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
> > >>>> Sent: Tuesday, August 09, 2011 12:23 AM
> > >>>> To: Wolfgang Grandegger
> > >>>> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org; netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; U
> > >>>> Bhaskar- B22300
> > >>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> > >>>>
> > >>>> On 08/08/2011 05:33 PM, Wolfgang Grandegger wrote:
> > >>>>>> ACK - The device tree bindings as in mainline's Documentation is
> > >>>>>> a
> > >>>> mess.
> > >>>>>> If the powerpc guys are happy with a clock interfaces based
> > >>>>>> approach somewhere in arch/ppc, I'm more than happy to remove:
> > >>>>>> - fsl,flexcan-clock-source (not implemented, even in the fsl
> > >>>>>> driver)
> > >>> [Bhaskar]I have pushed the FlexCAN series of patches, It contains
> > >>> the usage of all the fields posted in the FlexCAN bindings at
> > >>> http://git.kernel.org/?p=linux/kernel/git/stable/linux-3.0.y.git;a=b
> > >>> lo
> > >>> b;f=Documentation/devicetree/bindings/net/can/fsl-flexcan.txt;h=1a72
> > >>> 9f
> > >>> 089866259ef82d0db5893ff7a8c54d5ccf;hb=94ed5b4788a7cdbe68bc7cb8516972
> > >>> cb
> > >>> ebdc8274
> > >>
> > >> As Marc already pointed out, Robin already has a much more advanced
> > >> patch stack in preparation. Especially your patches do not care about
> > >> the already existing Flexcan core on the Freescale's ARM socks.
> > > [Bhaskar] No, the patches are taking care of the existing ARM
> > functionality.
> > > 	I have not tested on the ARM based board, but the patches are made
> > in a
> > >       Manner that it should not break the ARM based functionality.
> > >>
> > >>>>>>
> > >>>>>> - fsl,flexcan-clock-divider \__ replace with code in arch/ppc, or
> > >>>>>> - clock-frequency           /   a single clock-frequency attribute
> > >>>>>
> > >>>>> In the "net-next-2.6" tree there is also:
> > >>>>>
> > >>>>>  $ grep flexcan arch/powerpc/boots/dts/*.dts
> > >>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> > >> "platform";
> > >>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> > >> "platform";
> > >>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> > >>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> > >>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> > >>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> > >>>>>
> > >>>>> Especially the fsl,flexcan-clock-divider = <2>; might make people
> > >>>>> think, that they could set something else.
> > >>>>
> > >>> [Bhaskar] As it is mentioned in the Flexcan bindings, the need of
> > >> fsl,flexcan-clock-divider = <2>;
> > >>> 	    But I kept it as "2" because FlexCan clock source is the
> > >> platform clock and it is CCB/2
> > >>> 	    If the "2" is misleading, the bindings can be changed or some
> > >> text can be written to make the meaning of "2"
> > >>>           Understandable , Please suggest ..
> > >>
> > >> The clock source and frequency is fixed. Why do we need an extra
> > >> properties for that. We have panned to remove these bogus bindings
> > >> from the Linux kernel, which sneaked in *without* any review on the
> > >> relevant mailing lists (at least I have not realized any posting). We
> > >> do not think they are really needed. They just confuse the user. We
> > >> also prefer to use the compatibility string "fsl,flexcan" instead
> > >> "fsl,flexcan-v1.0". It's unusual to add a version number, which is
> > >> for the Flexcan on the PowerPC cores only, I assume, but there will
> > >> be device tree for ARM soon. A proper compatibility string would be
> > >> "fsl,p1010-flexcan" if we really need to distinguish.
> > >>
> > > [Bhaskar] About clock source.. There can be two sources of clock for
> > the CAN.
> > > 	Oscillator or the platform clock, but at present only platform
> > clock is supported
> > > 	in P1010.If we remove the fsl,flexcan-clock-source property, we
> > will lost the flexibility
> > > 	of changing the clock source ..
> > >
> > >           About clock-frequency... it is also not fixed. It depends on
> > the platform clock which in turns
> > >           Depends on the CCB clock. So it will be better to keep clock-
> > frequency property which is getting fixed via u-boot.
> > 
> > The frequency is fixed to CCB-frequency / 2. Will that ever change? What
> > can we expect from future Flexcan hardware? Will it support further clock
> > sources?
> [Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the CCB gets changed that will be taken care by the u-boot fixup code for
> 	clock-frequency. clock-frequency is not filled by somebody in the dts file. It will be done by u-boot.
> 	For clock source,I can't say right now, that's why I have kept a property for this in the can node. So that in future, we need to fill it 
> 	appropriately

Speaking of the dts file, I have left the p1010si.dtsi file with
the fsl,flexcan-v1.0 .compatible definition.  The flexcan folks
(IIRC Wolfgang) objected to that as it does not follow the standard
which should be just fsl,flexcan.

How would you like to change that?  Should I add it as part of this patch,
add another patch to the series, or let you take care of it?

Also, I assume the uboot project will need to be changed as well to
reflect the corrected name.

Thanks,
Robin

^ permalink raw reply

* Re: RSS mode performance in ixgbe (82599) driver
From: Eric Dumazet @ 2011-08-09 12:43 UTC (permalink / raw)
  To: J.Hwan Kim; +Cc: linux-kernel, netdev
In-Reply-To: <4E41222B.8060003@gmail.com>

Le mardi 09 août 2011 à 21:03 +0900, J.Hwan Kim a écrit :
> Hi, everyone
> 
> I'm testing the RSS mode throughput of Intel ixgbe 82599 driver.
> My server's specification is Xeon 3GHz (4cores) and PCIe speed is 
> 2.5Gx8lanes,
> and DD2 memory is about 600~700MHz.
> 
> When I enable the RSS(receive side scaling) mode with 4 Rx queues,
> the Rx performance is below than when I use a single queue.
> 
> I don't know how the cores operate, whether the cores run in sequence
> or simultaneously at the same time.
> 
> I want to know the mechanism in general how the multi-cores run
> and the reason why the performance of ixgbe driver in rss mode is below
> non-rss mode.

CC netdev, as these kind of stuff is better hosted on netdev

You should make sure your 4 rx queues are serviced by different cpus, or
else, one cpu could be the bottleneck.

cat /proc/interrupts

^ permalink raw reply

* RE: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
From: U Bhaskar-B22300 @ 2011-08-09 12:41 UTC (permalink / raw)
  To: Wolfgang Grandegger
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
	netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Marc Kleine-Budde
In-Reply-To: <4E41108F.1090104-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>



> -----Original Message-----
> From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
> Sent: Tuesday, August 09, 2011 4:19 PM
> To: U Bhaskar-B22300
> Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> 
> On 08/09/2011 11:27 AM, U Bhaskar-B22300 wrote:
> >
> >
> >> -----Original Message-----
> >> From: Wolfgang Grandegger [mailto:wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org]
> >> Sent: Tuesday, August 09, 2011 2:03 PM
> >> To: U Bhaskar-B22300
> >> Cc: Marc Kleine-Budde; socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org;
> >> netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> >> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> >>
> >> Hi Bhaskar,
> >>
> >> On 08/09/2011 09:57 AM, U Bhaskar-B22300 wrote:
> >>>
> >>>
> >>>> -----Original Message-----
> >>>> From: Marc Kleine-Budde [mailto:mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org]
> >>>> Sent: Tuesday, August 09, 2011 12:23 AM
> >>>> To: Wolfgang Grandegger
> >>>> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org; netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; U
> >>>> Bhaskar- B22300
> >>>> Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.
> >>>>
> >>>> On 08/08/2011 05:33 PM, Wolfgang Grandegger wrote:
> >>>>>> ACK - The device tree bindings as in mainline's Documentation is
> >>>>>> a
> >>>> mess.
> >>>>>> If the powerpc guys are happy with a clock interfaces based
> >>>>>> approach somewhere in arch/ppc, I'm more than happy to remove:
> >>>>>> - fsl,flexcan-clock-source (not implemented, even in the fsl
> >>>>>> driver)
> >>> [Bhaskar]I have pushed the FlexCAN series of patches, It contains
> >>> the usage of all the fields posted in the FlexCAN bindings at
> >>> http://git.kernel.org/?p=linux/kernel/git/stable/linux-3.0.y.git;a=b
> >>> lo
> >>> b;f=Documentation/devicetree/bindings/net/can/fsl-flexcan.txt;h=1a72
> >>> 9f
> >>> 089866259ef82d0db5893ff7a8c54d5ccf;hb=94ed5b4788a7cdbe68bc7cb8516972
> >>> cb
> >>> ebdc8274
> >>
> >> As Marc already pointed out, Robin already has a much more advanced
> >> patch stack in preparation. Especially your patches do not care about
> >> the already existing Flexcan core on the Freescale's ARM socks.
> > [Bhaskar] No, the patches are taking care of the existing ARM
> functionality.
> > 	I have not tested on the ARM based board, but the patches are made
> in a
> >       Manner that it should not break the ARM based functionality.
> >>
> >>>>>>
> >>>>>> - fsl,flexcan-clock-divider \__ replace with code in arch/ppc, or
> >>>>>> - clock-frequency           /   a single clock-frequency attribute
> >>>>>
> >>>>> In the "net-next-2.6" tree there is also:
> >>>>>
> >>>>>  $ grep flexcan arch/powerpc/boots/dts/*.dts
> >>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> >> "platform";
> >>>>>   p1010rdb.dts:			fsl,flexcan-clock-source =
> >> "platform";
> >>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> >>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> >>>>>   p1010si.dtsi:			compatible = "fsl,flexcan-v1.0";
> >>>>>   p1010si.dtsi:			fsl,flexcan-clock-divider = <2>;
> >>>>>
> >>>>> Especially the fsl,flexcan-clock-divider = <2>; might make people
> >>>>> think, that they could set something else.
> >>>>
> >>> [Bhaskar] As it is mentioned in the Flexcan bindings, the need of
> >> fsl,flexcan-clock-divider = <2>;
> >>> 	    But I kept it as "2" because FlexCan clock source is the
> >> platform clock and it is CCB/2
> >>> 	    If the "2" is misleading, the bindings can be changed or some
> >> text can be written to make the meaning of "2"
> >>>           Understandable , Please suggest ..
> >>
> >> The clock source and frequency is fixed. Why do we need an extra
> >> properties for that. We have panned to remove these bogus bindings
> >> from the Linux kernel, which sneaked in *without* any review on the
> >> relevant mailing lists (at least I have not realized any posting). We
> >> do not think they are really needed. They just confuse the user. We
> >> also prefer to use the compatibility string "fsl,flexcan" instead
> >> "fsl,flexcan-v1.0". It's unusual to add a version number, which is
> >> for the Flexcan on the PowerPC cores only, I assume, but there will
> >> be device tree for ARM soon. A proper compatibility string would be
> >> "fsl,p1010-flexcan" if we really need to distinguish.
> >>
> > [Bhaskar] About clock source.. There can be two sources of clock for
> the CAN.
> > 	Oscillator or the platform clock, but at present only platform
> clock is supported
> > 	in P1010.If we remove the fsl,flexcan-clock-source property, we
> will lost the flexibility
> > 	of changing the clock source ..
> >
> >           About clock-frequency... it is also not fixed. It depends on
> the platform clock which in turns
> >           Depends on the CCB clock. So it will be better to keep clock-
> frequency property which is getting fixed via u-boot.
> 
> The frequency is fixed to CCB-frequency / 2. Will that ever change? What
> can we expect from future Flexcan hardware? Will it support further clock
> sources?
[Bhaskar] Yes the frequency will always be CCB-frequency/2.Even if the CCB gets changed that will be taken care by the u-boot fixup code for
	clock-frequency. clock-frequency is not filled by somebody in the dts file. It will be done by u-boot.
	For clock source,I can't say right now, that's why I have kept a property for this in the can node. So that in future, we need to fill it 
	appropriately
> 
> Wolfgang.

^ permalink raw reply

* Re: [RFC 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Robin Holt @ 2011-08-09 12:40 UTC (permalink / raw)
  To: Marc Kleine-Budde
  Cc: netdev-u79uwXL29TY76Z2rM5mHXA, U Bhaskar-B22300,
	socketcan-core-0fE9KPoRgkgATYTw5x5z8w, PPC list,
	Wolfgang Grandegger
In-Reply-To: <4E41291B.3020001-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

On Tue, Aug 09, 2011 at 02:33:31PM +0200, Marc Kleine-Budde wrote:
> On 08/09/2011 07:55 AM, Robin Holt wrote:
> > I added a clock source for the p1010rdb so the flexcan driver
> > could find its clock frequency.
> > 
> > Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
> > To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
> > To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>,
> > To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
> > Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
> > Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
> 
> After fixing Wolfgangs remarks add by Acked-by, for what it's worth in
> the ppc-world :)

Does that go for the other two patches in the series you have not
commented on in many revs as well?

Robin

^ permalink raw reply

* Re: [PATCH 12/12] headers, ppp: Add missing #include to <linux/if_ppp.h>
From: Ben Hutchings @ 2011-08-09 12:40 UTC (permalink / raw)
  To: David Miller; +Cc: netdev, paulus, linux-ppp
In-Reply-To: <20110809.002738.679747111943821641.davem@davemloft.net>

[-- Attachment #1: Type: text/plain, Size: 1357 bytes --]

On Tue, 2011-08-09 at 00:27 -0700, David Miller wrote:
> From: Ben Hutchings <ben@decadent.org.uk>
> Date: Mon, 08 Aug 2011 14:25:19 +0100
> 
> > <linux/if_ppp.h> uses various types defined in <linux/ppp_defs.h>.
> > 
> > Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
> 
> Unfortunately there is a "net/if_ppp.h" provided by glibc that
> includes "net/ppp_defs.h", and all of this is presumably in order
> to discourage direct use of the kernel headers.
> 
> Even though net/ppp_defs.h ends up including linux/ppp_defs.h
> anyways.
> 
> Whilst I think your efforts are to be commended, we can't start doing
> or else we'll start breaking the build in various unexpected ways.
> 
> The SIOCDEVPRIVATE (defined by GLIBC in bits/ioctls.h) case is just
> one such example.

I did try to check for these cases, but obviously missed some.  I'll
re-post the series without these ones.

In the longer term I would really like to solve this mess somehow.
glibc is obviously duplicating a lot of definitions in different headers
(but tends to lag behind a little) and other C libraries may also have
to duplicate that work for compatibility.  Some kernel headers already
*do* include headers such as <linux/if.h> that can conflict with C
library headers, sometimes requiring userland to work around the
conflict somehow.

Ben.


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^ permalink raw reply

* Re: [RFC 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Marc Kleine-Budde @ 2011-08-09 12:33 UTC (permalink / raw)
  To: Robin Holt
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
	netdev-u79uwXL29TY76Z2rM5mHXA, U Bhaskar-B22300, PPC list,
	Wolfgang Grandegger
In-Reply-To: <1312869313-22434-5-git-send-email-holt-sJ/iWh9BUns@public.gmane.org>


[-- Attachment #1.1: Type: text/plain, Size: 5934 bytes --]

On 08/09/2011 07:55 AM, Robin Holt wrote:
> I added a clock source for the p1010rdb so the flexcan driver
> could find its clock frequency.
> 
> Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
> To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
> To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>,
> To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
> Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
> Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>

After fixing Wolfgangs remarks add by Acked-by, for what it's worth in
the ppc-world :)

Some nitpicking from me :) - Darn you send another patch. This comments
still apply.

> 
> ---
> 
> Could I also get a ruling on the Kconfig language.  I could do it either
> with the 85xx_HAVE_CAN_FLEXCAN in or out of the Kconfig file.  It felt
> like the right thing to do was without, but the arm Kconfig files do
> it this way and a patch from freescale had something similar so I went
> this route.
> 
>  arch/powerpc/platforms/85xx/Kconfig    |    6 +++
>  arch/powerpc/platforms/85xx/Makefile   |    1 +
>  arch/powerpc/platforms/85xx/clock.c    |   59 ++++++++++++++++++++++++++++++++
>  arch/powerpc/platforms/85xx/p1010rdb.c |    8 ++++
>  4 files changed, 74 insertions(+), 0 deletions(-)
>  create mode 100644 arch/powerpc/platforms/85xx/clock.c
> 
> diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
> index 498534c..ed4cf92 100644
> --- a/arch/powerpc/platforms/85xx/Kconfig
> +++ b/arch/powerpc/platforms/85xx/Kconfig
> @@ -26,6 +26,10 @@ config MPC8560_ADS
>  	help
>  	  This option enables support for the MPC 8560 ADS board
>  
> +config 85xx_HAVE_CAN_FLEXCAN
> +	bool
> +	select HAVE_CAN_FLEXCAN if NET && CAN
> +
>  config MPC85xx_CDS
>  	bool "Freescale MPC85xx CDS"
>  	select DEFAULT_UIMAGE
> @@ -70,6 +74,8 @@ config MPC85xx_RDB
>  config P1010_RDB
>  	bool "Freescale P1010RDB"
>  	select DEFAULT_UIMAGE
> +	select 85xx_HAVE_CAN_FLEXCAN
> +	select PPC_CLOCK if CAN_FLEXCAN
>  	help
>  	  This option enables support for the MPC85xx RDB (P1010 RDB) board
>  
> diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
> index a971b32..64ad7a4 100644
> --- a/arch/powerpc/platforms/85xx/Makefile
> +++ b/arch/powerpc/platforms/85xx/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
>  obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
>  obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
>  obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
> +obj-$(CONFIG_PPC_CLOCK)   += clock.o
>  obj-$(CONFIG_P1022_DS)    += p1022_ds.o
>  obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
>  obj-$(CONFIG_P2040_RDB)   += p2040_rdb.o corenet_ds.o
> diff --git a/arch/powerpc/platforms/85xx/clock.c b/arch/powerpc/platforms/85xx/clock.c
> new file mode 100644
> index 0000000..a25cbf3
> --- /dev/null
> +++ b/arch/powerpc/platforms/85xx/clock.c
> @@ -0,0 +1,59 @@

Please add your copyright notice and add a license, e.g. "This file is
released under GPLv2"

> +
> +#include <linux/device.h>
> +#include <linux/err.h>
> +
> +#include <asm/clk_interface.h>
> +
> +#include <sysdev/fsl_soc.h>
> +
> +/*
> + * p1010rdb needs to provide a clock source for the flexcan driver.
> + */
> +struct clk {
> +	unsigned long rate;
> +} p1010_rdb_system_clock;
> +
> +static struct clk *p1010_rdb_clk_get(struct device *dev, const char *id)
> +{
> +	const char *dev_init_name;
> +
> +	if (!dev)
> +		return ERR_PTR(-ENOENT);
> +
> +	/*
> +	 * The can devices are named ffe1c000.can0 and ffe1d000.can1 on
> +	 * the p1010rdb.  Check for the "can" portion of that name before
> +	 * returning a clock source.
> +	 */
> +	dev_init_name = dev_name(dev);
> +	if (strlen(dev_init_name) != 13)
> +		return ERR_PTR(-ENOENT);
> +	dev_init_name += 9;
> +	if (strncmp(dev_init_name, "can", 3))
> +		return ERR_PTR(-ENOENT);
> +
> +	return &p1010_rdb_system_clock;
> +}
> +
> +static void p1010_rdb_clk_put(struct clk *clk)
> +{
> +	return;
> +}
> +
> +static unsigned long p1010_rdb_clk_get_rate(struct clk *clk)
> +{
> +	return clk->rate;
> +}
> +
> +static struct clk_interface p1010_rdb_clk_functions = {
> +	.clk_get		= p1010_rdb_clk_get,
> +	.clk_get_rate		= p1010_rdb_clk_get_rate,
> +	.clk_put		= p1010_rdb_clk_put,

no indention here please, just one space before the "=". YMMV

> +};
> +
> +void __init p1010_rdb_clk_init(void)
> +{
> +	p1010_rdb_system_clock.rate = fsl_get_sys_freq();
> +	clk_functions = p1010_rdb_clk_functions;
> +}
> +
> diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
> index d7387fa..29e04d6 100644
> --- a/arch/powerpc/platforms/85xx/p1010rdb.c
> +++ b/arch/powerpc/platforms/85xx/p1010rdb.c
> @@ -81,6 +81,13 @@ static void __init p1010_rdb_setup_arch(void)
>  	printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
>  }
>  
> +static void __init p1010_rdb_init(void)
> +{
> +#ifdef PPC_CLOCK
> +	p1010_rdb_clk_init();
> +#endif
> +}
> +
>  static struct of_device_id __initdata p1010rdb_ids[] = {
>  	{ .type = "soc", },
>  	{ .compatible = "soc", },
> @@ -111,6 +118,7 @@ define_machine(p1010_rdb) {
>  	.name			= "P1010 RDB",
>  	.probe			= p1010_rdb_probe,
>  	.setup_arch		= p1010_rdb_setup_arch,
> +	.init			= p1010_rdb_init,
>  	.init_IRQ		= p1010_rdb_pic_init,
>  #ifdef CONFIG_PCI
>  	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,

cheers, Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |


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_______________________________________________
Socketcan-core mailing list
Socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
https://lists.berlios.de/mailman/listinfo/socketcan-core

^ permalink raw reply

* [PATCH 2/4] [flexcan] Abstract off read/write for big/little endian.
From: Robin Holt @ 2011-08-09 12:28 UTC (permalink / raw)
  To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
	U Bhaskar-B22300
  Cc: Robin Holt, Marc Kleine-Budde, socketcan-core, netdev, PPC list
In-Reply-To: <1312892907-20419-1-git-send-email-holt@sgi.com>

Make flexcan driver handle register reads in the appropriate endianess.
This was a basic search and replace and then define some inlines.

Signed-off-by: Robin Holt <holt@sgi.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
To: Wolfgang Grandegger <wg@grandegger.com>
To: U Bhaskar-B22300 <B22300@freescale.com>
Cc: socketcan-core@lists.berlios.de
Cc: netdev@vger.kernel.org
Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
---
 drivers/net/can/flexcan.c |  140 ++++++++++++++++++++++++++------------------
 1 files changed, 83 insertions(+), 57 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 586b2cd..68cbe52 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -190,6 +190,31 @@ static struct can_bittiming_const flexcan_bittiming_const = {
 };
 
 /*
+ * Abstract off the read/write for arm versus ppc.
+ */
+#if defined(__BIG_ENDIAN)
+static inline u32 flexcan_read(void __iomem *addr)
+{
+	return in_be32(addr);
+}
+
+static inline void flexcan_write(u32 val, void __iomem *addr)
+{
+	out_be32(addr, val);
+}
+#else
+static inline u32 flexcan_read(void __iomem *addr)
+{
+	return readl(addr);
+}
+
+static inline void flexcan_write(u32 val, void __iomem *addr)
+{
+	writel(val, addr);
+}
+#endif
+
+/*
  * Swtich transceiver on or off
  */
 static void flexcan_transceiver_switch(const struct flexcan_priv *priv, int on)
@@ -210,9 +235,9 @@ static inline void flexcan_chip_enable(struct flexcan_priv *priv)
 	struct flexcan_regs __iomem *regs = priv->base;
 	u32 reg;
 
-	reg = readl(&regs->mcr);
+	reg = flexcan_read(&regs->mcr);
 	reg &= ~FLEXCAN_MCR_MDIS;
-	writel(reg, &regs->mcr);
+	flexcan_write(reg, &regs->mcr);
 
 	udelay(10);
 }
@@ -222,9 +247,9 @@ static inline void flexcan_chip_disable(struct flexcan_priv *priv)
 	struct flexcan_regs __iomem *regs = priv->base;
 	u32 reg;
 
-	reg = readl(&regs->mcr);
+	reg = flexcan_read(&regs->mcr);
 	reg |= FLEXCAN_MCR_MDIS;
-	writel(reg, &regs->mcr);
+	flexcan_write(reg, &regs->mcr);
 }
 
 static int flexcan_get_berr_counter(const struct net_device *dev,
@@ -232,7 +257,7 @@ static int flexcan_get_berr_counter(const struct net_device *dev,
 {
 	const struct flexcan_priv *priv = netdev_priv(dev);
 	struct flexcan_regs __iomem *regs = priv->base;
-	u32 reg = readl(&regs->ecr);
+	u32 reg = flexcan_read(&regs->ecr);
 
 	bec->txerr = (reg >> 0) & 0xff;
 	bec->rxerr = (reg >> 8) & 0xff;
@@ -266,15 +291,15 @@ static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
 	if (cf->can_dlc > 0) {
 		u32 data = be32_to_cpup((__be32 *)&cf->data[0]);
-		writel(data, &regs->cantxfg[FLEXCAN_TX_BUF_ID].data[0]);
+		flexcan_write(data, &regs->cantxfg[FLEXCAN_TX_BUF_ID].data[0]);
 	}
 	if (cf->can_dlc > 3) {
 		u32 data = be32_to_cpup((__be32 *)&cf->data[4]);
-		writel(data, &regs->cantxfg[FLEXCAN_TX_BUF_ID].data[1]);
+		flexcan_write(data, &regs->cantxfg[FLEXCAN_TX_BUF_ID].data[1]);
 	}
 
-	writel(can_id, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_id);
-	writel(ctrl, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
+	flexcan_write(can_id, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_id);
+	flexcan_write(ctrl, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
 
 	kfree_skb(skb);
 
@@ -462,8 +487,8 @@ static void flexcan_read_fifo(const struct net_device *dev,
 	struct flexcan_mb __iomem *mb = &regs->cantxfg[0];
 	u32 reg_ctrl, reg_id;
 
-	reg_ctrl = readl(&mb->can_ctrl);
-	reg_id = readl(&mb->can_id);
+	reg_ctrl = flexcan_read(&mb->can_ctrl);
+	reg_id = flexcan_read(&mb->can_id);
 	if (reg_ctrl & FLEXCAN_MB_CNT_IDE)
 		cf->can_id = ((reg_id >> 0) & CAN_EFF_MASK) | CAN_EFF_FLAG;
 	else
@@ -473,12 +498,12 @@ static void flexcan_read_fifo(const struct net_device *dev,
 		cf->can_id |= CAN_RTR_FLAG;
 	cf->can_dlc = get_can_dlc((reg_ctrl >> 16) & 0xf);
 
-	*(__be32 *)(cf->data + 0) = cpu_to_be32(readl(&mb->data[0]));
-	*(__be32 *)(cf->data + 4) = cpu_to_be32(readl(&mb->data[1]));
+	*(__be32 *)(cf->data + 0) = cpu_to_be32(flexcan_read(&mb->data[0]));
+	*(__be32 *)(cf->data + 4) = cpu_to_be32(flexcan_read(&mb->data[1]));
 
 	/* mark as read */
-	writel(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &regs->iflag1);
-	readl(&regs->timer);
+	flexcan_write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &regs->iflag1);
+	flexcan_read(&regs->timer);
 }
 
 static int flexcan_read_frame(struct net_device *dev)
@@ -514,17 +539,17 @@ static int flexcan_poll(struct napi_struct *napi, int quota)
 	 * The error bits are cleared on read,
 	 * use saved value from irq handler.
 	 */
-	reg_esr = readl(&regs->esr) | priv->reg_esr;
+	reg_esr = flexcan_read(&regs->esr) | priv->reg_esr;
 
 	/* handle state changes */
 	work_done += flexcan_poll_state(dev, reg_esr);
 
 	/* handle RX-FIFO */
-	reg_iflag1 = readl(&regs->iflag1);
+	reg_iflag1 = flexcan_read(&regs->iflag1);
 	while (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE &&
 	       work_done < quota) {
 		work_done += flexcan_read_frame(dev);
-		reg_iflag1 = readl(&regs->iflag1);
+		reg_iflag1 = flexcan_read(&regs->iflag1);
 	}
 
 	/* report bus errors */
@@ -534,8 +559,8 @@ static int flexcan_poll(struct napi_struct *napi, int quota)
 	if (work_done < quota) {
 		napi_complete(napi);
 		/* enable IRQs */
-		writel(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
-		writel(priv->reg_ctrl_default, &regs->ctrl);
+		flexcan_write(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
+		flexcan_write(priv->reg_ctrl_default, &regs->ctrl);
 	}
 
 	return work_done;
@@ -549,9 +574,9 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
 	struct flexcan_regs __iomem *regs = priv->base;
 	u32 reg_iflag1, reg_esr;
 
-	reg_iflag1 = readl(&regs->iflag1);
-	reg_esr = readl(&regs->esr);
-	writel(FLEXCAN_ESR_ERR_INT, &regs->esr);	/* ACK err IRQ */
+	reg_iflag1 = flexcan_read(&regs->iflag1);
+	reg_esr = flexcan_read(&regs->esr);
+	flexcan_write(FLEXCAN_ESR_ERR_INT, &regs->esr);	/* ACK err IRQ */
 
 	/*
 	 * schedule NAPI in case of:
@@ -567,16 +592,16 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
 		 * save them for later use.
 		 */
 		priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS;
-		writel(FLEXCAN_IFLAG_DEFAULT & ~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE,
-		       &regs->imask1);
-		writel(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
+		flexcan_write(FLEXCAN_IFLAG_DEFAULT &
+			~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &regs->imask1);
+		flexcan_write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
 		       &regs->ctrl);
 		napi_schedule(&priv->napi);
 	}
 
 	/* FIFO overflow */
 	if (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) {
-		writel(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, &regs->iflag1);
+		flexcan_write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, &regs->iflag1);
 		dev->stats.rx_over_errors++;
 		dev->stats.rx_errors++;
 	}
@@ -585,7 +610,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
 	if (reg_iflag1 & (1 << FLEXCAN_TX_BUF_ID)) {
 		/* tx_bytes is incremented in flexcan_start_xmit */
 		stats->tx_packets++;
-		writel((1 << FLEXCAN_TX_BUF_ID), &regs->iflag1);
+		flexcan_write((1 << FLEXCAN_TX_BUF_ID), &regs->iflag1);
 		netif_wake_queue(dev);
 	}
 
@@ -599,7 +624,7 @@ static void flexcan_set_bittiming(struct net_device *dev)
 	struct flexcan_regs __iomem *regs = priv->base;
 	u32 reg;
 
-	reg = readl(&regs->ctrl);
+	reg = flexcan_read(&regs->ctrl);
 	reg &= ~(FLEXCAN_CTRL_PRESDIV(0xff) |
 		 FLEXCAN_CTRL_RJW(0x3) |
 		 FLEXCAN_CTRL_PSEG1(0x7) |
@@ -623,11 +648,11 @@ static void flexcan_set_bittiming(struct net_device *dev)
 		reg |= FLEXCAN_CTRL_SMP;
 
 	dev_info(dev->dev.parent, "writing ctrl=0x%08x\n", reg);
-	writel(reg, &regs->ctrl);
+	flexcan_write(reg, &regs->ctrl);
 
 	/* print chip status */
 	dev_dbg(dev->dev.parent, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,
-		readl(&regs->mcr), readl(&regs->ctrl));
+		flexcan_read(&regs->mcr), flexcan_read(&regs->ctrl));
 }
 
 /*
@@ -648,10 +673,10 @@ static int flexcan_chip_start(struct net_device *dev)
 	flexcan_chip_enable(priv);
 
 	/* soft reset */
-	writel(FLEXCAN_MCR_SOFTRST, &regs->mcr);
+	flexcan_write(FLEXCAN_MCR_SOFTRST, &regs->mcr);
 	udelay(10);
 
-	reg_mcr = readl(&regs->mcr);
+	reg_mcr = flexcan_read(&regs->mcr);
 	if (reg_mcr & FLEXCAN_MCR_SOFTRST) {
 		dev_err(dev->dev.parent,
 			"Failed to softreset can module (mcr=0x%08x)\n",
@@ -673,12 +698,12 @@ static int flexcan_chip_start(struct net_device *dev)
 	 * choose format C
 	 *
 	 */
-	reg_mcr = readl(&regs->mcr);
+	reg_mcr = flexcan_read(&regs->mcr);
 	reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT |
 		FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN |
 		FLEXCAN_MCR_IDAM_C;
 	dev_dbg(dev->dev.parent, "%s: writing mcr=0x%08x", __func__, reg_mcr);
-	writel(reg_mcr, &regs->mcr);
+	flexcan_write(reg_mcr, &regs->mcr);
 
 	/*
 	 * CTRL
@@ -696,7 +721,7 @@ static int flexcan_chip_start(struct net_device *dev)
 	 * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any
 	 * warning or bus passive interrupts.
 	 */
-	reg_ctrl = readl(&regs->ctrl);
+	reg_ctrl = flexcan_read(&regs->ctrl);
 	reg_ctrl &= ~FLEXCAN_CTRL_TSYN;
 	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |
 		FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK;
@@ -704,38 +729,39 @@ static int flexcan_chip_start(struct net_device *dev)
 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;
 	dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
-	writel(reg_ctrl, &regs->ctrl);
+	flexcan_write(reg_ctrl, &regs->ctrl);
 
 	for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) {
-		writel(0, &regs->cantxfg[i].can_ctrl);
-		writel(0, &regs->cantxfg[i].can_id);
-		writel(0, &regs->cantxfg[i].data[0]);
-		writel(0, &regs->cantxfg[i].data[1]);
+		flexcan_write(0, &regs->cantxfg[i].can_ctrl);
+		flexcan_write(0, &regs->cantxfg[i].can_id);
+		flexcan_write(0, &regs->cantxfg[i].data[0]);
+		flexcan_write(0, &regs->cantxfg[i].data[1]);
 
 		/* put MB into rx queue */
-		writel(FLEXCAN_MB_CNT_CODE(0x4), &regs->cantxfg[i].can_ctrl);
+		flexcan_write(FLEXCAN_MB_CNT_CODE(0x4),
+			&regs->cantxfg[i].can_ctrl);
 	}
 
 	/* acceptance mask/acceptance code (accept everything) */
-	writel(0x0, &regs->rxgmask);
-	writel(0x0, &regs->rx14mask);
-	writel(0x0, &regs->rx15mask);
+	flexcan_write(0x0, &regs->rxgmask);
+	flexcan_write(0x0, &regs->rx14mask);
+	flexcan_write(0x0, &regs->rx15mask);
 
 	flexcan_transceiver_switch(priv, 1);
 
 	/* synchronize with the can bus */
-	reg_mcr = readl(&regs->mcr);
+	reg_mcr = flexcan_read(&regs->mcr);
 	reg_mcr &= ~FLEXCAN_MCR_HALT;
-	writel(reg_mcr, &regs->mcr);
+	flexcan_write(reg_mcr, &regs->mcr);
 
 	priv->can.state = CAN_STATE_ERROR_ACTIVE;
 
 	/* enable FIFO interrupts */
-	writel(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
+	flexcan_write(FLEXCAN_IFLAG_DEFAULT, &regs->imask1);
 
 	/* print chip status */
 	dev_dbg(dev->dev.parent, "%s: reading mcr=0x%08x ctrl=0x%08x\n",
-		__func__, readl(&regs->mcr), readl(&regs->ctrl));
+		__func__, flexcan_read(&regs->mcr), flexcan_read(&regs->ctrl));
 
 	return 0;
 
@@ -757,12 +783,12 @@ static void flexcan_chip_stop(struct net_device *dev)
 	u32 reg;
 
 	/* Disable all interrupts */
-	writel(0, &regs->imask1);
+	flexcan_write(0, &regs->imask1);
 
 	/* Disable + halt module */
-	reg = readl(&regs->mcr);
+	reg = flexcan_read(&regs->mcr);
 	reg |= FLEXCAN_MCR_MDIS | FLEXCAN_MCR_HALT;
-	writel(reg, &regs->mcr);
+	flexcan_write(reg, &regs->mcr);
 
 	flexcan_transceiver_switch(priv, 0);
 	priv->can.state = CAN_STATE_STOPPED;
@@ -854,24 +880,24 @@ static int __devinit register_flexcandev(struct net_device *dev)
 
 	/* select "bus clock", chip must be disabled */
 	flexcan_chip_disable(priv);
-	reg = readl(&regs->ctrl);
+	reg = flexcan_read(&regs->ctrl);
 	reg |= FLEXCAN_CTRL_CLK_SRC;
-	writel(reg, &regs->ctrl);
+	flexcan_write(reg, &regs->ctrl);
 
 	flexcan_chip_enable(priv);
 
 	/* set freeze, halt and activate FIFO, restrict register access */
-	reg = readl(&regs->mcr);
+	reg = flexcan_read(&regs->mcr);
 	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |
 		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;
-	writel(reg, &regs->mcr);
+	flexcan_write(reg, &regs->mcr);
 
 	/*
 	 * Currently we only support newer versions of this core
 	 * featuring a RX FIFO. Older cores found on some Coldfire
 	 * derivates are not yet supported.
 	 */
-	reg = readl(&regs->mcr);
+	reg = flexcan_read(&regs->mcr);
 	if (!(reg & FLEXCAN_MCR_FEN)) {
 		dev_err(dev->dev.parent,
 			"Could not enable RX FIFO, unsupported core\n");
-- 
1.7.2.1


^ permalink raw reply related

* [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Robin Holt @ 2011-08-09 12:28 UTC (permalink / raw)
  To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
	U Bhaskar-B22300
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w, , PPC list,
	netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1312892907-20419-1-git-send-email-holt-sJ/iWh9BUns@public.gmane.org>

I added a simple clock source for the p1010rdb so the flexcan driver
could determine a clock frequency.  The p1010 can device only has an
oscillator of system bus frequency divided by 2.

Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>,
To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org,
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
---
 arch/powerpc/platforms/85xx/Kconfig    |    2 +
 arch/powerpc/platforms/85xx/Makefile   |    2 +
 arch/powerpc/platforms/85xx/clock.c    |   42 ++++++++++++++++++++++++++++++++
 arch/powerpc/platforms/85xx/p1010rdb.c |    8 ++++++
 4 files changed, 54 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/clock.c

diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 498534c..c4304ae 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -70,6 +70,8 @@ config MPC85xx_RDB
 config P1010_RDB
 	bool "Freescale P1010RDB"
 	select DEFAULT_UIMAGE
+	select HAVE_CAN_FLEXCAN if NET && CAN
+	select PPC_CLOCK if CAN_FLEXCAN
 	help
 	  This option enables support for the MPC85xx RDB (P1010 RDB) board
 
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index a971b32..cc7f381 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -3,6 +3,8 @@
 #
 obj-$(CONFIG_SMP) += smp.o
 
+obj-$(CONFIG_PPC_CLOCK)   += clock.o
+
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/clock.c b/arch/powerpc/platforms/85xx/clock.c
new file mode 100644
index 0000000..a6fd2c8
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/clock.c
@@ -0,0 +1,42 @@
+
+#include <linux/device.h>
+#include <linux/err.h>
+
+#include <asm/clk_interface.h>
+
+#include <sysdev/fsl_soc.h>
+
+/*
+ * p1010 needs to provide a clock source for the flexcan driver. The
+ * oscillator for the p1010 processor is only ever the system clock / 2.
+ */
+
+static struct clk *mpc85xx_clk_get(struct device *dev, const char *id)
+{
+	if (!dev)
+		return ERR_PTR(-ENOENT);
+
+	return NULL;
+}
+
+static void mpc85xx_clk_put(struct clk *clk)
+{
+	return;
+}
+
+static unsigned long mpc85xx_clk_get_rate(struct clk *clk)
+{
+	return fsl_get_sys_freq() / 2;
+}
+
+static struct clk_interface mpc85xx_clk_functions = {
+	.clk_get		= mpc85xx_clk_get,
+	.clk_get_rate		= mpc85xx_clk_get_rate,
+	.clk_put		= mpc85xx_clk_put,
+};
+
+void __init mpc85xx_clk_init(void)
+{
+	clk_functions = mpc85xx_clk_functions;
+}
+
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index d7387fa..5e52122 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -81,6 +81,13 @@ static void __init p1010_rdb_setup_arch(void)
 	printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
 }
 
+extern void mpc85xx_clk_init(void);
+
+static void __init p1010_rdb_init(void)
+{
+	mpc85xx_clk_init();
+}
+
 static struct of_device_id __initdata p1010rdb_ids[] = {
 	{ .type = "soc", },
 	{ .compatible = "soc", },
@@ -111,6 +118,7 @@ define_machine(p1010_rdb) {
 	.name			= "P1010 RDB",
 	.probe			= p1010_rdb_probe,
 	.setup_arch		= p1010_rdb_setup_arch,
+	.init			= p1010_rdb_init,
 	.init_IRQ		= p1010_rdb_pic_init,
 #ifdef CONFIG_PCI
 	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
-- 
1.7.2.1

^ permalink raw reply related

* [PATCH 3/4] [flexcan] Add of_match to platform_device definition.
From: Robin Holt @ 2011-08-09 12:28 UTC (permalink / raw)
  To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
	U Bhaskar-B22300
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
	netdev-u79uwXL29TY76Z2rM5mHXA, PPC list
In-Reply-To: <1312892907-20419-1-git-send-email-holt-sJ/iWh9BUns@public.gmane.org>

On powerpc, the OpenFirmware devices are not matched without specifying
an of_match array.  Introduce that array as that is used for matching
on the Freescale P1010 processor.

Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
---
 drivers/net/can/flexcan.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 68cbe52..662f832 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1027,8 +1027,19 @@ static int __devexit flexcan_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static struct of_device_id flexcan_of_match[] = {
+	{
+		.compatible = "fsl,flexcan",
+	},
+	{},
+};
+
 static struct platform_driver flexcan_driver = {
-	.driver.name = DRV_NAME,
+	.driver = {
+		.name = DRV_NAME,
+		.owner = THIS_MODULE,
+		.of_match_table = flexcan_of_match,
+	},
 	.probe = flexcan_probe,
 	.remove = __devexit_p(flexcan_remove),
 };
-- 
1.7.2.1

^ permalink raw reply related

* [PATCH 1/4] [flexcan] Remove #include <mach/clock.h>
From: Robin Holt @ 2011-08-09 12:28 UTC (permalink / raw)
  To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
	U Bhaskar-B22300
  Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w,
	netdev-u79uwXL29TY76Z2rM5mHXA, PPC list
In-Reply-To: <1312892907-20419-1-git-send-email-holt-sJ/iWh9BUns@public.gmane.org>

powerpc does not have a mach-####/clock.h.  When testing, I found neither
arm nor powerpc needed the mach/clock.h at all so I removed it.

Signed-off-by: Robin Holt <holt-sJ/iWh9BUns@public.gmane.org>
To: Marc Kleine-Budde <mkl-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
To: U Bhaskar-B22300 <B22300-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: socketcan-core-0fE9KPoRgkgATYTw5x5z8w@public.gmane.org
Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: PPC list <linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
---
 drivers/net/can/flexcan.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 1767811..586b2cd 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -35,8 +35,6 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
-#include <mach/clock.h>
-
 #define DRV_NAME			"flexcan"
 
 /* 8 for RX fifo and 2 error handling */
-- 
1.7.2.1

^ permalink raw reply related


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