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* Re: [PATCH] netback: Fix alert message.
From: Ian Campbell @ 2011-12-05 16:58 UTC (permalink / raw)
  To: Wei Liu; +Cc: xen-devel@lists.xensource.com, netdev@vger.kernel.org
In-Reply-To: <1323104264-3601-1-git-send-email-wei.liu2@citrix.com>

On Mon, 2011-12-05 at 16:57 +0000, Wei Liu wrote:
> The original message in netback_init was 'kthread_run() fails', which should be
> 'kthread_create() fails'.
> 
> Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>

Thanks!

Ian.

> ---
>  drivers/net/xen-netback/netback.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c
> index 1ae270e..15e332d 100644
> --- a/drivers/net/xen-netback/netback.c
> +++ b/drivers/net/xen-netback/netback.c
> @@ -1668,7 +1668,7 @@ static int __init netback_init(void)
>  					     "netback/%u", group);
>  
>  		if (IS_ERR(netbk->task)) {
> -			printk(KERN_ALERT "kthread_run() fails at netback\n");
> +			printk(KERN_ALERT "kthread_create() fails at netback\n");
>  			del_timer(&netbk->net_timer);
>  			rc = PTR_ERR(netbk->task);
>  			goto failed_init;

^ permalink raw reply

* Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
From: Jerome Glisse @ 2011-12-05 17:10 UTC (permalink / raw)
  To: Markus Trippelsdorf
  Cc: Dave Airlie, Christoph Lameter, Alex, Shi, Eric Dumazet,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel,
	Pekka Enberg, linux-mm@kvack.org, Matt Mackall, tj, Alex Deucher
In-Reply-To: <20111204010200.GA1530@x4.trippels.de>

[-- Attachment #1: Type: text/plain, Size: 1213 bytes --]

On Sun, Dec 04, 2011 at 02:02:00AM +0100, Markus Trippelsdorf wrote:
> On 2011.12.03 at 14:31 -0500, Jerome Glisse wrote:
> > On Sat, Dec 3, 2011 at 7:29 AM, Markus Trippelsdorf
> > <markus@trippelsdorf.de> wrote:
> > > On 2011.12.03 at 12:20 +0000, Dave Airlie wrote:
> > >> >> > > > > FIX idr_layer_cache: Marking all objects used
> > >> >> > > >
> > >> >> > > > Yesterday I couldn't reproduce the issue at all. But today I've hit
> > >> >> > > > exactly the same spot again. (CCing the drm list)
> > >>
> > >> If I had to guess it looks like 0 is getting written back to some
> > >> random page by the GPU maybe, it could be that the GPU is in some half
> > >> setup state at boot or on a reboot does it happen from a cold boot or
> > >> just warm boot or kexec?
> > >
> > > Only happened with kexec thus far. Cold boot seems to be fine.
> > >
> > > --
> > > Markus
> > 
> > Can you add radeon.no_wb=1 to your kexec kernel paramater an see if
> > you can reproduce.
> 
> No, I cannot reproduce the issue with radeon.no_wb=1. (I write this
> after 700 successful kexec iterations...)
> 
> -- 
> Markus

Can you try if attached patch fix the issue when you don't pass the
radeon.no_wb=1 option ?

Cheers,
Jerome

[-- Attachment #2: 0001-drm-radeon-disable-possible-GPU-writeback-early.patch --]
[-- Type: text/plain, Size: 27869 bytes --]

>From 5e3e9d9b3069837a07bea7b4997c6fca26405bce Mon Sep 17 00:00:00 2001
From: Jerome Glisse <jglisse@redhat.com>
Date: Mon, 5 Dec 2011 12:02:17 -0500
Subject: [PATCH] drm/radeon: disable possible GPU writeback early

Given how kexec works we need to disable any kind of GPU writeback
early in GPU initialization just in case some are still active from
previous setup.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
---
 drivers/gpu/drm/radeon/evergreen.c |    7 ++++++
 drivers/gpu/drm/radeon/ni.c        |    9 +++++++
 drivers/gpu/drm/radeon/nid.h       |   19 ++++++++++++++++
 drivers/gpu/drm/radeon/r100.c      |    7 ++++++
 drivers/gpu/drm/radeon/r300.c      |    7 ++++++
 drivers/gpu/drm/radeon/r300d.h     |   21 ++++++++++++++++++
 drivers/gpu/drm/radeon/r420.c      |    7 ++++++
 drivers/gpu/drm/radeon/r420d.h     |   42 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/radeon/r520.c      |   10 ++++++++
 drivers/gpu/drm/radeon/r520d.h     |   24 ++++++++++++++++++++
 drivers/gpu/drm/radeon/r600.c      |    7 ++++++
 drivers/gpu/drm/radeon/rs400.c     |    7 ++++++
 drivers/gpu/drm/radeon/rs400d.h    |   21 ++++++++++++++++++
 drivers/gpu/drm/radeon/rs600.c     |   10 ++++++++
 drivers/gpu/drm/radeon/rs600d.h    |   21 ++++++++++++++++++
 drivers/gpu/drm/radeon/rs690.c     |   10 ++++++++
 drivers/gpu/drm/radeon/rs690d.h    |   24 ++++++++++++++++++++
 drivers/gpu/drm/radeon/rv515.c     |   10 ++++++++
 drivers/gpu/drm/radeon/rv515d.h    |   24 ++++++++++++++++++++
 drivers/gpu/drm/radeon/rv770.c     |    7 ++++++
 drivers/gpu/drm/radeon/rv770d.h    |   20 +++++++++++++++++
 21 files changed, 314 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 1934728..d49596b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3249,6 +3249,13 @@ int evergreen_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB_CNTL, RB_NO_UPDATE);
+
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index c15fc8b..2a00ad1 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1577,6 +1577,15 @@ int cayman_init(struct radeon_device *rdev)
 	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB0_CNTL, RB_NO_UPDATE);
+	WREG32(CP_RB1_CNTL, RB_NO_UPDATE);
+	WREG32(CP_RB2_CNTL, RB_NO_UPDATE);
+
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 4640334..3aa33c6 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -162,6 +162,25 @@
 #define HDP_MISC_CNTL					0x2F4C
 #define 	HDP_FLUSH_INVALIDATE_CACHE			(1 << 0)
 
+#define IH_RB_CNTL                                        0x3e00
+#       define IH_RB_ENABLE                               (1 << 0)
+#       define IH_IB_SIZE(x)                              ((x) << 1) /* log2 */
+#       define IH_RB_FULL_DRAIN_ENABLE                    (1 << 6)
+#       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
+#       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
+#       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#define IH_CNTL                                           0x3e18
+#       define ENABLE_INTR                                (1 << 0)
+#       define IH_MC_SWAP(x)                              ((x) << 1)
+#       define IH_MC_SWAP_NONE                            0
+#       define IH_MC_SWAP_16BIT                           1
+#       define IH_MC_SWAP_32BIT                           2
+#       define IH_MC_SWAP_64BIT                           3
+#       define RPTR_REARM                                 (1 << 4)
+#       define MC_WRREQ_CREDIT(x)                         ((x) << 15)
+#       define MC_WR_CLEAN_CNT(x)                         ((x) << 20)
+
 #define	CC_SYS_RB_BACKEND_DISABLE			0x3F88
 #define	GC_USER_SYS_RB_BACKEND_DISABLE			0x3F8C
 #define	CGTS_SYS_TCC_DISABLE				0x3F90
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 657040b..8a71502 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -4010,6 +4010,13 @@ int r100_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(RADEON_CP_CSQ_MODE, 0);
+	WREG32(RADEON_CP_CSQ_CNTL, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(RADEON_CP_RB_CNTL, RADEON_RB_NO_UPDATE);
+	WREG32(RADEON_GEN_INT_CNTL, 0);
+
 	/* Register debugfs file specific to this group of asics */
 	r100_debugfs(rdev);
 	/* Disable VGA */
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3fc0d29..63ca887 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1491,6 +1491,13 @@ int r300_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+
 	/* Disable VGA */
 	r100_vga_render_disable(rdev);
 	/* Initialize scratch registers */
diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h
index 1f519a5..b9f5e3e 100644
--- a/drivers/gpu/drm/radeon/r300d.h
+++ b/drivers/gpu/drm/radeon/r300d.h
@@ -350,5 +350,26 @@
 #define   S_00000D_FORCE_OV0(x)                        (((x) & 0x1) << 31)
 #define   G_00000D_FORCE_OV0(x)                        (((x) >> 31) & 0x1)
 #define   C_00000D_FORCE_OV0                           0x7FFFFFFF
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 666e28f..9b9b293 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -360,6 +360,13 @@ int r420_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+
 	/* Initialize scratch registers */
 	radeon_scratch_init(rdev);
 	/* Initialize surface registers */
diff --git a/drivers/gpu/drm/radeon/r420d.h b/drivers/gpu/drm/radeon/r420d.h
index fc78d31..d5ee6e8 100644
--- a/drivers/gpu/drm/radeon/r420d.h
+++ b/drivers/gpu/drm/radeon/r420d.h
@@ -245,5 +245,47 @@
 #define   S_00000D_FORCE_OV0(x)                        (((x) & 0x1) << 31)
 #define   G_00000D_FORCE_OV0(x)                        (((x) >> 31) & 0x1)
 #define   C_00000D_FORCE_OV0                           0x7FFFFFFF
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 4ae1615..403b1d0 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -244,6 +244,16 @@ int r520_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+	WREG32(R_006540_DxMODE_INT_MASK, 0);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+
 	/* Initialize scratch registers */
 	radeon_scratch_init(rdev);
 	/* Initialize surface registers */
diff --git a/drivers/gpu/drm/radeon/r520d.h b/drivers/gpu/drm/radeon/r520d.h
index 61af61f..6d34664 100644
--- a/drivers/gpu/drm/radeon/r520d.h
+++ b/drivers/gpu/drm/radeon/r520d.h
@@ -183,5 +183,29 @@
 #define   S_000007_AGP_BASE_ADDR_2(x)                  (((x) & 0xF) << 0)
 #define   G_000007_AGP_BASE_ADDR_2(x)                  (((x) >> 0) & 0xF)
 #define   C_000007_AGP_BASE_ADDR_2                     0xFFFFFFF0
+#define R_006540_DxMODE_INT_MASK                     0x006540
+#define R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL       0x007D08
+#define R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL       0x007D18
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 951566f..d333909 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2566,6 +2566,13 @@ int r600_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB_CNTL, RB_NO_UPDATE);
+
 	if (r600_debugfs_mc_info_init(rdev)) {
 		DRM_ERROR("Failed to register debugfs file for mc !\n");
 	}
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index b0ce84a..4f708a5 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -494,6 +494,13 @@ int rs400_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+
 	/* Disable VGA */
 	r100_vga_render_disable(rdev);
 	/* Initialize scratch registers */
diff --git a/drivers/gpu/drm/radeon/rs400d.h b/drivers/gpu/drm/radeon/rs400d.h
index 6d8bac5..fc6a9e5 100644
--- a/drivers/gpu/drm/radeon/rs400d.h
+++ b/drivers/gpu/drm/radeon/rs400d.h
@@ -156,5 +156,26 @@
 #define   S_000E40_GUI_ACTIVE(x)                       (((x) & 0x1) << 31)
 #define   G_000E40_GUI_ACTIVE(x)                       (((x) >> 31) & 0x1)
 #define   C_000E40_GUI_ACTIVE                          0x7FFFFFFF
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ca6d5b6..76f56bb 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -939,6 +939,16 @@ int rs600_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+	WREG32(R_006540_DxMODE_INT_MASK, 0);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+
 	/* Disable VGA */
 	rv515_vga_render_disable(rdev);
 	/* Initialize scratch registers */
diff --git a/drivers/gpu/drm/radeon/rs600d.h b/drivers/gpu/drm/radeon/rs600d.h
index a27c13a..54d96e6 100644
--- a/drivers/gpu/drm/radeon/rs600d.h
+++ b/drivers/gpu/drm/radeon/rs600d.h
@@ -668,4 +668,25 @@
 #define   PM_ASSERT_RESET                              (1 << 20)
 #define   PM_PWRDN_PPLL                                (1 << 24)
 
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
+
 #endif
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 4f24a0f..e84913e 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -711,6 +711,16 @@ int rs690_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(RADEON_CP_CSQ_MODE, 0);
+	WREG32(RADEON_CP_CSQ_CNTL, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(RADEON_CP_RB_CNTL, RADEON_RB_NO_UPDATE);
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+	WREG32(R_006540_DxMODE_INT_MASK, 0);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+
 	/* Disable VGA */
 	rv515_vga_render_disable(rdev);
 	/* Initialize scratch registers */
diff --git a/drivers/gpu/drm/radeon/rs690d.h b/drivers/gpu/drm/radeon/rs690d.h
index 36e6398..fa41027 100644
--- a/drivers/gpu/drm/radeon/rs690d.h
+++ b/drivers/gpu/drm/radeon/rs690d.h
@@ -306,5 +306,29 @@
 #define   S_000104_MC_GLOBW_INIT_LAT(x)                (((x) & 0xF) << 28)
 #define   G_000104_MC_GLOBW_INIT_LAT(x)                (((x) >> 28) & 0xF)
 #define   C_000104_MC_GLOBW_INIT_LAT                   0x0FFFFFFF
+#define R_006540_DxMODE_INT_MASK                     0x006540
+#define R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL       0x007D08
+#define R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL       0x007D18
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 880637f..5133d96 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -482,6 +482,16 @@ int rv515_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+	WREG32(R_006540_DxMODE_INT_MASK, 0);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+
 	/* Initialize scratch registers */
 	radeon_scratch_init(rdev);
 	/* Initialize surface registers */
diff --git a/drivers/gpu/drm/radeon/rv515d.h b/drivers/gpu/drm/radeon/rv515d.h
index 590309a..03cddd2 100644
--- a/drivers/gpu/drm/radeon/rv515d.h
+++ b/drivers/gpu/drm/radeon/rv515d.h
@@ -645,5 +645,29 @@
 #define   S_000013_IDCT_NORMAL_POWER_BUSY(x)           (((x) & 0xFF) << 24)
 #define   G_000013_IDCT_NORMAL_POWER_BUSY(x)           (((x) >> 24) & 0xFF)
 #define   C_000013_IDCT_NORMAL_POWER_BUSY              0x00FFFFFF
+#define R_006540_DxMODE_INT_MASK                     0x006540
+#define R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL       0x007D08
+#define R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL       0x007D18
+#define R_000040_GEN_INT_CNTL                        0x000040
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
 
 #endif
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index a1668b6..7f8500b 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1177,6 +1177,13 @@ int rv770_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB_CNTL, RB_NO_UPDATE);
+
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 79fa588..03bed2d 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -38,6 +38,26 @@
 #define R7XX_MAX_PIPES             8
 #define R7XX_MAX_PIPES_MASK        0xff
 
+
+#define IH_RB_CNTL                                        0x3e00
+#       define IH_RB_ENABLE                               (1 << 0)
+#       define IH_IB_SIZE(x)                              ((x) << 1) /* log2 */
+#       define IH_RB_FULL_DRAIN_ENABLE                    (1 << 6)
+#       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
+#       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
+#       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#define IH_CNTL                                           0x3e18
+#       define ENABLE_INTR                                (1 << 0)
+#       define IH_MC_SWAP(x)                              ((x) << 1)
+#       define IH_MC_SWAP_NONE                            0
+#       define IH_MC_SWAP_16BIT                           1
+#       define IH_MC_SWAP_32BIT                           2
+#       define IH_MC_SWAP_64BIT                           3
+#       define RPTR_REARM                                 (1 << 4)
+#       define MC_WRREQ_CREDIT(x)                         ((x) << 15)
+#       define MC_WR_CLEAN_CNT(x)                         ((x) << 20)
+
 /* Registers */
 #define	CB_COLOR0_BASE					0x28040
 #define	CB_COLOR1_BASE					0x28044
-- 
1.7.7.1


^ permalink raw reply related

* Re: pull request: wireless 2011-12-05
From: John W. Linville @ 2011-12-05 17:19 UTC (permalink / raw)
  To: davem; +Cc: linux-wireless, netdev, linux-kernel
In-Reply-To: <20111205163032.GC2531@tuxdriver.com>

[-- Attachment #1: Type: text/plain, Size: 2867 bytes --]

Forgot the signature...I'll sign this one, just in case! :-)

John

On Mon, Dec 05, 2011 at 11:30:32AM -0500, John W. Linville wrote:
> commit cbec0627ef1adf7afa448e8bbae3146ce910212a
> 
> Dave,
> 
> This batch of fixes is intended for 3.2.
> 
> Included is an iwlwifi fix to correctly set some flags related to packet
> encryption, a couple of cfg80211 regulatory fixes (including one that
> patches a hole created by the earlier "cfg80211: fix regulatory NULL
> dereference"), a mac80211 fix to avoid sending probe requests with no
> supported rates included, an iwlwifi fix to prevent reconfiguring HT40
> after an association (prevents an assert in the firmware), and another
> iwlwifi fix that customizes the watchdog timer enablement based on the
> device type.
> 
> Also included is a reversion of a patch that was causing the iwlegacy
> driver to throw WARNINGs.
> 
> Please let me know if there are problems!
> 
> John
> 
> ---
> 
> The following changes since commit f61759e6b831a55b89e584b198c3da325e2bc379:
> 
>   ipv4: make sure RTO_ONLINK is saved in routing cache (2011-12-03 01:32:23 -0500)
> 
> are available in the git repository at:
>   git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless.git for-davem
> 
> Johannes Berg (1):
>       iwlagn: fix HW crypto for TX-only keys
> 
> John W. Linville (2):
>       Revert "mac80211: clear sta.drv_priv on reconfiguration"
>       Merge branch 'master' of git://git.kernel.org/.../linville/wireless into for-davem
> 
> Luis R. Rodriguez (2):
>       cfg80211: fix race on init and driver registration
>       cfg80211: amend regulatory NULL dereference fix
> 
> Simon Wunderlich (1):
>       mac80211: fill rate filter for internal scan requests
> 
> Wey-Yi Guy (2):
>       iwlwifi: do not re-configure HT40 after associated
>       iwlwifi: change the default behavior of watchdog timer
> 
>  drivers/net/wireless/iwlwifi/iwl-1000.c     |    1 +
>  drivers/net/wireless/iwlwifi/iwl-5000.c     |    1 +
>  drivers/net/wireless/iwlwifi/iwl-agn-rxon.c |   36 ++++++++++++-------
>  drivers/net/wireless/iwlwifi/iwl-agn-sta.c  |    5 ---
>  drivers/net/wireless/iwlwifi/iwl-agn.c      |   34 +++++++++---------
>  drivers/net/wireless/iwlwifi/iwl-agn.h      |    2 +
>  drivers/net/wireless/iwlwifi/iwl-core.c     |   22 +++++++++---
>  drivers/net/wireless/iwlwifi/iwl-core.h     |    2 +
>  drivers/net/wireless/iwlwifi/iwl-shared.h   |    4 +-
>  net/mac80211/main.c                         |    6 +++
>  net/mac80211/util.c                         |    1 -
>  net/wireless/reg.c                          |   49 +++++++++++++++++----------
>  12 files changed, 102 insertions(+), 61 deletions(-)

-- 
John W. Linville		Someday the world will need a hero, and you
linville@tuxdriver.com			might be all we have.  Be ready.

[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply

* Re: [PATCH] datapath: Fix build breakage on kernel 2.6.40
From: Jesse Gross @ 2011-12-05 17:32 UTC (permalink / raw)
  To: Zhi Yong Wu; +Cc: dev, stefanha, netdev, aliguori, ryanh
In-Reply-To: <1323052394-12711-1-git-send-email-zwu.kernel@gmail.com>

On Sun, Dec 4, 2011 at 6:33 PM, Zhi Yong Wu <zwu.kernel@gmail.com> wrote:
> Today i played with openvswitch on my workstation with kernel 2.6.40 and found that it break when i built. The
> +issue is introduced by commit ceb176fdb72bb7ce90debc66e1eeb1d25823d30a
>
> Below is the error log:
>
> from /home/zwu/work/virt/openvswitch/datapath/linux/genetlink-brcompat.c:10:
> /home/zwu/work/virt/openvswitch/datapath/linux/compat/include/linux/skbuff.h:243:20: error: redefinition of
> +‘skb_reset_mac_len’
> include/linux/skbuff.h:1259:20: note: previous definition of ‘skb_reset_mac_len’ was here
> make[5]: *** [/home/zwu/work/virt/openvswitch/datapath/linux/genetlink-brcompat.o] Error 1
> make[4]: *** [_module_/home/zwu/work/virt/openvswitch/datapath/linux] Error 2
> make[4]: Leaving directory `/usr/src/kernels/2.6.40.6-0.fc15.x86_64'
> make[3]: *** [default] Error 2
> make[3]: Leaving directory `/home/zwu/work/virt/openvswitch/datapath/linux'
> make[2]: *** [all-recursive] Error 1
> make[2]: Leaving directory `/home/zwu/work/virt/openvswitch/datapath'
> make[1]: *** [all-recursive] Error 1
> make[1]: Leaving directory `/home/zwu/work/virt/openvswitch'
> make: *** [all] Error 2
>
>
> Signed-off-by: Zhi Yong Wu <zwu.kernel@gmail.com>

Applied, thanks.

^ permalink raw reply

* Re: [GIT PULL v3] Open vSwitch
From: Jesse Gross @ 2011-12-05 17:37 UTC (permalink / raw)
  To: Zhi Yong Wu
  Cc: dev-yBygre7rU0TnMu66kgdUjQ, netdev-u79uwXL29TY76Z2rM5mHXA,
	David S. Miller
In-Reply-To: <CAEH94LiXLAKFWkDG5VBo80rFTfXMnxn1=2aEb5qOieBUnoYRyA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Sun, Dec 4, 2011 at 7:32 PM, Zhi Yong Wu <zwu.kernel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Although this series of patchset is a bit large, therefore their codes
> aren't directly pasted here, but if anyone find some issues in the
> codes, how will we point out them?

I also sent out the actual patches that are referenced in this pull
request to the mailing list, so that would be the best place to
provide comments.  For example, this is the first patch in the series:
http://marc.info/?l=linux-netdev&m=132293763127660&w=2

^ permalink raw reply

* Re: CIFS mount: 3.2.0-rc3 suspend crash
From: Tejun Heo @ 2011-12-05 17:41 UTC (permalink / raw)
  To: Srivatsa S. Bhat
  Cc: Woody Suwalski, Jeff Layton, LKML, Rafael J. Wysocki,
	Linux PM mailing list, Belisko Marek,
	linux-cifs-u79uwXL29TY76Z2rM5mHXA, Network Development,
	Greg Kroah-Hartman, davem-fT/PcQaiUtIeIZ0/mPfg9Q
In-Reply-To: <4ED8C940.20509-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>

Hello, Srivatsa.

On Fri, Dec 02, 2011 at 06:19:04PM +0530, Srivatsa S. Bhat wrote:
> So how about solving this problem more fundamentally, such as defining a
> freezable wrapper over kernel_recvmsg like:
> 
> #define kernel_recvmsg_freezable(sock, msg, vec, num, size, flags)      \
> ({                                                                      \
>         kernel_recvmsg(sock, msg, vec, num, size, flags)                \
> 	try_to_freeze();                                                \
> })
> 
> and using it instead of kernel_recvmsg(), throughout the kernel?
> 
> But kernel_recvmsg is an exported symbol. So if we are very very unwilling
> to change the kernel ABI, we could probably think about adding try_to_freeze()
> inside kernel_recvmsg itself,like this (but see below about my thoughts about
> which one is better):

I don't necessarily object to introducing the wrapper but I don't
really think we should be doing s//g over the source tree without
understanding where it's actually necessary.  For kernel threads and
user threads out of the signal delivery path, try_to_freeze() is an
exceptional event which introduces behavior which can be difficult to
reproduce track down and spreading it without actually knowing what
the surrounding code is doing doesn't sound like a good idea to me.

Thank you.

-- 
tejun

^ permalink raw reply

* Re: CIFS mount: 3.2.0-rc3 suspend crash
From: Srivatsa S. Bhat @ 2011-12-05 18:09 UTC (permalink / raw)
  To: Tejun Heo
  Cc: Woody Suwalski, Jeff Layton, LKML, Rafael J. Wysocki,
	Linux PM mailing list, Belisko Marek,
	linux-cifs-u79uwXL29TY76Z2rM5mHXA, Network Development,
	Greg Kroah-Hartman, davem-fT/PcQaiUtIeIZ0/mPfg9Q
In-Reply-To: <20111205174126.GF627-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>

On 12/05/2011 11:11 PM, Tejun Heo wrote:

> Hello, Srivatsa.
> 
> On Fri, Dec 02, 2011 at 06:19:04PM +0530, Srivatsa S. Bhat wrote:
>> So how about solving this problem more fundamentally, such as defining a
>> freezable wrapper over kernel_recvmsg like:
>>
>> #define kernel_recvmsg_freezable(sock, msg, vec, num, size, flags)      \
>> ({                                                                      \
>>         kernel_recvmsg(sock, msg, vec, num, size, flags)                \
>> 	try_to_freeze();                                                \
>> })
>>
>> and using it instead of kernel_recvmsg(), throughout the kernel?
>>
>> But kernel_recvmsg is an exported symbol. So if we are very very unwilling
>> to change the kernel ABI, we could probably think about adding try_to_freeze()
>> inside kernel_recvmsg itself,like this (but see below about my thoughts about
>> which one is better):
> 
> I don't necessarily object to introducing the wrapper but I don't
> really think we should be doing s//g over the source tree without
> understanding where it's actually necessary.  For kernel threads and
> user threads out of the signal delivery path, try_to_freeze() is an
> exceptional event which introduces behavior which can be difficult to
> reproduce track down and spreading it without actually knowing what
> the surrounding code is doing doesn't sound like a good idea to me.
> 


Yeah, I agree. But I remember seeing almost _exactly_ the same code
as CIFS loop in some other place. I'll see if I can track it down and
also understand if it might cause problems. If I find it to be worth it
to use the same solution as above, I'll try adding the wrapper and using
it there. Else, better to keep it as it is, as you mentioned. Thank you.

Regards,
Srivatsa S. Bhat

^ permalink raw reply

* Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
From: Markus Trippelsdorf @ 2011-12-05 18:15 UTC (permalink / raw)
  To: Jerome Glisse
  Cc: Dave Airlie, Christoph Lameter, Alex, Shi, Eric Dumazet,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel,
	Pekka Enberg, linux-mm@kvack.org, Matt Mackall, tj, Alex Deucher
In-Reply-To: <20111205171046.GA4342@homer.localdomain>

On 2011.12.05 at 12:10 -0500, Jerome Glisse wrote:
> On Sun, Dec 04, 2011 at 02:02:00AM +0100, Markus Trippelsdorf wrote:
> > On 2011.12.03 at 14:31 -0500, Jerome Glisse wrote:
> > > On Sat, Dec 3, 2011 at 7:29 AM, Markus Trippelsdorf
> > > <markus@trippelsdorf.de> wrote:
> > > > On 2011.12.03 at 12:20 +0000, Dave Airlie wrote:
> > > >> >> > > > > FIX idr_layer_cache: Marking all objects used
> > > >> >> > > >
> > > >> >> > > > Yesterday I couldn't reproduce the issue at all. But today I've hit
> > > >> >> > > > exactly the same spot again. (CCing the drm list)
> > > >>
> > > >> If I had to guess it looks like 0 is getting written back to some
> > > >> random page by the GPU maybe, it could be that the GPU is in some half
> > > >> setup state at boot or on a reboot does it happen from a cold boot or
> > > >> just warm boot or kexec?
> > > >
> > > > Only happened with kexec thus far. Cold boot seems to be fine.
> > > >
> > > 
> > > Can you add radeon.no_wb=1 to your kexec kernel paramater an see if
> > > you can reproduce.
> > 
> > No, I cannot reproduce the issue with radeon.no_wb=1. (I write this
> > after 700 successful kexec iterations...)
> > 
> 
> Can you try if attached patch fix the issue when you don't pass the
> radeon.no_wb=1 option ?

Yes the patch finally fixes the issue for me (tested with 120 kexec
iterations).
Thanks Jerome!

-- 
Markus

--
To unsubscribe, send a message with 'unsubscribe linux-mm' in
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^ permalink raw reply

* Re: ipv4: Perform peer validation on cached route lookup.
From: David Miller @ 2011-12-05 18:22 UTC (permalink / raw)
  To: dan.carpenter; +Cc: netdev
In-Reply-To: <20111205133153.GC3374@mwanda>

From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Mon, 5 Dec 2011 16:31:54 +0300

> The continue in __ip_route_output_key() has the same issue as well.

Thanks Dan.

The best thing to do is simply to not let ipv4_validate_peer()
fail, and just return void.

The only case that could "fail" is when we check the redirect state
and can't lookup a new valid neighbour for the new gateway.  We can
just restore the original gateway, and use that this time, and the
next use of this route will try again to get the neighbour anyways.

--------------------
ipv4: Fix peer validation on cached lookup.

If ipv4_valdiate_peer() fails during a cached entry lookup,
we'll NULL derer since the loop iterator assumes rth is not
NULL.

Letting this be handled as a failure is just bogus, so just make it
not fail.  If we have trouble getting a non-NULL neighbour for the
redirected gateway, just restore the original gateway and continue.

The very next use of this cached route will try again.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
 net/ipv4/route.c |   35 +++++++++++++----------------------
 1 files changed, 13 insertions(+), 22 deletions(-)

diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 588d971..46af623 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -1310,7 +1310,7 @@ static void rt_del(unsigned hash, struct rtable *rt)
 	spin_unlock_bh(rt_hash_lock_addr(hash));
 }
 
-static int check_peer_redir(struct dst_entry *dst, struct inet_peer *peer)
+static void check_peer_redir(struct dst_entry *dst, struct inet_peer *peer)
 {
 	struct rtable *rt = (struct rtable *) dst;
 	__be32 orig_gw = rt->rt_gateway;
@@ -1321,21 +1321,19 @@ static int check_peer_redir(struct dst_entry *dst, struct inet_peer *peer)
 	rt->rt_gateway = peer->redirect_learned.a4;
 
 	n = ipv4_neigh_lookup(&rt->dst, &rt->rt_gateway);
-	if (IS_ERR(n))
-		return PTR_ERR(n);
+	if (IS_ERR(n)) {
+		rt->rt_gateway = orig_gw;
+		return;
+	}
 	old_n = xchg(&rt->dst._neighbour, n);
 	if (old_n)
 		neigh_release(old_n);
-	if (!n || !(n->nud_state & NUD_VALID)) {
-		if (n)
-			neigh_event_send(n, NULL);
-		rt->rt_gateway = orig_gw;
-		return -EAGAIN;
+	if (!(n->nud_state & NUD_VALID)) {
+		neigh_event_send(n, NULL);
 	} else {
 		rt->rt_flags |= RTCF_REDIRECTED;
 		call_netevent_notifiers(NETEVENT_NEIGH_UPDATE, n);
 	}
-	return 0;
 }
 
 /* called in rcu_read_lock() section */
@@ -1693,7 +1691,7 @@ static void ip_rt_update_pmtu(struct dst_entry *dst, u32 mtu)
 }
 
 
-static struct rtable *ipv4_validate_peer(struct rtable *rt)
+static void ipv4_validate_peer(struct rtable *rt)
 {
 	if (rt->rt_peer_genid != rt_peer_genid()) {
 		struct inet_peer *peer;
@@ -1708,15 +1706,12 @@ static struct rtable *ipv4_validate_peer(struct rtable *rt)
 			if (peer->redirect_genid != redirect_genid)
 				peer->redirect_learned.a4 = 0;
 			if (peer->redirect_learned.a4 &&
-			    peer->redirect_learned.a4 != rt->rt_gateway) {
-				if (check_peer_redir(&rt->dst, peer))
-					return NULL;
-			}
+			    peer->redirect_learned.a4 != rt->rt_gateway)
+				check_peer_redir(&rt->dst, peer);
 		}
 
 		rt->rt_peer_genid = rt_peer_genid();
 	}
-	return rt;
 }
 
 static struct dst_entry *ipv4_dst_check(struct dst_entry *dst, u32 cookie)
@@ -1725,7 +1720,7 @@ static struct dst_entry *ipv4_dst_check(struct dst_entry *dst, u32 cookie)
 
 	if (rt_is_expired(rt))
 		return NULL;
-	dst = (struct dst_entry *) ipv4_validate_peer(rt);
+	ipv4_validate_peer(rt);
 	return dst;
 }
 
@@ -2380,9 +2375,7 @@ int ip_route_input_common(struct sk_buff *skb, __be32 daddr, __be32 saddr,
 		    rth->rt_mark == skb->mark &&
 		    net_eq(dev_net(rth->dst.dev), net) &&
 		    !rt_is_expired(rth)) {
-			rth = ipv4_validate_peer(rth);
-			if (!rth)
-				continue;
+			ipv4_validate_peer(rth);
 			if (noref) {
 				dst_use_noref(&rth->dst, jiffies);
 				skb_dst_set_noref(skb, &rth->dst);
@@ -2758,9 +2751,7 @@ struct rtable *__ip_route_output_key(struct net *net, struct flowi4 *flp4)
 			    (IPTOS_RT_MASK | RTO_ONLINK)) &&
 		    net_eq(dev_net(rth->dst.dev), net) &&
 		    !rt_is_expired(rth)) {
-			rth = ipv4_validate_peer(rth);
-			if (!rth)
-				continue;
+			ipv4_validate_peer(rth);
 			dst_use(&rth->dst, jiffies);
 			RT_CACHE_STAT_INC(out_hit);
 			rcu_read_unlock_bh();
-- 
1.7.7.3

^ permalink raw reply related

* [PATCH] net: Silence seq_scale() unused warning
From: Stephen Boyd @ 2011-12-05 18:29 UTC (permalink / raw)
  To: David S . Miller; +Cc: linux-kernel, netdev

On a CONFIG_NET=y build

net/core/secure_seq.c:22: warning: 'seq_scale' defined but not
used

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---

I don't know how realistic this configuration is, but here it goes.

 net/core/secure_seq.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/net/core/secure_seq.c b/net/core/secure_seq.c
index 025233d..db12233 100644
--- a/net/core/secure_seq.c
+++ b/net/core/secure_seq.c
@@ -19,6 +19,7 @@ static int __init net_secret_init(void)
 }
 late_initcall(net_secret_init);
 
+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) || defined(CONFIG_INET)
 static u32 seq_scale(u32 seq)
 {
 	/*
@@ -33,6 +34,7 @@ static u32 seq_scale(u32 seq)
 	 */
 	return seq + (ktime_to_ns(ktime_get_real()) >> 6);
 }
+#endif
 
 #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
 __u32 secure_tcpv6_sequence_number(const __be32 *saddr, const __be32 *daddr,
-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

^ permalink raw reply related

* Re: CIFS mount: 3.2.0-rc3 suspend crash
From: Steve French @ 2011-12-05 18:31 UTC (permalink / raw)
  To: Srivatsa S. Bhat
  Cc: Tejun Heo, Woody Suwalski, Jeff Layton, LKML, Rafael J. Wysocki,
	Linux PM mailing list, Belisko Marek,
	linux-cifs-u79uwXL29TY76Z2rM5mHXA, Network Development,
	Greg Kroah-Hartman, davem-fT/PcQaiUtIeIZ0/mPfg9Q
In-Reply-To: <4EDD08D0.9030401-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org>

On Mon, Dec 5, 2011 at 12:09 PM, Srivatsa S. Bhat
<srivatsa.bhat-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org> wrote:
> On 12/05/2011 11:11 PM, Tejun Heo wrote:
>
>> Hello, Srivatsa.
>>
>> On Fri, Dec 02, 2011 at 06:19:04PM +0530, Srivatsa S. Bhat wrote:
>>> So how about solving this problem more fundamentally, such as defining a
>>> freezable wrapper over kernel_recvmsg like:
>>>
>>> #define kernel_recvmsg_freezable(sock, msg, vec, num, size, flags)      \
>>> ({                                                                      \
>>>         kernel_recvmsg(sock, msg, vec, num, size, flags)                \
>>>      try_to_freeze();                                                \
>>> })
>>>
>>> and using it instead of kernel_recvmsg(), throughout the kernel?
>>>
>>> But kernel_recvmsg is an exported symbol. So if we are very very unwilling
>>> to change the kernel ABI, we could probably think about adding try_to_freeze()
>>> inside kernel_recvmsg itself,like this (but see below about my thoughts about
>>> which one is better):
>>
>> I don't necessarily object to introducing the wrapper but I don't
>> really think we should be doing s//g over the source tree without
>> understanding where it's actually necessary.  For kernel threads and
>> user threads out of the signal delivery path, try_to_freeze() is an
>> exceptional event which introduces behavior which can be difficult to
>> reproduce track down and spreading it without actually knowing what
>> the surrounding code is doing doesn't sound like a good idea to me.
>>
>
>
> Yeah, I agree. But I remember seeing almost _exactly_ the same code
> as CIFS loop in some other place. I'll see if I can track it down and
> also understand if it might cause problems. If I find it to be worth it
> to use the same solution as above, I'll try adding the wrapper and using
> it there. Else, better to keep it as it is, as you mentioned. Thank you.

Agreed ...


-- 
Thanks,

Steve

^ permalink raw reply

* Re: [PATCH 1/9] net: Rename dst_get_neighbour{,_raw} to dst_get_neighbour_noref{,_raw}.
From: Roland Dreier @ 2011-12-05 18:43 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215208.2048429167657194854.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
From: Jerome Glisse @ 2011-12-05 18:43 UTC (permalink / raw)
  To: Markus Trippelsdorf
  Cc: Dave Airlie, Christoph Lameter, Alex, Shi, Eric Dumazet,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel,
	Pekka Enberg, linux-mm@kvack.org, Matt Mackall, tj, Alex Deucher
In-Reply-To: <20111205181549.GA1612@x4.trippels.de>

On Mon, Dec 5, 2011 at 1:15 PM, Markus Trippelsdorf
<markus@trippelsdorf.de> wrote:
> On 2011.12.05 at 12:10 -0500, Jerome Glisse wrote:
>> On Sun, Dec 04, 2011 at 02:02:00AM +0100, Markus Trippelsdorf wrote:
>> > On 2011.12.03 at 14:31 -0500, Jerome Glisse wrote:
>> > > On Sat, Dec 3, 2011 at 7:29 AM, Markus Trippelsdorf
>> > > <markus@trippelsdorf.de> wrote:
>> > > > On 2011.12.03 at 12:20 +0000, Dave Airlie wrote:
>> > > >> >> > > > > FIX idr_layer_cache: Marking all objects used
>> > > >> >> > > >
>> > > >> >> > > > Yesterday I couldn't reproduce the issue at all. But today I've hit
>> > > >> >> > > > exactly the same spot again. (CCing the drm list)
>> > > >>
>> > > >> If I had to guess it looks like 0 is getting written back to some
>> > > >> random page by the GPU maybe, it could be that the GPU is in some half
>> > > >> setup state at boot or on a reboot does it happen from a cold boot or
>> > > >> just warm boot or kexec?
>> > > >
>> > > > Only happened with kexec thus far. Cold boot seems to be fine.
>> > > >
>> > >
>> > > Can you add radeon.no_wb=1 to your kexec kernel paramater an see if
>> > > you can reproduce.
>> >
>> > No, I cannot reproduce the issue with radeon.no_wb=1. (I write this
>> > after 700 successful kexec iterations...)
>> >
>>
>> Can you try if attached patch fix the issue when you don't pass the
>> radeon.no_wb=1 option ?
>
> Yes the patch finally fixes the issue for me (tested with 120 kexec
> iterations).
> Thanks Jerome!
>
> --
> Markus

Will respin with some minor code changes.

Cheers,
Jerome

--
To unsubscribe, send a message with 'unsubscribe linux-mm' in
the body to majordomo@kvack.org.  For more info on Linux MM,
see: http://www.linux-mm.org/ .
Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/
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^ permalink raw reply

* Re: [PATCH 2/9] infiniband: addr: Consolidate code to fetch neighbout hardware address from dst.
From: Roland Dreier @ 2011-12-05 18:46 UTC (permalink / raw)
  To: Eric Dumazet; +Cc: David Miller, netdev
In-Reply-To: <1322897409.2762.80.camel@edumazet-laptop>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* ethtool 3.1 released
From: Ben Hutchings @ 2011-12-05 18:51 UTC (permalink / raw)
  To: netdev

[-- Attachment #1: Type: text/plain, Size: 1365 bytes --]

ethtool version 3.1 has been released.  (It was actually tagged on 16th
November but I only managed to upload tarballs today.)

Home page: https://ftp.kernel.org/pub/software/network/ethtool/
Download:
https://ftp.kernel.org/pub/software/network/ethtool/ethtool-3.1.tar.bz2
https://ftp.kernel.org/pub/software/network/ethtool/ethtool-3.1.tar.gz
https://ftp.kernel.org/pub/software/network/ethtool/ethtool-3.1.tar.xz
https://ftp.kernel.org/pub/software/network/ethtool/ethtool-3.1.tar.sign

Release notes:

	* Fix: Show all non-zero registers for tg3 (-d option)
	* Feature: Add support for external loopback test (-t option)
	* Fix: Show correct flow control registers for Intel 82599 (-d option)
	* Feature: Add support for reporting and configuring numbers of
	  channels/queues (-l and -L options)
	* Feature: Report pause frame autonegotiation result (-a option)
	* Doc: Change device name metavariable from 'ethX' to 'devname'
	* Doc: Fix various layout problems
	* Cleanup: Reorganise and add test cases for argument parsing
	* Fix: Strictly check for extraneous or missing arguments; in
	  particular, fail if the device name is missing

Ben.

-- 
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.

[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 490 bytes --]

^ permalink raw reply

* Re: [PATCH 5/9] infiniband: nes: Use dst's neighbour entry.
From: Roland Dreier @ 2011-12-05 18:56 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215227.526958004729466816.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: [PATCH 6/9] infiniband: cxgb4: Consolidate 3 copies of the same operation into 1 helper function.
From: Roland Dreier @ 2011-12-05 18:57 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215231.1935985613035773270.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: [PATCH 7/9] libcxgbi: Handle dst_get_neighbour_noref() returning NULL.
From: Roland Dreier @ 2011-12-05 18:57 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215235.725617299076899257.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: [PATCH 8/9] cxgb4i: Handle dst_get_neighbour_noref() returning NULL.
From: Roland Dreier @ 2011-12-05 18:58 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215239.198672307411678191.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: [PATCH 9/9] infiniband: ipoib: Sanitize neighbour handling in ipoib_main.c
From: Roland Dreier @ 2011-12-05 18:58 UTC (permalink / raw)
  To: David Miller; +Cc: netdev
In-Reply-To: <20111202.215244.855136989490171080.davem@davemloft.net>

Acked-by: Roland Dreier <roland@purestorage.com>

^ permalink raw reply

* Re: [PATCH net-next V0 19/21] mlx4_core: Modify driver initialization flow to accommodate SRIOV for Ethernet
From: Roland Dreier @ 2011-12-05 19:01 UTC (permalink / raw)
  To: Jack Morgenstein
  Cc: Yevgeny Petrilin, davem-fT/PcQaiUtIeIZ0/mPfg9Q,
	netdev-u79uwXL29TY76Z2rM5mHXA, linux-rdma-u79uwXL29TY76Z2rM5mHXA,
	liranl-VPRAkNaXOzVS1MOuV/RT9w
In-Reply-To: <201112041629.41466.jackm-LDSdmyG8hGV8YrgS2mwiifqBs+8SCbDb@public.gmane.org>

On Sun, Dec 4, 2011 at 6:29 AM, Jack Morgenstein
<jackm-LDSdmyG8hGV8YrgS2mwiifqBs+8SCbDb@public.gmane.org> wrote:
> If the kernel is not configured to support IOV, pci_enable_sriov will fail.
> Currently, we abort the device startup.  I can change this to simply continue
> without sriov enabled:

Agree... we definitely don't want drivers failing just because a
device has an SR-IOV
cap but the kernel isn't compiled with SR-IOV support.

 - R.
--
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^ permalink raw reply

* Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
From: Jerome Glisse @ 2011-12-05 19:11 UTC (permalink / raw)
  To: Markus Trippelsdorf
  Cc: Dave Airlie, Christoph Lameter, Alex, Shi, Eric Dumazet,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel,
	Pekka Enberg, linux-mm@kvack.org, Matt Mackall, tj, Alex Deucher
In-Reply-To: <20111205181549.GA1612@x4.trippels.de>

[-- Attachment #1: Type: text/plain, Size: 1653 bytes --]

On Mon, Dec 05, 2011 at 07:15:49PM +0100, Markus Trippelsdorf wrote:
> On 2011.12.05 at 12:10 -0500, Jerome Glisse wrote:
> > On Sun, Dec 04, 2011 at 02:02:00AM +0100, Markus Trippelsdorf wrote:
> > > On 2011.12.03 at 14:31 -0500, Jerome Glisse wrote:
> > > > On Sat, Dec 3, 2011 at 7:29 AM, Markus Trippelsdorf
> > > > <markus@trippelsdorf.de> wrote:
> > > > > On 2011.12.03 at 12:20 +0000, Dave Airlie wrote:
> > > > >> >> > > > > FIX idr_layer_cache: Marking all objects used
> > > > >> >> > > >
> > > > >> >> > > > Yesterday I couldn't reproduce the issue at all. But today I've hit
> > > > >> >> > > > exactly the same spot again. (CCing the drm list)
> > > > >>
> > > > >> If I had to guess it looks like 0 is getting written back to some
> > > > >> random page by the GPU maybe, it could be that the GPU is in some half
> > > > >> setup state at boot or on a reboot does it happen from a cold boot or
> > > > >> just warm boot or kexec?
> > > > >
> > > > > Only happened with kexec thus far. Cold boot seems to be fine.
> > > > >
> > > > 
> > > > Can you add radeon.no_wb=1 to your kexec kernel paramater an see if
> > > > you can reproduce.
> > > 
> > > No, I cannot reproduce the issue with radeon.no_wb=1. (I write this
> > > after 700 successful kexec iterations...)
> > > 
> > 
> > Can you try if attached patch fix the issue when you don't pass the
> > radeon.no_wb=1 option ?
> 
> Yes the patch finally fixes the issue for me (tested with 120 kexec
> iterations).
> Thanks Jerome!
> 
> -- 
> Markus

Can you do a kick run on the modified patch ?

I believe this patch could go to stable too as it's low
impact from my pov.

Cheers,
Jerome

[-- Attachment #2: 0001-drm-radeon-disable-possible-GPU-writeback-early-v2.patch --]
[-- Type: text/plain, Size: 14649 bytes --]

>From cccfa6f93faa6b556fd72e318606a01e333e67d3 Mon Sep 17 00:00:00 2001
From: Jerome Glisse <jglisse@redhat.com>
Date: Mon, 5 Dec 2011 12:02:17 -0500
Subject: [PATCH] drm/radeon: disable possible GPU writeback early v2

Given how kexec works we need to disable any kind of GPU writeback
early in GPU initialization just in case some are still active from
previous setup.

v2 follow previous sanity work done on earlier radeon, also write
reg uncondionaly and disable irq too.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
---
 drivers/gpu/drm/radeon/evergreen.c   |    2 ++
 drivers/gpu/drm/radeon/ni.c          |   18 ++++++++++++++++++
 drivers/gpu/drm/radeon/nid.h         |   19 +++++++++++++++++++
 drivers/gpu/drm/radeon/r100.c        |   20 ++++++--------------
 drivers/gpu/drm/radeon/r520.c        |    2 +-
 drivers/gpu/drm/radeon/r600.c        |   16 ++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.h |    2 ++
 drivers/gpu/drm/radeon/rs600.c       |   20 +++++++++++++++++++-
 drivers/gpu/drm/radeon/rs600d.h      |   21 +++++++++++++++++++++
 drivers/gpu/drm/radeon/rs690.c       |    2 +-
 drivers/gpu/drm/radeon/rv515.c       |    2 +-
 drivers/gpu/drm/radeon/rv770.c       |   16 ++++++++++++++++
 drivers/gpu/drm/radeon/rv770d.h      |   20 ++++++++++++++++++++
 13 files changed, 142 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 1934728..6109579 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3249,6 +3249,8 @@ int evergreen_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* restore some register to sane defaults */
+	rv770_restore_sanity(rdev);
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index c15fc8b..f5d7054 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1566,6 +1566,22 @@ int cayman_suspend(struct radeon_device *rdev)
 	return 0;
 }
 
+/*
+ * Due to how kexec works, it can leave the hw fully initialised when it
+ * boots the new kernel.
+ */
+static void cayman_restore_sanity(struct radeon_device *rdev)
+{
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB0_CNTL, RB_NO_UPDATE);
+	WREG32(CP_RB1_CNTL, RB_NO_UPDATE);
+	WREG32(CP_RB2_CNTL, RB_NO_UPDATE);
+}
+
 /* Plan is to move initialization in that function and use
  * helper function so that radeon_device_init pretty much
  * do nothing more than calling asic specific function. This
@@ -1577,6 +1593,8 @@ int cayman_init(struct radeon_device *rdev)
 	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
 	int r;
 
+	/* restore some register to sane defaults */
+	cayman_restore_sanity(rdev);
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 4640334..3aa33c6 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -162,6 +162,25 @@
 #define HDP_MISC_CNTL					0x2F4C
 #define 	HDP_FLUSH_INVALIDATE_CACHE			(1 << 0)
 
+#define IH_RB_CNTL                                        0x3e00
+#       define IH_RB_ENABLE                               (1 << 0)
+#       define IH_IB_SIZE(x)                              ((x) << 1) /* log2 */
+#       define IH_RB_FULL_DRAIN_ENABLE                    (1 << 6)
+#       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
+#       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
+#       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#define IH_CNTL                                           0x3e18
+#       define ENABLE_INTR                                (1 << 0)
+#       define IH_MC_SWAP(x)                              ((x) << 1)
+#       define IH_MC_SWAP_NONE                            0
+#       define IH_MC_SWAP_16BIT                           1
+#       define IH_MC_SWAP_32BIT                           2
+#       define IH_MC_SWAP_64BIT                           3
+#       define RPTR_REARM                                 (1 << 4)
+#       define MC_WRREQ_CREDIT(x)                         ((x) << 15)
+#       define MC_WR_CLEAN_CNT(x)                         ((x) << 20)
+
 #define	CC_SYS_RB_BACKEND_DISABLE			0x3F88
 #define	GC_USER_SYS_RB_BACKEND_DISABLE			0x3F8C
 #define	CGTS_SYS_TCC_DISABLE				0x3F90
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 657040b..d58531f 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3990,20 +3990,12 @@ void r100_fini(struct radeon_device *rdev)
  */
 void r100_restore_sanity(struct radeon_device *rdev)
 {
-	u32 tmp;
-
-	tmp = RREG32(RADEON_CP_CSQ_CNTL);
-	if (tmp) {
-		WREG32(RADEON_CP_CSQ_CNTL, 0);
-	}
-	tmp = RREG32(RADEON_CP_RB_CNTL);
-	if (tmp) {
-		WREG32(RADEON_CP_RB_CNTL, 0);
-	}
-	tmp = RREG32(RADEON_SCRATCH_UMSK);
-	if (tmp) {
-		WREG32(RADEON_SCRATCH_UMSK, 0);
-	}
+	/* stop possible GPU activities */
+	WREG32(RADEON_CP_CSQ_MODE, 0);
+	WREG32(RADEON_CP_CSQ_CNTL, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(RADEON_CP_RB_CNTL, RADEON_RB_NO_UPDATE);
+	WREG32(RADEON_GEN_INT_CNTL, 0);
 }
 
 int r100_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 4ae1615..71a984b 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -249,7 +249,7 @@ int r520_init(struct radeon_device *rdev)
 	/* Initialize surface registers */
 	radeon_surface_init(rdev);
 	/* restore some register to sane defaults */
-	r100_restore_sanity(rdev);
+	rs600_restore_sanity(rdev);
 	/* TODO: disable VGA need to use VGA request */
 	/* BIOS*/
 	if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 951566f..ec437d5 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2556,6 +2556,20 @@ int r600_suspend(struct radeon_device *rdev)
 	return 0;
 }
 
+/*
+ * Due to how kexec works, it can leave the hw fully initialised when it
+ * boots the new kernel.
+ */
+static void r600_restore_sanity(struct radeon_device *rdev)
+{
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB_CNTL, RB_NO_UPDATE);
+}
+
 /* Plan is to move initialization in that function and use
  * helper function so that radeon_device_init pretty much
  * do nothing more than calling asic specific function. This
@@ -2566,6 +2580,8 @@ int r600_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* restore some register to sane defaults */
+	r600_restore_sanity(rdev);
 	if (r600_debugfs_mc_info_init(rdev)) {
 		DRM_ERROR("Failed to register debugfs file for mc !\n");
 	}
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 6304aef..6b664b0 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -215,6 +215,7 @@ extern int rs600_init(struct radeon_device *rdev);
 extern void rs600_fini(struct radeon_device *rdev);
 extern int rs600_suspend(struct radeon_device *rdev);
 extern int rs600_resume(struct radeon_device *rdev);
+void rs600_restore_sanity(struct radeon_device *rdev);
 int rs600_irq_set(struct radeon_device *rdev);
 int rs600_irq_process(struct radeon_device *rdev);
 void rs600_irq_disable(struct radeon_device *rdev);
@@ -388,6 +389,7 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
 void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
 void r700_cp_stop(struct radeon_device *rdev);
 void r700_cp_fini(struct radeon_device *rdev);
+void rv770_restore_sanity(struct radeon_device *rdev);
 
 /*
  * evergreen
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ca6d5b6..fc3c707 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -935,6 +935,24 @@ void rs600_fini(struct radeon_device *rdev)
 	rdev->bios = NULL;
 }
 
+
+/*
+ * Due to how kexec works, it can leave the hw fully initialised when it
+ * boots the new kernel.
+ */
+void rs600_restore_sanity(struct radeon_device *rdev)
+{
+	/* stop possible GPU activities */
+	WREG32(R_000740_CP_CSQ_CNTL, 0);
+	WREG32(R_000744_CP_CSQ_MODE, 0);
+	WREG32(R_000770_SCRATCH_UMSK, 0);
+	WREG32(R_000704_CP_RB_CNTL, S_000704_RB_NO_UPDATE(1));
+	WREG32(R_000040_GEN_INT_CNTL, 0);
+	WREG32(R_006540_DxMODE_INT_MASK, 0);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+}
+
 int rs600_init(struct radeon_device *rdev)
 {
 	int r;
@@ -946,7 +964,7 @@ int rs600_init(struct radeon_device *rdev)
 	/* Initialize surface registers */
 	radeon_surface_init(rdev);
 	/* restore some register to sane defaults */
-	r100_restore_sanity(rdev);
+	rs600_restore_sanity(rdev);
 	/* BIOS */
 	if (!radeon_get_bios(rdev)) {
 		if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rs600d.h b/drivers/gpu/drm/radeon/rs600d.h
index a27c13a..54d96e6 100644
--- a/drivers/gpu/drm/radeon/rs600d.h
+++ b/drivers/gpu/drm/radeon/rs600d.h
@@ -668,4 +668,25 @@
 #define   PM_ASSERT_RESET                              (1 << 20)
 #define   PM_PWRDN_PPLL                                (1 << 24)
 
+#define R_000704_CP_RB_CNTL                          0x000704
+#define   S_000704_RB_NO_UPDATE(x)                     (((x) & 0x1) << 27)
+#define R_000740_CP_CSQ_CNTL                         0x000740
+#define   S_000740_CSQ_CNT_PRIMARY(x)                  (((x) & 0xFF) << 0)
+#define   G_000740_CSQ_CNT_PRIMARY(x)                  (((x) >> 0) & 0xFF)
+#define   C_000740_CSQ_CNT_PRIMARY                     0xFFFFFF00
+#define   S_000740_CSQ_CNT_INDIRECT(x)                 (((x) & 0xFF) << 8)
+#define   G_000740_CSQ_CNT_INDIRECT(x)                 (((x) >> 8) & 0xFF)
+#define   C_000740_CSQ_CNT_INDIRECT                    0xFFFF00FF
+#define   S_000740_CSQ_MODE(x)                         (((x) & 0xF) << 28)
+#define   G_000740_CSQ_MODE(x)                         (((x) >> 28) & 0xF)
+#define   C_000740_CSQ_MODE                            0x0FFFFFFF
+#define R_000744_CP_CSQ_MODE                         0x000744
+#define R_000770_SCRATCH_UMSK                        0x000770
+#define   S_000770_SCRATCH_UMSK(x)                     (((x) & 0x3F) << 0)
+#define   G_000770_SCRATCH_UMSK(x)                     (((x) >> 0) & 0x3F)
+#define   C_000770_SCRATCH_UMSK                        0xFFFFFFC0
+#define   S_000770_SCRATCH_SWAP(x)                     (((x) & 0x3) << 16)
+#define   G_000770_SCRATCH_SWAP(x)                     (((x) >> 16) & 0x3)
+#define   C_000770_SCRATCH_SWAP                        0xFFFCFFFF
+
 #endif
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 4f24a0f..8a3b1f4 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -718,7 +718,7 @@ int rs690_init(struct radeon_device *rdev)
 	/* Initialize surface registers */
 	radeon_surface_init(rdev);
 	/* restore some register to sane defaults */
-	r100_restore_sanity(rdev);
+	rs600_restore_sanity(rdev);
 	/* TODO: disable VGA need to use VGA request */
 	/* BIOS*/
 	if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 880637f..c9ced40 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -488,7 +488,7 @@ int rv515_init(struct radeon_device *rdev)
 	radeon_surface_init(rdev);
 	/* TODO: disable VGA need to use VGA request */
 	/* restore some register to sane defaults */
-	r100_restore_sanity(rdev);
+	rs600_restore_sanity(rdev);
 	/* BIOS*/
 	if (!radeon_get_bios(rdev)) {
 		if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index a1668b6..3d0397d 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1167,6 +1167,20 @@ int rv770_suspend(struct radeon_device *rdev)
 	return 0;
 }
 
+/*
+ * Due to how kexec works, it can leave the hw fully initialised when it
+ * boots the new kernel.
+ */
+void rv770_restore_sanity(struct radeon_device *rdev)
+{
+	/* stop possible GPU activities */
+	WREG32(IH_RB_CNTL, 0);
+	WREG32(IH_CNTL, 0);
+	WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
+	WREG32(SCRATCH_UMSK, 0);
+	WREG32(CP_RB_CNTL, RB_NO_UPDATE);
+}
+
 /* Plan is to move initialization in that function and use
  * helper function so that radeon_device_init pretty much
  * do nothing more than calling asic specific function. This
@@ -1177,6 +1191,8 @@ int rv770_init(struct radeon_device *rdev)
 {
 	int r;
 
+	/* restore some register to sane defaults */
+	rv770_restore_sanity(rdev);
 	/* This don't do much */
 	r = radeon_gem_init(rdev);
 	if (r)
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 79fa588..03bed2d 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -38,6 +38,26 @@
 #define R7XX_MAX_PIPES             8
 #define R7XX_MAX_PIPES_MASK        0xff
 
+
+#define IH_RB_CNTL                                        0x3e00
+#       define IH_RB_ENABLE                               (1 << 0)
+#       define IH_IB_SIZE(x)                              ((x) << 1) /* log2 */
+#       define IH_RB_FULL_DRAIN_ENABLE                    (1 << 6)
+#       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
+#       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
+#       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#define IH_CNTL                                           0x3e18
+#       define ENABLE_INTR                                (1 << 0)
+#       define IH_MC_SWAP(x)                              ((x) << 1)
+#       define IH_MC_SWAP_NONE                            0
+#       define IH_MC_SWAP_16BIT                           1
+#       define IH_MC_SWAP_32BIT                           2
+#       define IH_MC_SWAP_64BIT                           3
+#       define RPTR_REARM                                 (1 << 4)
+#       define MC_WRREQ_CREDIT(x)                         ((x) << 15)
+#       define MC_WR_CLEAN_CNT(x)                         ((x) << 20)
+
 /* Registers */
 #define	CB_COLOR0_BASE					0x28040
 #define	CB_COLOR1_BASE					0x28044
-- 
1.7.7.1


^ permalink raw reply related

* Re: WARNING: at mm/slub.c:3357, kernel BUG at mm/slub.c:3413
From: Markus Trippelsdorf @ 2011-12-05 19:27 UTC (permalink / raw)
  To: Jerome Glisse
  Cc: Dave Airlie, Christoph Lameter, Alex, Shi, Eric Dumazet,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel,
	Pekka Enberg, linux-mm@kvack.org, Matt Mackall, tj, Alex Deucher
In-Reply-To: <20111205191116.GB4342@homer.localdomain>

On 2011.12.05 at 14:11 -0500, Jerome Glisse wrote:
> On Mon, Dec 05, 2011 at 07:15:49PM +0100, Markus Trippelsdorf wrote:
> > On 2011.12.05 at 12:10 -0500, Jerome Glisse wrote:
> > > On Sun, Dec 04, 2011 at 02:02:00AM +0100, Markus Trippelsdorf wrote:
> > > > On 2011.12.03 at 14:31 -0500, Jerome Glisse wrote:
> > > > > On Sat, Dec 3, 2011 at 7:29 AM, Markus Trippelsdorf
> > > > > <markus@trippelsdorf.de> wrote:
> > > > > > On 2011.12.03 at 12:20 +0000, Dave Airlie wrote:
> > > > > >> >> > > > > FIX idr_layer_cache: Marking all objects used
> > > > > >> >> > > >
> > > > > >> >> > > > Yesterday I couldn't reproduce the issue at all. But today I've hit
> > > > > >> >> > > > exactly the same spot again. (CCing the drm list)
> > > > > >>
> > > > > >> If I had to guess it looks like 0 is getting written back to some
> > > > > >> random page by the GPU maybe, it could be that the GPU is in some half
> > > > > >> setup state at boot or on a reboot does it happen from a cold boot or
> > > > > >> just warm boot or kexec?
> > > > > >
> > > > > > Only happened with kexec thus far. Cold boot seems to be fine.
> > > > > >
> > > > > 
> > > > > Can you add radeon.no_wb=1 to your kexec kernel paramater an see if
> > > > > you can reproduce.
> > > > 
> > > > No, I cannot reproduce the issue with radeon.no_wb=1. (I write this
> > > > after 700 successful kexec iterations...)
> > > > 
> > > 
> > > Can you try if attached patch fix the issue when you don't pass the
> > > radeon.no_wb=1 option ?
> > 
> > Yes the patch finally fixes the issue for me (tested with 120 kexec
> > iterations).
> > Thanks Jerome!
> > 
> > -- 
> > Markus
> 
> Can you do a kick run on the modified patch ?

This one is also OK after ~60 iterations.

-- 
Markus

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^ permalink raw reply

* VERY IMPORTANT!!!
From: Barb Burnell @ 2011-12-05 15:37 UTC (permalink / raw)


I am a personal assistant to Mrs E Simon, this is the third time we are contacting you. 
Mrs. Simon has picked your email for an inheritance of $18,000,000.00 for full details contact her via email on : ruth_27@rogers.com

^ permalink raw reply

* Re: [net-next RFC PATCH 2/5] tuntap: simple flow director support
From: Ben Hutchings @ 2011-12-05 20:09 UTC (permalink / raw)
  To: Jason Wang
  Cc: krkumar2, kvm, mst, netdev, rusty, virtualization, levinsasha928
In-Reply-To: <20111205085857.6116.99252.stgit@dhcp-8-146.nay.redhat.com>

On Mon, 2011-12-05 at 16:58 +0800, Jason Wang wrote:
> This patch adds a simple flow director to tun/tap device. It is just a
> page that contains the hash to queue mapping which could be changed by
> user-space. The backend (tap/macvtap) would query this table to get
> the desired queue of a packets when it send packets to userspace.

This is just flow hashing (RSS), not flow steering.

> The page address were set through a new kind of ioctl - TUNSETFD and
> were pinned until device exit or another new page were specified.
[...]

You should implement ethtool ETHTOOL_{G,S}RXFHINDIR instead.

Ben.

-- 
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.


^ permalink raw reply


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