* Re: [PATCH v8 RESEND] ARM: net: JIT compiler for packet filters
From: Mircea Gherzan @ 2012-03-27 9:41 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: netdev, eric.dumazet, David Miller, linux-arm-kernel
In-Reply-To: <20120327075600.GL5611@n2100.arm.linux.org.uk>
2012/3/27 Russell King - ARM Linux <linux@arm.linux.org.uk>:
> Mircea, could you please supply an ack for the below fix to silence a
> warning. Thanks.
>
> 8<=====
> ARM: fix Kconfig warning for HAVE_BPF_JIT
>
> Last night's randconfig and the allnoconfig builds spat out the
> following warning while building:
>
> warning: (ARM) selects HAVE_BPF_JIT which has unmet direct dependencies (NET)
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> arch/arm/Kconfig | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 9e21b6e..6a54606 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -33,7 +33,7 @@ config ARM
> select GENERIC_IRQ_SHOW
> select CPU_PM if (SUSPEND || CPU_IDLE)
> select GENERIC_PCI_IOMAP
> - select HAVE_BPF_JIT
> + select HAVE_BPF_JIT if NET
> help
> The ARM series is a line of low-power-consumption RISC chip designs
> licensed by ARM Ltd and targeted at embedded applications and
Acked-by: Mircea Gherzan <mgherzan@gmail.com>
^ permalink raw reply
* [PATCH firmware 3/3] rtl_nic: update firmware for RTL8411
From: Hayes Wang @ 2012-03-27 9:21 UTC (permalink / raw)
To: dwmw2, ben; +Cc: romieu, netdev, kernel-team, linux-kernel, Hayes Wang
In-Reply-To: <1332840075-5991-1-git-send-email-hayeswang@realtek.com>
Updated firmware with stability fixes.
Version: 0.0.2
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
WHENCE | 2 +-
rtl_nic/rtl8411-1.fw | Bin 1584 -> 1840 bytes
2 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/WHENCE b/WHENCE
index 1235477..989cd08 100644
--- a/WHENCE
+++ b/WHENCE
@@ -1711,7 +1711,7 @@ File: rtl_nic/rtl8168f-2.fw
Version: 0.0.4
File: rtl_nic/rtl8411-1.fw
-Version: 0.0.1
+Version: 0.0.2
File: rtl_nic/rtl8402-1.fw
Version: 0.0.1
diff --git a/rtl_nic/rtl8411-1.fw b/rtl_nic/rtl8411-1.fw
index d9aaad151004e8853560918509f91d2329ec8f07..1bd9e7cdd5605e34e0322c0df185c53e46d6a34b 100644
GIT binary patch
delta 405
zcmXYtO-q776oucJ?9hivQL8Lai)fS1jAkl?5ZJ09YS$v6ZP6lHv`D%N6%>8Y+d6Qs
zqUgTgQ1k=LTC{RqkkFmpF5I~fcMgX+Q}@>cIfv`;Xg`(EdO_z^R7Fil#bahErj5O`
zwZYvIj<f7+t|g61<&Dxt#f=W>WG0c!EH-jkF+>t1A3%Ykdn2~QtJ@LTu^K3x0f}c&
z>51<fu92&!*H@rW71W&oS#CR^?MqPKF=+4+1Zy=9Y7odU|MWm#KGuDMimacjFi(0M
zw#+_f*3)vp;~C2XpbOs5GS{qUiaUrs`sjjuQ}E_A3p=3q6HuYe%>Bl~G|wnMvKj=9
zq`eFgo8i;T6k)^KD5x^*8H2Ohom>aqM?gX5-ne@pjVQQfsl;9LMV<?kcwgCV?)X-O
OXu0M7TmRoD{~y1?qj=f?
delta 156
zcmdnMw}Ho%0SJmpax6>?4RsCU4fG833>6Fw^o`8)4GlqZAP@k=<%|pr`V2unW<~}U
z@kR!Qh6a{~CJIIdRz@aP#v5Jj8Mzpl*czBB*&3!aOzvY0W{jHrh|ylqgsnl*imie1
zB3nb#exSVhWFscG$vMm#jLeg#G8-_8Z9c}_#>mzP)Vt=z<{(xlMn<d2Q`!0f{Olzc
--
1.7.7.6
^ permalink raw reply related
* [PATCH firmware 1/3] rtl_nic: update firmware for RTL8111E-VL
From: Hayes Wang @ 2012-03-27 9:21 UTC (permalink / raw)
To: dwmw2, ben; +Cc: romieu, netdev, kernel-team, linux-kernel, Hayes Wang
Updated firmware with stability fixes.
Version: 0.0.4
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
WHENCE | 2 +-
rtl_nic/rtl8168e-3.fw | Bin 3648 -> 3872 bytes
2 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/WHENCE b/WHENCE
index 392f8c0..8901137 100644
--- a/WHENCE
+++ b/WHENCE
@@ -1702,7 +1702,7 @@ File: rtl_nic/rtl8168e-1.fw
File: rtl_nic/rtl8168e-2.fw
File: rtl_nic/rtl8168e-3.fw
-Version: 0.0.3
+Version: 0.0.4
File: rtl_nic/rtl8168f-1.fw
Version: 0.0.3
diff --git a/rtl_nic/rtl8168e-3.fw b/rtl_nic/rtl8168e-3.fw
index 42f9259b84eaf7d59fbe07e18d27828af1b195db..0f888a32676dac18665158da7501452f66a3116a 100644
GIT binary patch
delta 673
zcmYk2PiPZC6vlV*=UEeDjcv8lq-kOzw1~;>cHN`_p*Imch@f~&N?R!YL6Hg~l|EW~
zQHsz(sR|`RKv<epiGl^8dhsB5=t0n1wH|uvsVyE9{04I9z|8N>yzhN)W<Dlssj7i-
zYw}vja!cbU2P<aY%sXjwuwWMpmaUT*Rm@jG!`Lt`oO5l<tlS)#9G$3)-WVIN*rsKh
zw&kQPx9prMJFYQb&*`ET-kf*D^npMZ=WNLb!Hz}A?Vz|L`4HHyB*#HokbD>n3`_0+
z4dgq)N0%jcf$58qkAT|eD5!Papw>xn9=aZI7`g-)T#}sB`zd*bdv!1&IR$EiK2RH^
zTl);C3yy&(;H)O}IZ!t^4qA3|MtCB=G)G(v5U*v4SHTzRbnt5Y@!nHGyr@=!Z)0P`
zU-HEFAq#v}cS9+WZaxk53GrO5gdYyPM3IZ!@-A_-pLlK+x;pW$OWeOq?4Lyoc+}N(
zVo_IHRK_~6PfZ6(#P52De{T_ok}dWUum2+6m?FNnju`VNbVFdiLEK0X$A)0EMx4=|
zz7c1O#51^o{~fo8;tYE7iD&hVyNRo_gkL58_ZfZu!tW39_5)IdwkzU;de-(td{Wl_
z&CDioZHG9Fm+Mj=vKs8di1p+BPF0R1#0hmNk`g1$+Yv{IhVr7RxVQJ;3}UbOBl=#5
J*J>f={RhyU#Do9<
delta 487
zcmYjOODKd<6#nn{9giP1%En`uL=@xy{~5oT*&z!>$<8BV!HN>eLLSF!LwVgusfkh~
zrZke0SW$MAz1PA@60)Ftw=A5x_q@JyzH{!~@SNv1X^?@z-k{|KyUYC%(`Wkp1(sQ1
zI~A6tk`M(NPSCVht+~OmEwd)lT-_L{?d$4}Se6;G0tL1iw*6s$rM7s`84&Sy*N$+n
z%@9|)h_4HY&!E?3mfquD_#YL-%W_FSEbAb?@)1u1=DH;A(~0Nqi1+7-4KK0x6aEu&
z@U!FniTOgT$R(O9-9$GBMSB1kCB!pl07Z#E9paKb;#fVnyNIK*E{R1{UL=Kai)1<e
zViV`0<qN3tpdX+|Kza9wGfEs(_B}=j5$9mE&^|UvM>ouTi;>i3E^Kx)3Fa8^icQ6c
zICF}43ieMcvHneb|3&;h`?t~rabhva{FDxHB*#)##fi*HefB;OZ+swy_Np}Y2H$`W
wTfIswLwbxHQ6$5LN3_LTjDQf^az4%D-unNb8u3>AH0@Z3T{)DotE=Dp1uAiy00000
--
1.7.7.6
^ permalink raw reply related
* [PATCH firmware 2/3] rtl_nic: update firmware for RTL8111F
From: Hayes Wang @ 2012-03-27 9:21 UTC (permalink / raw)
To: dwmw2, ben; +Cc: romieu, netdev, kernel-team, linux-kernel, Hayes Wang
In-Reply-To: <1332840075-5991-1-git-send-email-hayeswang@realtek.com>
Updated firmware with stability fixes.
1. rtl_nic/rtl8168f-1.fw
Version: 0.0.4
1. rtl_nic/rtl8168f-2.fw
Version: 0.0.4
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
WHENCE | 4 ++--
rtl_nic/rtl8168f-1.fw | Bin 3136 -> 3136 bytes
rtl_nic/rtl8168f-2.fw | Bin 992 -> 1232 bytes
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/WHENCE b/WHENCE
index 8901137..1235477 100644
--- a/WHENCE
+++ b/WHENCE
@@ -1705,10 +1705,10 @@ File: rtl_nic/rtl8168e-3.fw
Version: 0.0.4
File: rtl_nic/rtl8168f-1.fw
-Version: 0.0.3
+Version: 0.0.4
File: rtl_nic/rtl8168f-2.fw
-Version: 0.0.3
+Version: 0.0.4
File: rtl_nic/rtl8411-1.fw
Version: 0.0.1
diff --git a/rtl_nic/rtl8168f-1.fw b/rtl_nic/rtl8168f-1.fw
index 10b3885281fd2a3d41bb436c238c2cf69736d32f..41822b54ef44c37400db3ddac26d0e6655e1faa7 100644
GIT binary patch
delta 394
zcmYjM&r1SP5Z<@ClO{$UDpT7`ItA+PD%&a%6kURls6Rlu1VVI(PLVWe9SS<VTOoAl
zmP%oDRXTbT=@zK{f(nYDK+2%$$Dx5?=9}-EZ{908OU{@;v9!EksJb!lSK~@R352~$
zD5wnwRqdOkn5O&?1tBBMOzE1YjKwuY)s&E?dR09d)}vZP*f|&^)p2Z(u@U~j79HK2
zfQATINdgubU@uRIC-z&w7e8Q{2r<ovOfqZoNz>z+XaJtO0B@cE&7Qy72Ux!Xyj}%N
z)~Tm#kS;<skOR!Q0qqe$Rsr-C$#8{q#IKWiJ`0$&(Tp(Ue`n%7?WF)+#D7-lPK*4S
zfUn!Y52X%%YMx~q+$wRl#WT|7z!Bj78=ypwPkmdK2$Q8m{SPklU2wAoKLeTd6fU5X
qv3`EnCObU;zb*iJc$cNdTb2oUr*nyCK5DJ8azSn%XUxavY}GHwt9{}C
delta 454
zcmYjOKS)Ah5P#oO4@(6l5<?4X3L$;(Y4UWlAP7{#*1)9%p+68!k#Qw0tsk_sGzCdY
zVN;71E^SF;g_=zTN<$z~(&=mH;J&-x{qBDE@qJ}S*%24WHn&z)IjE+l<fP=4yneSV
z`IMkfmU|@G0(nOigqV<s1{Fn$BomQXa&}{RB`M2NNDjCaDXjRzf$7WmF=Ijg#@21t
z13*;-tY!d93~-32#Vbn<@M8)vON5x=9^Dwb=kvPvR7(MLy#luMfTI*&DDKn&>rHY}
zP<wd;FdqVRdI3XuQnqNy+Y{O*k@`;e08ItL=YWOY5&&#cZJ+X=NuDz}`Hg;&?ebv*
zXIXw`cv{K<o_qot=#IUv!Zl$NVaofsLRbeVkn6tzzdC^Fw#Ky{0dEfh+ceuf()bqf
zcT^JvKwGf^Rwj)AW>i2{r7BIDt$-IcKntmrDBAzO6iwOrxUmM>9^N(1@#w%as}wzh
QGmN?Tn(4vZ|CPVv7v6f1`2YX_
diff --git a/rtl_nic/rtl8168f-2.fw b/rtl_nic/rtl8168f-2.fw
index c468b8439d7fa5cc926ddc45c2f317c8a2cef384..c3424929bde4dd8caa6f45397ae50212445ba193 100644
GIT binary patch
delta 391
zcmYLEze_@K5P#pNeM+PzCrhxGwE2ARtGu3$L0d>P2H{piP14X{_;HA$aB?UJoElY#
z{s7m;T-pTtMVkaJ1_j+qp@ZW-cb~h@-3?|RBSk~3e01o$p1+sYCC7H`T++#A^jgN%
z0V%d6o=}F-H?}uDt)2Cfc3kabwVQOkLe48>wNbxKN!MKwDnb)955V`vuBue8!BHMm
zJ+Rgl;%1VM!{FrrY}dh9Qt%Ko1Ybz)cn55Tq&EV7&wzh|=U`uh;cxJ3Jeh6P!1(Gv
zjxA5|DYy`5idMBH$=u46I1|wn=yzmLt{gsrOK%e8n1sX^i4_?dyo#SlUx1(GNO@q<
z2J>yOHxG6d_+UvMd^!R@WpPwA{TA2>Y5>#1TPC73%iu>`KKW@3m5o}!@84UdrBt)A
H5xV*X4)%PE
delta 150
zcmcb>`GDPz0SJmpax4tZEYft1;tli+^o$h@4fKu7^bHL`l0Xmu#1DWtgdxbs%*e>V
zDL%;2H{LlvB{kmA(7@8rM8U|w%E-jZ(0rpG8zUzp6I%mQ8Cyg4<XFZUQ8~7T&z5Wr
nj2GD&8utSw6hZvSkC^m;Y#@5OS&UhUkx^x`CChXcpdAbV|1~3f
--
1.7.7.6
^ permalink raw reply related
* RE: Wrong use of MAX_JIFFY_OFFSET?
From: David Laight @ 2012-03-27 8:54 UTC (permalink / raw)
To: Liu Yu, netdev
In-Reply-To: <000901cd0bb8$77fdc460$67f94d20$@com.cn>
> -----Original Message-----
> From: netdev-owner@vger.kernel.org
> [mailto:netdev-owner@vger.kernel.org] On Behalf Of Liu Yu
> Sent: 27 March 2012 02:25
> To: netdev@vger.kernel.org
> Subject: Wrong use of MAX_JIFFY_OFFSET?
>
> Hi guys,
>
> I saw a couple of places in current kernel have this kind of code:
>
> > static inline unsigned int elapsed_jiffies_msecs(unsigned
> long start)
> > {
> > unsigned long end = jiffies;
> >
> > if (end >= start)
> > return jiffies_to_msecs(end - start);
> >
> > return jiffies_to_msecs(end + (MAX_JIFFY_OFFSET -
> start) + 1);
> > }
>
> As you know, jiffies has a type of unsigned long, so if we
> know which is the end and
> which is the start, then (end - start) can simply figure out how much
> jiffies flies, without worry about the overflow.
>
> Look at the code above, assume that there is just an overflow
> happening on
> jiffies: end=0 and start=~0UL.
> Since end < start, then the return value of the function is
> jiffies_to_msecs(MAX_JIFFY_OFFSET+2).
> But shouldn't the correct value be jiffies_to_msecs(1)?
>
> could someone tell me that am I missing anything?
That code has confused me...
MAX_JIFFIES_OFFSET appears to have something to do with
timespec_to_jiffies() rather than being anything to so with
the way 'jiffies' itself wraps.
Since arithmetic wrap is well defined for unsigned values
the correct code should just be:
return jiffies_to_ms(jiffies - start);
The code above is completly fubar when jiffies wraps.
David
^ permalink raw reply
* [PATCH] eql: dont rely on HZ=100
From: Eric Dumazet @ 2012-03-27 8:52 UTC (permalink / raw)
To: David Woodhouse, David Miller; +Cc: netdev
In-Reply-To: <1332836241.2058.35.camel@shinybook.infradead.org>
Le mardi 27 mars 2012 à 09:17 +0100, David Woodhouse a écrit :
> Thanks. I blame the baby for that one too. Once she's been taken
> swimming and dropped off at nursery and I've had at least two more cups
> of tea, I'll have another go :)
>
Looking at this driver, it seems it depends on HZ=100 ?
[PATCH] eql: dont rely on HZ=100
HZ is more likely to be 1000 these days.
timer handlers are run from softirq, no need to disable bh
skb priority 1 is TC_PRIO_FILLER
Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
---
drivers/net/eql.c | 7 ++++---
include/linux/if_eql.h | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/net/eql.c b/drivers/net/eql.c
index a59cf96..f219d38 100644
--- a/drivers/net/eql.c
+++ b/drivers/net/eql.c
@@ -125,6 +125,7 @@
#include <linux/if.h>
#include <linux/if_arp.h>
#include <linux/if_eql.h>
+#include <linux/pkt_sched.h>
#include <asm/uaccess.h>
@@ -143,7 +144,7 @@ static void eql_timer(unsigned long param)
equalizer_t *eql = (equalizer_t *) param;
struct list_head *this, *tmp, *head;
- spin_lock_bh(&eql->queue.lock);
+ spin_lock(&eql->queue.lock);
head = &eql->queue.all_slaves;
list_for_each_safe(this, tmp, head) {
slave_t *slave = list_entry(this, slave_t, list);
@@ -157,7 +158,7 @@ static void eql_timer(unsigned long param)
}
}
- spin_unlock_bh(&eql->queue.lock);
+ spin_unlock(&eql->queue.lock);
eql->timer.expires = jiffies + EQL_DEFAULT_RESCHED_IVAL;
add_timer(&eql->timer);
@@ -341,7 +342,7 @@ static netdev_tx_t eql_slave_xmit(struct sk_buff *skb, struct net_device *dev)
struct net_device *slave_dev = slave->dev;
skb->dev = slave_dev;
- skb->priority = 1;
+ skb->priority = TC_PRIO_FILLER;
slave->bytes_queued += skb->len;
dev_queue_xmit(skb);
dev->stats.tx_packets++;
diff --git a/include/linux/if_eql.h b/include/linux/if_eql.h
index 79c4f26..18a5d02 100644
--- a/include/linux/if_eql.h
+++ b/include/linux/if_eql.h
@@ -22,7 +22,7 @@
#define EQL_DEFAULT_SLAVE_PRIORITY 28800
#define EQL_DEFAULT_MAX_SLAVES 4
#define EQL_DEFAULT_MTU 576
-#define EQL_DEFAULT_RESCHED_IVAL 100
+#define EQL_DEFAULT_RESCHED_IVAL HZ
#define EQL_ENSLAVE (SIOCDEVPRIVATE)
#define EQL_EMANCIPATE (SIOCDEVPRIVATE + 1)
^ permalink raw reply related
* Re: [PATCH] eql: Fix byte stats
From: David Woodhouse @ 2012-03-27 8:17 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev
In-Reply-To: <1332835965.3248.2.camel@edumazet-laptop>
[-- Attachment #1: Type: text/plain, Size: 671 bytes --]
On Tue, 2012-03-27 at 01:12 -0700, Eric Dumazet wrote:
> Le lundi 26 mars 2012 à 08:29 +0100, David Woodhouse a écrit :
>
> Missing changelog and "Signed-off-by: ..."
The changelog was in the subject line; there's nothing more to say.
The lack of Signed-off-by is pure stupidity on my part. The baby ate my
brain. That's my excuse and I'm sticking to it.
> That adds a bug unfortunately.
>
> After dev_queue_xmit(skb) call, you cant safely dereference skb anymore.
Thanks. I blame the baby for that one too. Once she's been taken
swimming and dropped off at nursery and I've had at least two more cups
of tea, I'll have another go :)
--
dwmw2
[-- Attachment #2: smime.p7s --]
[-- Type: application/x-pkcs7-signature, Size: 5818 bytes --]
^ permalink raw reply
* Re: [PATCH] eql: Fix byte stats
From: Eric Dumazet @ 2012-03-27 8:12 UTC (permalink / raw)
To: David Woodhouse; +Cc: netdev
In-Reply-To: <1332746975.2379.5.camel@shinybook.infradead.org>
Le lundi 26 mars 2012 à 08:29 +0100, David Woodhouse a écrit :
Missing changelog and "Signed-off-by: ..."
> ---
> Sorry, forgot to tell Evolution not to word-wrap last time. It's a
> manual process — insert the patch from a text file, and set it to
> 'Preformatted'. I've also disabled the signature on this version; I'm
> not entirely sure if the git-am bug with QP got fixed yet.
>
I use Evolution too, its not that bad :)
> diff --git a/drivers/net/eql.c b/drivers/net/eql.c
> index a59cf96..f2d3741 100644
> --- a/drivers/net/eql.c
> +++ b/drivers/net/eql.c
> @@ -345,6 +345,7 @@ static netdev_tx_t eql_slave_xmit(struct sk_buff *skb, struct net_device *dev)
> slave->bytes_queued += skb->len;
> dev_queue_xmit(skb);
> dev->stats.tx_packets++;
> + dev->stats.tx_bytes += skb->len;
> } else {
> dev->stats.tx_dropped++;
> dev_kfree_skb(skb);
>
That adds a bug unfortunately.
After dev_queue_xmit(skb) call, you cant safely dereference skb anymore.
^ permalink raw reply
* [PATCH net-next 2/5] r8169: add csi_opt
From: Hayes Wang @ 2012-03-27 7:53 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
In-Reply-To: <1332834834-5185-1-git-send-email-hayeswang@realtek.com>
Modify the CSI relative functions by using csi_opt method.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/ethernet/realtek/r8169.c | 281 +++++++++++++++++++++-------------
1 files changed, 175 insertions(+), 106 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 3edb996..35b1fea 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -356,6 +356,9 @@ enum rtl8168_8101_registers {
#define CSIAR_BYTE_ENABLE 0x0f
#define CSIAR_BYTE_ENABLE_SHIFT 12
#define CSIAR_ADDR_MASK 0x0fff
+#define CSIAR_FUNC_CARD 0x00000000
+#define CSIAR_FUNC_SDIO 0x00010000
+#define CSIAR_FUNC_NIC 0x00020000
PMCH = 0x6f,
EPHYAR = 0x80,
#define EPHYAR_FLAG 0x80000000
@@ -717,6 +720,11 @@ struct rtl8169_private {
void (*disable)(struct rtl8169_private *);
} jumbo_ops;
+ struct csi_ops {
+ void (*write)(void __iomem *, int, int);
+ u32 (*read)(void __iomem *, int);
+ } csi_ops;
+
int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);
int (*get_settings)(struct net_device *, struct ethtool_cmd *);
void (*phy_reset_enable)(struct rtl8169_private *tp);
@@ -1079,40 +1087,6 @@ static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr)
return value;
}
-static void rtl_csi_write(void __iomem *ioaddr, int addr, int value)
-{
- unsigned int i;
-
- RTL_W32(CSIDR, value);
- RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
- CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
-
- for (i = 0; i < 100; i++) {
- if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
- break;
- udelay(10);
- }
-}
-
-static u32 rtl_csi_read(void __iomem *ioaddr, int addr)
-{
- u32 value = ~0x00;
- unsigned int i;
-
- RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
- CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
-
- for (i = 0; i < 100; i++) {
- if (RTL_R32(CSIAR) & CSIAR_FLAG) {
- value = RTL_R32(CSIDR);
- break;
- }
- udelay(10);
- }
-
- return value;
-}
-
static
void rtl_eri_write(void __iomem *ioaddr, int addr, u32 mask, u32 val, int type)
{
@@ -4209,22 +4183,78 @@ static void rtl_hw_start_8169(struct net_device *dev)
RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
}
-static void rtl_csi_access_enable(void __iomem *ioaddr, u32 bits)
+static void rtl_csi_write(struct rtl8169_private *tp, int addr, int value)
+{
+ tp->csi_ops.write(tp->mmio_addr, addr, value);
+}
+
+static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
+{
+ return tp->csi_ops.read(tp->mmio_addr, addr);
+}
+
+static void rtl_csi_access_enable(struct rtl8169_private *tp, u32 bits)
{
u32 csi;
- csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
- rtl_csi_write(ioaddr, 0x070c, csi | bits);
+ csi = rtl_csi_read(tp, 0x070c) & 0x00ffffff;
+ rtl_csi_write(tp, 0x070c, csi | bits);
+}
+
+static void rtl_csi_access_enable_1(struct rtl8169_private *tp)
+{
+ rtl_csi_access_enable(tp, 0x17000000);
+}
+
+static void rtl_csi_access_enable_2(struct rtl8169_private *tp)
+{
+ rtl_csi_access_enable(tp, 0x27000000);
+}
+
+static void r8169_csi_write(void __iomem *ioaddr, int addr, int value)
+{
+ unsigned int i;
+
+ RTL_W32(CSIDR, value);
+ RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
+
+ for (i = 0; i < 100; i++) {
+ if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
+ break;
+ udelay(10);
+ }
}
-static void rtl_csi_access_enable_1(void __iomem *ioaddr)
+static u32 r8169_csi_read(void __iomem *ioaddr, int addr)
{
- rtl_csi_access_enable(ioaddr, 0x17000000);
+ u32 value = ~0x00;
+ unsigned int i;
+
+ RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
+
+ for (i = 0; i < 100; i++) {
+ if (RTL_R32(CSIAR) & CSIAR_FLAG) {
+ value = RTL_R32(CSIDR);
+ break;
+ }
+ udelay(10);
+ }
+
+ return value;
}
-static void rtl_csi_access_enable_2(void __iomem *ioaddr)
+static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
{
- rtl_csi_access_enable(ioaddr, 0x27000000);
+ struct csi_ops *ops = &tp->csi_ops;
+
+ switch (tp->mac_version) {
+ default:
+ ops->write = r8169_csi_write;
+ ops->read = r8169_csi_read;
+ break;
+ }
}
struct ephy_info {
@@ -4281,8 +4311,11 @@ static void rtl_enable_clock_request(struct pci_dev *pdev)
PktCntrDisable | \
Mac_dbgo_sel)
-static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
@@ -4291,17 +4324,22 @@ static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}
-static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168bef(struct rtl8169_private *tp)
{
- rtl_hw_start_8168bb(ioaddr, pdev);
+ void __iomem *ioaddr = tp->mmio_addr;
+
+ rtl_hw_start_8168bb(tp);
RTL_W8(MaxTxPacketSize, TxPacketMax);
RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
}
-static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
+static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
RTL_W8(Config1, RTL_R8(Config1) | Speed_down);
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
@@ -4313,8 +4351,9 @@ static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
-static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
static const struct ephy_info e_info_8168cp[] = {
{ 0x01, 0, 0x0001 },
{ 0x02, 0x0800, 0x1000 },
@@ -4323,16 +4362,19 @@ static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
{ 0x07, 0, 0x2000 }
};
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
- __rtl_hw_start_8168cp(ioaddr, pdev);
+ __rtl_hw_start_8168cp(tp);
}
-static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_2(ioaddr);
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
+ rtl_csi_access_enable_2(tp);
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
@@ -4341,9 +4383,12 @@ static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
-static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_2(ioaddr);
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
+ rtl_csi_access_enable_2(tp);
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
@@ -4357,52 +4402,57 @@ static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
-static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
static const struct ephy_info e_info_8168c_1[] = {
{ 0x02, 0x0800, 0x1000 },
{ 0x03, 0, 0x0002 },
{ 0x06, 0x0080, 0x0000 }
};
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));
- __rtl_hw_start_8168cp(ioaddr, pdev);
+ __rtl_hw_start_8168cp(tp);
}
-static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168c_2(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
static const struct ephy_info e_info_8168c_2[] = {
{ 0x01, 0, 0x0001 },
{ 0x03, 0x0400, 0x0220 }
};
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
- __rtl_hw_start_8168cp(ioaddr, pdev);
+ __rtl_hw_start_8168cp(tp);
}
-static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168c_3(struct rtl8169_private *tp)
{
- rtl_hw_start_8168c_2(ioaddr, pdev);
+ rtl_hw_start_8168c_2(tp);
}
-static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
- __rtl_hw_start_8168cp(ioaddr, pdev);
+ __rtl_hw_start_8168cp(tp);
}
-static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168d(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_2(ioaddr);
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
+ rtl_csi_access_enable_2(tp);
rtl_disable_clock_request(pdev);
@@ -4413,9 +4463,12 @@ static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
-static void rtl_hw_start_8168dp(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_1(ioaddr);
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
+ rtl_csi_access_enable_1(tp);
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
@@ -4424,8 +4477,10 @@ static void rtl_hw_start_8168dp(void __iomem *ioaddr, struct pci_dev *pdev)
rtl_disable_clock_request(pdev);
}
-static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8168d_4[] = {
{ 0x0b, ~0, 0x48 },
{ 0x19, 0x20, 0x50 },
@@ -4433,7 +4488,7 @@ static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)
};
int i;
- rtl_csi_access_enable_1(ioaddr);
+ rtl_csi_access_enable_1(tp);
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
@@ -4450,8 +4505,10 @@ static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)
rtl_enable_clock_request(pdev);
}
-static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8168e_1[] = {
{ 0x00, 0x0200, 0x0100 },
{ 0x00, 0x0000, 0x0004 },
@@ -4468,7 +4525,7 @@ static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)
{ 0x0a, 0x0000, 0x0040 }
};
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
rtl_ephy_init(ioaddr, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
@@ -4485,14 +4542,16 @@ static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}
-static void rtl_hw_start_8168e_2(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8168e_2[] = {
{ 0x09, 0x0000, 0x0080 },
{ 0x19, 0x0000, 0x0224 }
};
- rtl_csi_access_enable_1(ioaddr);
+ rtl_csi_access_enable_1(tp);
rtl_ephy_init(ioaddr, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
@@ -4523,8 +4582,10 @@ static void rtl_hw_start_8168e_2(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}
-static void rtl_hw_start_8168f_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8168f_1[] = {
{ 0x06, 0x00c0, 0x0020 },
{ 0x08, 0x0001, 0x0002 },
@@ -4532,7 +4593,7 @@ static void rtl_hw_start_8168f_1(void __iomem *ioaddr, struct pci_dev *pdev)
{ 0x19, 0x0000, 0x0224 }
};
- rtl_csi_access_enable_1(ioaddr);
+ rtl_csi_access_enable_1(tp);
rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
@@ -4570,7 +4631,6 @@ static void rtl_hw_start_8168(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
void __iomem *ioaddr = tp->mmio_addr;
- struct pci_dev *pdev = tp->pci_dev;
RTL_W8(Cfg9346, Cfg9346_Unlock);
@@ -4601,67 +4661,67 @@ static void rtl_hw_start_8168(struct net_device *dev)
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_11:
- rtl_hw_start_8168bb(ioaddr, pdev);
+ rtl_hw_start_8168bb(tp);
break;
case RTL_GIGA_MAC_VER_12:
case RTL_GIGA_MAC_VER_17:
- rtl_hw_start_8168bef(ioaddr, pdev);
+ rtl_hw_start_8168bef(tp);
break;
case RTL_GIGA_MAC_VER_18:
- rtl_hw_start_8168cp_1(ioaddr, pdev);
+ rtl_hw_start_8168cp_1(tp);
break;
case RTL_GIGA_MAC_VER_19:
- rtl_hw_start_8168c_1(ioaddr, pdev);
+ rtl_hw_start_8168c_1(tp);
break;
case RTL_GIGA_MAC_VER_20:
- rtl_hw_start_8168c_2(ioaddr, pdev);
+ rtl_hw_start_8168c_2(tp);
break;
case RTL_GIGA_MAC_VER_21:
- rtl_hw_start_8168c_3(ioaddr, pdev);
+ rtl_hw_start_8168c_3(tp);
break;
case RTL_GIGA_MAC_VER_22:
- rtl_hw_start_8168c_4(ioaddr, pdev);
+ rtl_hw_start_8168c_4(tp);
break;
case RTL_GIGA_MAC_VER_23:
- rtl_hw_start_8168cp_2(ioaddr, pdev);
+ rtl_hw_start_8168cp_2(tp);
break;
case RTL_GIGA_MAC_VER_24:
- rtl_hw_start_8168cp_3(ioaddr, pdev);
+ rtl_hw_start_8168cp_3(tp);
break;
case RTL_GIGA_MAC_VER_25:
case RTL_GIGA_MAC_VER_26:
case RTL_GIGA_MAC_VER_27:
- rtl_hw_start_8168d(ioaddr, pdev);
+ rtl_hw_start_8168d(tp);
break;
case RTL_GIGA_MAC_VER_28:
- rtl_hw_start_8168d_4(ioaddr, pdev);
+ rtl_hw_start_8168d_4(tp);
break;
case RTL_GIGA_MAC_VER_31:
- rtl_hw_start_8168dp(ioaddr, pdev);
+ rtl_hw_start_8168dp(tp);
break;
case RTL_GIGA_MAC_VER_32:
case RTL_GIGA_MAC_VER_33:
- rtl_hw_start_8168e_1(ioaddr, pdev);
+ rtl_hw_start_8168e_1(tp);
break;
case RTL_GIGA_MAC_VER_34:
- rtl_hw_start_8168e_2(ioaddr, pdev);
+ rtl_hw_start_8168e_2(tp);
break;
case RTL_GIGA_MAC_VER_35:
case RTL_GIGA_MAC_VER_36:
- rtl_hw_start_8168f_1(ioaddr, pdev);
+ rtl_hw_start_8168f_1(tp);
break;
default:
@@ -4688,8 +4748,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
PktCntrDisable | \
Mac_dbgo_sel)
-static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
static const struct ephy_info e_info_8102e_1[] = {
{ 0x01, 0, 0x6e65 },
{ 0x02, 0, 0x091f },
@@ -4702,7 +4764,7 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
};
u8 cfg1;
- rtl_csi_access_enable_2(ioaddr);
+ rtl_csi_access_enable_2(tp);
RTL_W8(DBG_REG, FIX_NAK_1);
@@ -4719,9 +4781,12 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
}
-static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
{
- rtl_csi_access_enable_2(ioaddr);
+ void __iomem *ioaddr = tp->mmio_addr;
+ struct pci_dev *pdev = tp->pci_dev;
+
+ rtl_csi_access_enable_2(tp);
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
@@ -4729,15 +4794,16 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
}
-static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8102e_3(struct rtl8169_private *tp)
{
- rtl_hw_start_8102e_2(ioaddr, pdev);
+ rtl_hw_start_8102e_2(tp);
- rtl_ephy_write(ioaddr, 0x03, 0xc2f9);
+ rtl_ephy_write(tp->mmio_addr, 0x03, 0xc2f9);
}
-static void rtl_hw_start_8105e_1(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
static const struct ephy_info e_info_8105e_1[] = {
{ 0x07, 0, 0x4000 },
{ 0x19, 0, 0x0200 },
@@ -4761,9 +4827,11 @@ static void rtl_hw_start_8105e_1(void __iomem *ioaddr, struct pci_dev *pdev)
rtl_ephy_init(ioaddr, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));
}
-static void rtl_hw_start_8105e_2(void __iomem *ioaddr, struct pci_dev *pdev)
+static void rtl_hw_start_8105e_2(struct rtl8169_private *tp)
{
- rtl_hw_start_8105e_1(ioaddr, pdev);
+ void __iomem *ioaddr = tp->mmio_addr;
+
+ rtl_hw_start_8105e_1(tp);
rtl_ephy_write(ioaddr, 0x1e, rtl_ephy_read(ioaddr, 0x1e) | 0x8000);
}
@@ -4790,22 +4858,22 @@ static void rtl_hw_start_8101(struct net_device *dev)
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_07:
- rtl_hw_start_8102e_1(ioaddr, pdev);
+ rtl_hw_start_8102e_1(tp);
break;
case RTL_GIGA_MAC_VER_08:
- rtl_hw_start_8102e_3(ioaddr, pdev);
+ rtl_hw_start_8102e_3(tp);
break;
case RTL_GIGA_MAC_VER_09:
- rtl_hw_start_8102e_2(ioaddr, pdev);
+ rtl_hw_start_8102e_2(tp);
break;
case RTL_GIGA_MAC_VER_29:
- rtl_hw_start_8105e_1(ioaddr, pdev);
+ rtl_hw_start_8105e_1(tp);
break;
case RTL_GIGA_MAC_VER_30:
- rtl_hw_start_8105e_2(ioaddr, pdev);
+ rtl_hw_start_8105e_2(tp);
break;
}
@@ -6199,6 +6267,7 @@ rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
rtl_init_mdio_ops(tp);
rtl_init_pll_power_ops(tp);
rtl_init_jumbo_ops(tp);
+ rtl_init_csi_ops(tp);
rtl8169_print_mac_version(tp);
--
1.7.7.6
^ permalink raw reply related
* [PATCH net-next 5/5] r8169: support RTL8411
From: Hayes Wang @ 2012-03-27 7:53 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
In-Reply-To: <1332834834-5185-1-git-send-email-hayeswang@realtek.com>
Support the new chip RTL8411.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/ethernet/realtek/r8169.c | 140 +++++++++++++++++++++++++++++++++-
1 files changed, 138 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 6c2835f..99daad7 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -46,6 +46,7 @@
#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
+#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
#ifdef RTL8169_DEBUG
#define assert(expr) \
@@ -136,6 +137,7 @@ enum mac_version {
RTL_GIGA_MAC_VER_35,
RTL_GIGA_MAC_VER_36,
RTL_GIGA_MAC_VER_37,
+ RTL_GIGA_MAC_VER_38,
RTL_GIGA_MAC_NONE = 0xff,
};
@@ -250,6 +252,9 @@ static const struct {
JUMBO_9K, false),
[RTL_GIGA_MAC_VER_37] =
_R("RTL8402", RTL_TD_1, FIRMWARE_8402_1,
+ JUMBO_1K, true),
+ [RTL_GIGA_MAC_VER_38] =
+ _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1,
JUMBO_1K, true)
};
#undef _R
@@ -783,6 +788,7 @@ MODULE_FIRMWARE(FIRMWARE_8105E_1);
MODULE_FIRMWARE(FIRMWARE_8168F_1);
MODULE_FIRMWARE(FIRMWARE_8168F_2);
MODULE_FIRMWARE(FIRMWARE_8402_1);
+MODULE_FIRMWARE(FIRMWARE_8411_1);
static void rtl_lock_work(struct rtl8169_private *tp)
{
@@ -1262,7 +1268,8 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
if (!netif_running(dev))
return;
- if (tp->mac_version == RTL_GIGA_MAC_VER_34) {
+ if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_38) {
if (RTL_R8(PHYstatus) & _1000bpsF) {
rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,
0x00000011, ERIAR_EXGMAC);
@@ -1867,6 +1874,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
int mac_version;
} mac_info[] = {
/* 8168F family. */
+ { 0x7c800000, 0x48800000, RTL_GIGA_MAC_VER_38 },
{ 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 },
{ 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 },
@@ -3084,6 +3092,104 @@ static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
rtl8168f_hw_phy_config(tp);
}
+static void rtl8411_hw_phy_config(struct rtl8169_private *tp)
+{
+ void __iomem *ioaddr = tp->mmio_addr;
+ static const struct phy_reg phy_reg_init[] = {
+ /* Channel estimation fine tune */
+ { 0x1f, 0x0003 },
+ { 0x09, 0xa20f },
+ { 0x1f, 0x0000 },
+
+ /* Modify green table for giga & fnet */
+ { 0x1f, 0x0005 },
+ { 0x05, 0x8b55 },
+ { 0x06, 0x0000 },
+ { 0x05, 0x8b5e },
+ { 0x06, 0x0000 },
+ { 0x05, 0x8b67 },
+ { 0x06, 0x0000 },
+ { 0x05, 0x8b70 },
+ { 0x06, 0x0000 },
+ { 0x1f, 0x0000 },
+ { 0x1f, 0x0007 },
+ { 0x1e, 0x0078 },
+ { 0x17, 0x0000 },
+ { 0x19, 0x00aa },
+ { 0x1f, 0x0000 },
+
+ /* Modify green table for 10M */
+ { 0x1f, 0x0005 },
+ { 0x05, 0x8b79 },
+ { 0x06, 0xaa00 },
+ { 0x1f, 0x0000 },
+
+ /* Disable hiimpedance detection (RTCT) */
+ { 0x1f, 0x0003 },
+ { 0x01, 0x328a },
+ { 0x1f, 0x0000 }
+ };
+
+
+ rtl_apply_firmware(tp);
+
+ rtl8168f_hw_phy_config(tp);
+
+ /* Improve 2-pair detection performance */
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b85);
+ rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
+ rtl_writephy(tp, 0x1f, 0x0000);
+
+ rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+
+ /* Modify green table for giga */
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b54);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
+ rtl_writephy(tp, 0x05, 0x8b5d);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
+ rtl_writephy(tp, 0x05, 0x8a7c);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
+ rtl_writephy(tp, 0x05, 0x8a7f);
+ rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);
+ rtl_writephy(tp, 0x05, 0x8a82);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
+ rtl_writephy(tp, 0x05, 0x8a85);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
+ rtl_writephy(tp, 0x05, 0x8a88);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
+ rtl_writephy(tp, 0x1f, 0x0000);
+
+ /* uc same-seed solution */
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b85);
+ rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);
+ rtl_writephy(tp, 0x1f, 0x0000);
+
+ /* eee setting */
+ rtl_w1w0_eri(ioaddr, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b85);
+ rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
+ rtl_writephy(tp, 0x1f, 0x0004);
+ rtl_writephy(tp, 0x1f, 0x0007);
+ rtl_writephy(tp, 0x1e, 0x0020);
+ rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
+ rtl_writephy(tp, 0x1f, 0x0000);
+ rtl_writephy(tp, 0x0d, 0x0007);
+ rtl_writephy(tp, 0x0e, 0x003c);
+ rtl_writephy(tp, 0x0d, 0x4007);
+ rtl_writephy(tp, 0x0e, 0x0000);
+ rtl_writephy(tp, 0x0d, 0x0000);
+
+ /* Green feature */
+ rtl_writephy(tp, 0x1f, 0x0003);
+ rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
+ rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
+ rtl_writephy(tp, 0x1f, 0x0000);
+}
+
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
{
static const struct phy_reg phy_reg_init[] = {
@@ -3238,6 +3344,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
rtl8402_hw_phy_config(tp);
break;
+ case RTL_GIGA_MAC_VER_38:
+ rtl8411_hw_phy_config(tp);
+ break;
+
default:
break;
}
@@ -3476,6 +3586,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
case RTL_GIGA_MAC_VER_33:
case RTL_GIGA_MAC_VER_34:
case RTL_GIGA_MAC_VER_37:
+ case RTL_GIGA_MAC_VER_38:
RTL_W32(RxConfig, RTL_R32(RxConfig) |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
break;
@@ -3722,6 +3833,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
case RTL_GIGA_MAC_VER_34:
case RTL_GIGA_MAC_VER_35:
case RTL_GIGA_MAC_VER_36:
+ case RTL_GIGA_MAC_VER_38:
ops->down = r8168_pll_power_down;
ops->up = r8168_pll_power_up;
break;
@@ -4008,7 +4120,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
tp->mac_version == RTL_GIGA_MAC_VER_35 ||
tp->mac_version == RTL_GIGA_MAC_VER_36 ||
- tp->mac_version == RTL_GIGA_MAC_VER_37) {
+ tp->mac_version == RTL_GIGA_MAC_VER_37 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_38) {
RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
while (!(RTL_R32(TxConfig) & TXCFG_EMPTY))
udelay(100);
@@ -4317,6 +4430,7 @@ static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_37:
+ case RTL_GIGA_MAC_VER_38:
ops->write = r8402_csi_write;
ops->read = r8402_csi_read;
break;
@@ -4705,6 +4819,24 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
}
+static void rtl_hw_start_8411(struct rtl8169_private *tp)
+{
+ void __iomem *ioaddr = tp->mmio_addr;
+ static const struct ephy_info e_info_8168f_1[] = {
+ { 0x06, 0x00c0, 0x0020 },
+ { 0x0f, 0xffff, 0x5200 },
+ { 0x1e, 0x0000, 0x4000 },
+ { 0x19, 0x0000, 0x0224 }
+ };
+
+ rtl_hw_start_8168f(tp);
+
+ rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
+
+ rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000,
+ ERIAR_EXGMAC);
+}
+
static void rtl_hw_start_8168(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
@@ -4802,6 +4934,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
rtl_hw_start_8168f_1(tp);
break;
+ case RTL_GIGA_MAC_VER_38:
+ rtl_hw_start_8411(tp);
+ break;
+
default:
printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
dev->name, tp->mac_version);
--
1.7.7.6
^ permalink raw reply related
* [PATCH net-next 4/5] r8169: adjust some functions of 8111f
From: Hayes Wang @ 2012-03-27 7:53 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
In-Reply-To: <1332834834-5185-1-git-send-email-hayeswang@realtek.com>
Put some settings of 8111f into one function which may be reused.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/ethernet/realtek/r8169.c | 99 ++++++++++++++++------------------
1 files changed, 47 insertions(+), 52 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index ecf8042..6c2835f 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3005,6 +3005,28 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)
rtl_writephy(tp, 0x1f, 0x0000);
}
+static void rtl8168f_hw_phy_config(struct rtl8169_private *tp)
+{
+ /* For 4-corner performance improve */
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b80);
+ rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
+ rtl_writephy(tp, 0x1f, 0x0000);
+
+ /* PHY auto speed down */
+ rtl_writephy(tp, 0x1f, 0x0007);
+ rtl_writephy(tp, 0x1e, 0x002d);
+ rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
+ rtl_writephy(tp, 0x1f, 0x0000);
+ rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);
+
+ /* Improve 10M EEE waveform */
+ rtl_writephy(tp, 0x1f, 0x0005);
+ rtl_writephy(tp, 0x05, 0x8b86);
+ rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
+ rtl_writephy(tp, 0x1f, 0x0000);
+}
+
static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)
{
static const struct phy_reg phy_reg_init[] = {
@@ -3046,24 +3068,7 @@ static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)
rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
- /* For 4-corner performance improve */
- rtl_writephy(tp, 0x1f, 0x0005);
- rtl_writephy(tp, 0x05, 0x8b80);
- rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
-
- /* PHY auto speed down */
- rtl_writephy(tp, 0x1f, 0x0007);
- rtl_writephy(tp, 0x1e, 0x002d);
- rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
- rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);
-
- /* Improve 10M EEE waveform */
- rtl_writephy(tp, 0x1f, 0x0005);
- rtl_writephy(tp, 0x05, 0x8b86);
- rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
+ rtl8168f_hw_phy_config(tp);
/* Improve 2-pair detection performance */
rtl_writephy(tp, 0x1f, 0x0005);
@@ -3076,24 +3081,7 @@ static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
{
rtl_apply_firmware(tp);
- /* For 4-corner performance improve */
- rtl_writephy(tp, 0x1f, 0x0005);
- rtl_writephy(tp, 0x05, 0x8b80);
- rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
-
- /* PHY auto speed down */
- rtl_writephy(tp, 0x1f, 0x0007);
- rtl_writephy(tp, 0x1e, 0x002d);
- rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
- rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);
-
- /* Improve 10M EEE waveform */
- rtl_writephy(tp, 0x1f, 0x0005);
- rtl_writephy(tp, 0x05, 0x8b86);
- rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
- rtl_writephy(tp, 0x1f, 0x0000);
+ rtl8168f_hw_phy_config(tp);
}
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
@@ -4665,20 +4653,12 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}
-static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
+static void rtl_hw_start_8168f(struct rtl8169_private *tp)
{
void __iomem *ioaddr = tp->mmio_addr;
struct pci_dev *pdev = tp->pci_dev;
- static const struct ephy_info e_info_8168f_1[] = {
- { 0x06, 0x00c0, 0x0020 },
- { 0x08, 0x0001, 0x0002 },
- { 0x09, 0x0000, 0x0080 },
- { 0x19, 0x0000, 0x0224 }
- };
-
- rtl_csi_access_enable_1(tp);
- rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
+ rtl_csi_access_enable_2(tp);
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
@@ -4692,8 +4672,6 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
rtl_w1w0_eri(ioaddr, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
rtl_eri_write(ioaddr, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
rtl_eri_write(ioaddr, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC);
- rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00,
- ERIAR_EXGMAC);
RTL_W8(MaxTxPacketSize, EarlySize);
@@ -4701,15 +4679,32 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
-
- /* Adjust EEE LED frequency */
- RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
-
RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}
+static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
+{
+ void __iomem *ioaddr = tp->mmio_addr;
+ static const struct ephy_info e_info_8168f_1[] = {
+ { 0x06, 0x00c0, 0x0020 },
+ { 0x08, 0x0001, 0x0002 },
+ { 0x09, 0x0000, 0x0080 },
+ { 0x19, 0x0000, 0x0224 }
+ };
+
+ rtl_hw_start_8168f(tp);
+
+ rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
+
+ rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00,
+ ERIAR_EXGMAC);
+
+ /* Adjust EEE LED frequency */
+ RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
+}
+
static void rtl_hw_start_8168(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
--
1.7.7.6
^ permalink raw reply related
* [PATCH net-next 1/5] r8169: modify pll power function
From: Hayes Wang @ 2012-03-27 7:53 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
Adjust r810x_pll_power_down, r810x_pll_power_up, and r8168_pll_power_up.
Always power up device during rtl_open. For r810x, turn off more power
when the WOL is disabled.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/ethernet/realtek/r8169.c | 37 +++++++++++++++++++++++++++------
1 files changed, 30 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 27c358c..3edb996 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3508,15 +3508,45 @@ static void r810x_phy_power_up(struct rtl8169_private *tp)
static void r810x_pll_power_down(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+
if (rtl_wol_pll_power_down(tp))
return;
r810x_phy_power_down(tp);
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_07:
+ case RTL_GIGA_MAC_VER_08:
+ case RTL_GIGA_MAC_VER_09:
+ case RTL_GIGA_MAC_VER_10:
+ case RTL_GIGA_MAC_VER_13:
+ case RTL_GIGA_MAC_VER_16:
+ break;
+ default:
+ RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
+ break;
+ }
}
static void r810x_pll_power_up(struct rtl8169_private *tp)
{
+ void __iomem *ioaddr = tp->mmio_addr;
+
r810x_phy_power_up(tp);
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_07:
+ case RTL_GIGA_MAC_VER_08:
+ case RTL_GIGA_MAC_VER_09:
+ case RTL_GIGA_MAC_VER_10:
+ case RTL_GIGA_MAC_VER_13:
+ case RTL_GIGA_MAC_VER_16:
+ break;
+ default:
+ RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
+ break;
+ }
}
static void r8168_phy_power_up(struct rtl8169_private *tp)
@@ -3620,13 +3650,6 @@ static void r8168_pll_power_up(struct rtl8169_private *tp)
{
void __iomem *ioaddr = tp->mmio_addr;
- if ((tp->mac_version == RTL_GIGA_MAC_VER_27 ||
- tp->mac_version == RTL_GIGA_MAC_VER_28 ||
- tp->mac_version == RTL_GIGA_MAC_VER_31) &&
- r8168dp_check_dash(tp)) {
- return;
- }
-
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_25:
case RTL_GIGA_MAC_VER_26:
--
1.7.7.6
^ permalink raw reply related
* Re: [PATCH v8 RESEND] ARM: net: JIT compiler for packet filters
From: Russell King - ARM Linux @ 2012-03-27 7:56 UTC (permalink / raw)
To: Mircea Gherzan; +Cc: netdev, eric.dumazet, David Miller, linux-arm-kernel
In-Reply-To: <20120325133506.GG5611@n2100.arm.linux.org.uk>
Mircea, could you please supply an ack for the below fix to silence a
warning. Thanks.
8<=====
ARM: fix Kconfig warning for HAVE_BPF_JIT
Last night's randconfig and the allnoconfig builds spat out the
following warning while building:
warning: (ARM) selects HAVE_BPF_JIT which has unmet direct dependencies (NET)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9e21b6e..6a54606 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -33,7 +33,7 @@ config ARM
select GENERIC_IRQ_SHOW
select CPU_PM if (SUSPEND || CPU_IDLE)
select GENERIC_PCI_IOMAP
- select HAVE_BPF_JIT
+ select HAVE_BPF_JIT if NET
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and
^ permalink raw reply related
* [PATCH net-next 3/5] r8169: support RTL8402
From: Hayes Wang @ 2012-03-27 7:53 UTC (permalink / raw)
To: romieu; +Cc: netdev, linux-kernel, Hayes Wang
In-Reply-To: <1332834834-5185-1-git-send-email-hayeswang@realtek.com>
Support the new chip RTL8402.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
drivers/net/ethernet/realtek/r8169.c | 119 +++++++++++++++++++++++++++++++++-
1 files changed, 118 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 35b1fea..ecf8042 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -45,6 +45,7 @@
#define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
+#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
#ifdef RTL8169_DEBUG
#define assert(expr) \
@@ -134,6 +135,7 @@ enum mac_version {
RTL_GIGA_MAC_VER_34,
RTL_GIGA_MAC_VER_35,
RTL_GIGA_MAC_VER_36,
+ RTL_GIGA_MAC_VER_37,
RTL_GIGA_MAC_NONE = 0xff,
};
@@ -246,6 +248,9 @@ static const struct {
[RTL_GIGA_MAC_VER_36] =
_R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_2,
JUMBO_9K, false),
+ [RTL_GIGA_MAC_VER_37] =
+ _R("RTL8402", RTL_TD_1, FIRMWARE_8402_1,
+ JUMBO_1K, true)
};
#undef _R
@@ -777,6 +782,7 @@ MODULE_FIRMWARE(FIRMWARE_8168E_3);
MODULE_FIRMWARE(FIRMWARE_8105E_1);
MODULE_FIRMWARE(FIRMWARE_8168F_1);
MODULE_FIRMWARE(FIRMWARE_8168F_2);
+MODULE_FIRMWARE(FIRMWARE_8402_1);
static void rtl_lock_work(struct rtl8169_private *tp)
{
@@ -1291,6 +1297,16 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_1111,
0x0000003f, ERIAR_EXGMAC);
}
+ } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) {
+ if (RTL_R8(PHYstatus) & _10bps) {
+ rtl_eri_write(ioaddr, 0x1d0, ERIAR_MASK_0011,
+ 0x4d02, ERIAR_EXGMAC);
+ rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_0011,
+ 0x0060, ERIAR_EXGMAC);
+ } else {
+ rtl_eri_write(ioaddr, 0x1d0, ERIAR_MASK_0011,
+ 0x0000, ERIAR_EXGMAC);
+ }
}
}
@@ -1888,6 +1904,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
{ 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 },
/* 8101 family. */
+ { 0x7c800000, 0x44000000, RTL_GIGA_MAC_VER_37 },
{ 0x7cf00000, 0x40b00000, RTL_GIGA_MAC_VER_30 },
{ 0x7cf00000, 0x40a00000, RTL_GIGA_MAC_VER_30 },
{ 0x7cf00000, 0x40900000, RTL_GIGA_MAC_VER_29 },
@@ -3122,6 +3139,25 @@ static void rtl8105e_hw_phy_config(struct rtl8169_private *tp)
rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
+static void rtl8402_hw_phy_config(struct rtl8169_private *tp)
+{
+ void __iomem *ioaddr = tp->mmio_addr;
+
+ /* Disable ALDPS before setting firmware */
+ rtl_writephy(tp, 0x1f, 0x0000);
+ rtl_writephy(tp, 0x18, 0x0310);
+ msleep(20);
+
+ rtl_apply_firmware(tp);
+
+ /* EEE setting */
+ rtl_eri_write(ioaddr, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
+ rtl_writephy(tp, 0x1f, 0x0004);
+ rtl_writephy(tp, 0x10, 0x401f);
+ rtl_writephy(tp, 0x19, 0x7030);
+ rtl_writephy(tp, 0x1f, 0x0000);
+}
+
static void rtl_hw_phy_config(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
@@ -3210,6 +3246,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
rtl8168f_2_hw_phy_config(tp);
break;
+ case RTL_GIGA_MAC_VER_37:
+ rtl8402_hw_phy_config(tp);
+ break;
+
default:
break;
}
@@ -3447,6 +3487,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
case RTL_GIGA_MAC_VER_32:
case RTL_GIGA_MAC_VER_33:
case RTL_GIGA_MAC_VER_34:
+ case RTL_GIGA_MAC_VER_37:
RTL_W32(RxConfig, RTL_R32(RxConfig) |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
break;
@@ -3668,6 +3709,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
case RTL_GIGA_MAC_VER_16:
case RTL_GIGA_MAC_VER_29:
case RTL_GIGA_MAC_VER_30:
+ case RTL_GIGA_MAC_VER_37:
ops->down = r810x_pll_power_down;
ops->up = r810x_pll_power_up;
break;
@@ -3977,7 +4019,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
udelay(20);
} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
tp->mac_version == RTL_GIGA_MAC_VER_35 ||
- tp->mac_version == RTL_GIGA_MAC_VER_36) {
+ tp->mac_version == RTL_GIGA_MAC_VER_36 ||
+ tp->mac_version == RTL_GIGA_MAC_VER_37) {
RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
while (!(RTL_R32(TxConfig) & TXCFG_EMPTY))
udelay(100);
@@ -4245,11 +4288,51 @@ static u32 r8169_csi_read(void __iomem *ioaddr, int addr)
return value;
}
+static void r8402_csi_write(void __iomem *ioaddr, int addr, int value)
+{
+ unsigned int i;
+
+ RTL_W32(CSIDR, value);
+ RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT |
+ CSIAR_FUNC_NIC);
+
+ for (i = 0; i < 100; i++) {
+ if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
+ break;
+ udelay(10);
+ }
+}
+
+static u32 r8402_csi_read(void __iomem *ioaddr, int addr)
+{
+ u32 value = ~0x00;
+ unsigned int i;
+
+ RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | CSIAR_FUNC_NIC |
+ CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
+
+ for (i = 0; i < 100; i++) {
+ if (RTL_R32(CSIAR) & CSIAR_FLAG) {
+ value = RTL_R32(CSIDR);
+ break;
+ }
+ udelay(10);
+ }
+
+ return value;
+}
+
static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
{
struct csi_ops *ops = &tp->csi_ops;
switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_37:
+ ops->write = r8402_csi_write;
+ ops->read = r8402_csi_read;
+ break;
+
default:
ops->write = r8169_csi_write;
ops->read = r8169_csi_read;
@@ -4835,6 +4918,36 @@ static void rtl_hw_start_8105e_2(struct rtl8169_private *tp)
rtl_ephy_write(ioaddr, 0x1e, rtl_ephy_read(ioaddr, 0x1e) | 0x8000);
}
+static void rtl_hw_start_8402(struct rtl8169_private *tp)
+{
+ void __iomem *ioaddr = tp->mmio_addr;
+ static const struct ephy_info e_info_8402[] = {
+ { 0x19, 0xffff, 0xff64 },
+ { 0x1e, 0, 0x4000 }
+ };
+
+ rtl_csi_access_enable_2(tp);
+
+ /* Force LAN exit from ASPM if Rx/Tx are not idle */
+ RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);
+
+ RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
+ RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
+
+ rtl_ephy_init(ioaddr, e_info_8402, ARRAY_SIZE(e_info_8402));
+
+ rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+ rtl_eri_write(ioaddr, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);
+ rtl_eri_write(ioaddr, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);
+ rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
+ rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
+ rtl_eri_write(ioaddr, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
+ rtl_eri_write(ioaddr, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
+ rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00,
+ ERIAR_EXGMAC);
+}
+
static void rtl_hw_start_8101(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
@@ -4875,6 +4988,10 @@ static void rtl_hw_start_8101(struct net_device *dev)
case RTL_GIGA_MAC_VER_30:
rtl_hw_start_8105e_2(tp);
break;
+
+ case RTL_GIGA_MAC_VER_37:
+ rtl_hw_start_8402(tp);
+ break;
}
RTL_W8(Cfg9346, Cfg9346_Lock);
--
1.7.7.6
^ permalink raw reply related
* [patch] mISDN: array underflow in open_bchannel()
From: Dan Carpenter @ 2012-03-27 7:20 UTC (permalink / raw)
To: Karsten Keil; +Cc: David S. Miller, Alexey Dobriyan, netdev, kernel-janitors
There are two channels here. User space starts counting channels at one
but in the kernel we start at zero. If the user passes in a zero
channel that's invalid and could lead to memory corruption.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
diff --git a/drivers/isdn/hardware/mISDN/hfcpci.c b/drivers/isdn/hardware/mISDN/hfcpci.c
index d055ae7..e2c83a2 100644
--- a/drivers/isdn/hardware/mISDN/hfcpci.c
+++ b/drivers/isdn/hardware/mISDN/hfcpci.c
@@ -1962,7 +1962,7 @@ open_bchannel(struct hfc_pci *hc, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/w6692.c b/drivers/isdn/hardware/mISDN/w6692.c
index 7f1e7ba..2183357 100644
--- a/drivers/isdn/hardware/mISDN/w6692.c
+++ b/drivers/isdn/hardware/mISDN/w6692.c
@@ -1015,7 +1015,7 @@ open_bchannel(struct w6692_hw *card, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/mISDNisar.c b/drivers/isdn/hardware/mISDN/mISDNisar.c
index 10446ab..9a6da6e 100644
--- a/drivers/isdn/hardware/mISDN/mISDNisar.c
+++ b/drivers/isdn/hardware/mISDN/mISDNisar.c
@@ -1670,7 +1670,7 @@ isar_open(struct isar_hw *isar, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/netjet.c b/drivers/isdn/hardware/mISDN/netjet.c
index dd6de9f..c726e09 100644
--- a/drivers/isdn/hardware/mISDN/netjet.c
+++ b/drivers/isdn/hardware/mISDN/netjet.c
@@ -860,7 +860,7 @@ open_bchannel(struct tiger_hw *card, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/avmfritz.c b/drivers/isdn/hardware/mISDN/avmfritz.c
index 05ed4d0c..c0b8c96 100644
--- a/drivers/isdn/hardware/mISDN/avmfritz.c
+++ b/drivers/isdn/hardware/mISDN/avmfritz.c
@@ -891,7 +891,7 @@ open_bchannel(struct fritzcard *fc, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/hfcsusb.c b/drivers/isdn/hardware/mISDN/hfcsusb.c
index 6023387..8cde2a0 100644
--- a/drivers/isdn/hardware/mISDN/hfcsusb.c
+++ b/drivers/isdn/hardware/mISDN/hfcsusb.c
@@ -486,7 +486,7 @@ open_bchannel(struct hfcsusb *hw, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
diff --git a/drivers/isdn/hardware/mISDN/mISDNipac.c b/drivers/isdn/hardware/mISDN/mISDNipac.c
index b47e9be..884369f 100644
--- a/drivers/isdn/hardware/mISDN/mISDNipac.c
+++ b/drivers/isdn/hardware/mISDN/mISDNipac.c
@@ -1506,7 +1506,7 @@ open_bchannel(struct ipac_hw *ipac, struct channel_req *rq)
{
struct bchannel *bch;
- if (rq->adr.channel > 2)
+ if (rq->adr.channel == 0 || rq->adr.channel > 2)
return -EINVAL;
if (rq->protocol == ISDN_P_NONE)
return -EINVAL;
^ permalink raw reply related
* [PATCH net] bnx2x: fix vector traveling while looking for an empty entry
From: Dmitry Kravkov @ 2012-03-27 7:08 UTC (permalink / raw)
To: davem, netdev, eilong, zenczykowski; +Cc: Dmitry Kravkov
Fixes the bug that may prevent from mac to be configured,
while there is an empty slot for it.
Reported-by: Maciej Żenczykowski <zenczykowski@gmail.com>
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
index 3f52fad..5135733 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c
@@ -3847,7 +3847,7 @@ static bool bnx2x_credit_pool_get_entry(
continue;
/* If we've got here we are going to find a free entry */
- for (idx = vec * BNX2X_POOL_VEC_SIZE, i = 0;
+ for (idx = vec * BIT_VEC64_ELEM_SZ, i = 0;
i < BIT_VEC64_ELEM_SZ; idx++, i++)
if (BIT_VEC64_TEST_BIT(o->pool_mirror, idx)) {
--
1.7.7.2
^ permalink raw reply related
* Re: bnx2x - bnx2x_credit_pool_get_entry bug?
From: Dmitry Kravkov @ 2012-03-27 6:58 UTC (permalink / raw)
To: Maciej Żenczykowski; +Cc: Linux NetDev, Maciej Żenczykowski
In-Reply-To: <CAHo-OozR_OginBaH3yhwgdQBwxpcqfjakpBC-pOCQO8Bp2vM4g@mail.gmail.com>
On Mon, 2012-03-26 at 22:14 -0700, Maciej Żenczykowski wrote:
> looks to me like idx = vec * BNX2X_POOL_VEC_SIZE should actually be
> idx = vec * BIT_VEC64_ELEM_SZ
>
This is correct! Thank you, Maciej. The patch is coming ...
^ permalink raw reply
* Good Morning
From: Happiness Benson @ 2012-03-27 6:53 UTC (permalink / raw)
Hello Dear
My name is Happiness Benson (female),i saw your contact today in a browse google info ,so i decided to contact you.I would like to be your good friend.I will like to know more about you,i will learn a lot from you when i receive your yes answer,i will send you my picture for you to see me and tell you more about myself.
yours new friend,
Happiness Benson
^ permalink raw reply
* [net PATCH] bnx2x: previous driver unload revised
From: Yuval Mintz @ 2012-03-27 6:47 UTC (permalink / raw)
To: davem, netdev; +Cc: dmitry, Yuval Mintz, Eilon Greenstein
The flow in which the bnx2x driver starts after a previous driver
has been terminated in an 'unclean' manner has several bugs and
FW risks, which makes it possible for the driver to fail after
boot-from-SAN or kdump.
This patch contains a revised flow which performs a safer
initialization, solving the possible crash scenarios.
Notice this patch contains lines with over 80 characters, as it
keeps print-strings in a single line.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
---
Hi Dave,
please consider applying this patch to 'net'.
Thanks,
Yuval
---
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 7 +
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 40 ++-
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 3 +
drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h | 3 +
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 1 -
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h | 2 +
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 464 +++++++++++++++++-----
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | 4 +
8 files changed, 417 insertions(+), 107 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index e37161f..2c9ee55 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1173,6 +1173,13 @@ enum {
};
+struct bnx2x_prev_path_list {
+ u8 bus;
+ u8 slot;
+ u8 path;
+ struct list_head list;
+};
+
struct bnx2x {
/* Fields used in the tx and intr/napi performance paths
* are grouped together in the beginning of the structure
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index f1f3ca6..b74700a 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -1721,6 +1721,29 @@ static void bnx2x_squeeze_objects(struct bnx2x *bp)
} while (0)
#endif
+bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err)
+{
+ /* build FW version dword */
+ u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
+ (BCM_5710_FW_MINOR_VERSION << 8) +
+ (BCM_5710_FW_REVISION_VERSION << 16) +
+ (BCM_5710_FW_ENGINEERING_VERSION << 24);
+
+ /* read loaded FW from chip */
+ u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
+
+ DP(NETIF_MSG_IFUP, "loaded fw %x, my fw %x\n", loaded_fw, my_fw);
+
+ if (loaded_fw != my_fw) {
+ if (is_err)
+ BNX2X_ERR("bnx2x with FW %x was already loaded, which mismatches my %x FW. aborting\n",
+ loaded_fw, my_fw);
+ return false;
+ }
+
+ return true;
+}
+
/* must be called with rtnl_lock */
int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
{
@@ -1815,23 +1838,8 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
}
if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
- /* build FW version dword */
- u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
- (BCM_5710_FW_MINOR_VERSION << 8) +
- (BCM_5710_FW_REVISION_VERSION << 16) +
- (BCM_5710_FW_ENGINEERING_VERSION << 24);
-
- /* read loaded FW from chip */
- u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
-
- DP(BNX2X_MSG_SP, "loaded fw %x, my fw %x",
- loaded_fw, my_fw);
-
/* abort nic load if version mismatch */
- if (my_fw != loaded_fw) {
- BNX2X_ERR("bnx2x with FW %x already loaded, "
- "which mismatches my %x FW. aborting",
- loaded_fw, my_fw);
+ if (!bnx2x_test_firmware_version(bp, true)) {
rc = -EBUSY;
LOAD_ERROR_EXIT(bp, load_error2);
}
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
index 8b16338..5c27454 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
@@ -431,6 +431,9 @@ void bnx2x_panic_dump(struct bnx2x *bp);
void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl);
+/* validate currect fw is loaded */
+bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err);
+
/* dev_close main block */
int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
index 5d71b7d..dbff591 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
@@ -1251,6 +1251,9 @@ struct drv_func_mb {
#define DRV_MSG_CODE_LINK_STATUS_CHANGED 0x01000000
+ #define DRV_MSG_CODE_INITIATE_FLR 0x02000000
+ #define REQ_BC_VER_4_INITIATE_FLR 0x00070213
+
#define BIOS_MSG_CODE_LIC_CHALLENGE 0xff010000
#define BIOS_MSG_CODE_LIC_RESPONSE 0xff020000
#define BIOS_MSG_CODE_VIRT_MAC_PRIM 0xff030000
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index beb4cdb..efa557b 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -35,7 +35,6 @@
#define ETH_MAX_PACKET_SIZE 1500
#define ETH_MAX_JUMBO_PACKET_SIZE 9600
#define MDIO_ACCESS_TIMEOUT 1000
-#define BMAC_CONTROL_RX_ENABLE 2
#define WC_LANE_MAX 4
#define I2C_SWITCH_WIDTH 2
#define I2C_BSC0 0
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
index 7ba557a..763535e 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h
@@ -89,6 +89,8 @@
#define PFC_BRB_FULL_LB_XON_THRESHOLD 250
#define MAXVAL(a, b) (((a) > (b)) ? (a) : (b))
+
+#define BMAC_CONTROL_RX_ENABLE 2
/***********************************************************/
/* Structs */
/***********************************************************/
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index f7f9aa8..7e88f32 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -52,6 +52,7 @@
#include <linux/prefetch.h>
#include <linux/zlib.h>
#include <linux/io.h>
+#include <linux/semaphore.h>
#include <linux/stringify.h>
#include <linux/vmalloc.h>
@@ -211,6 +212,10 @@ static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {
MODULE_DEVICE_TABLE(pci, bnx2x_pci_tbl);
+/* Global resources for unloading a previously loaded device */
+#define BNX2X_PREV_WAIT_NEEDED 1
+static DEFINE_SEMAPHORE(bnx2x_prev_sem);
+static LIST_HEAD(bnx2x_prev_list);
/****************************************************************************
* General service functions
****************************************************************************/
@@ -8812,109 +8817,371 @@ static inline void bnx2x_undi_int_disable(struct bnx2x *bp)
bnx2x_undi_int_disable_e1h(bp);
}
-static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
+static void __devinit bnx2x_prev_unload_close_mac(struct bnx2x *bp)
{
- u32 val;
+ u32 val, base_addr, offset, mask, reset_reg;
+ bool mac_stopped = false;
+ u8 port = BP_PORT(bp);
- /* possibly another driver is trying to reset the chip */
- bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET);
+ reset_reg = REG_RD(bp, MISC_REG_RESET_REG_2);
- /* check if doorbell queue is reset */
- if (REG_RD(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET)
- & MISC_REGISTERS_RESET_REG_1_RST_DORQ) {
+ if (!CHIP_IS_E3(bp)) {
+ val = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port * 4);
+ mask = MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port;
+ if ((mask & reset_reg) && val) {
+ u32 wb_data[2];
+ BNX2X_DEV_INFO("Disable bmac Rx\n");
+ base_addr = BP_PORT(bp) ? NIG_REG_INGRESS_BMAC1_MEM
+ : NIG_REG_INGRESS_BMAC0_MEM;
+ offset = CHIP_IS_E2(bp) ? BIGMAC2_REGISTER_BMAC_CONTROL
+ : BIGMAC_REGISTER_BMAC_CONTROL;
- /*
- * Check if it is the UNDI driver
+ /*
+ * use rd/wr since we cannot use dmae. This is safe
+ * since MCP won't access the bus due to the request
+ * to unload, and no function on the path can be
+ * loaded at this time.
+ */
+ wb_data[0] = REG_RD(bp, base_addr + offset);
+ wb_data[1] = REG_RD(bp, base_addr + offset + 0x4);
+ wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE;
+ REG_WR(bp, base_addr + offset, wb_data[0]);
+ REG_WR(bp, base_addr + offset + 0x4, wb_data[1]);
+
+ }
+ BNX2X_DEV_INFO("Disable emac Rx\n");
+ REG_WR(bp, NIG_REG_NIG_EMAC0_EN + BP_PORT(bp)*4, 0);
+
+ mac_stopped = true;
+ } else {
+ if (reset_reg & MISC_REGISTERS_RESET_REG_2_XMAC) {
+ BNX2X_DEV_INFO("Disable xmac Rx\n");
+ base_addr = BP_PORT(bp) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;
+ val = REG_RD(bp, base_addr + XMAC_REG_PFC_CTRL_HI);
+ REG_WR(bp, base_addr + XMAC_REG_PFC_CTRL_HI,
+ val & ~(1 << 1));
+ REG_WR(bp, base_addr + XMAC_REG_PFC_CTRL_HI,
+ val | (1 << 1));
+ REG_WR(bp, base_addr + XMAC_REG_CTRL, 0);
+ mac_stopped = true;
+ }
+ mask = MISC_REGISTERS_RESET_REG_2_UMAC0 << port;
+ if (mask & reset_reg) {
+ BNX2X_DEV_INFO("Disable umac Rx\n");
+ base_addr = BP_PORT(bp) ? GRCBASE_UMAC1 : GRCBASE_UMAC0;
+ REG_WR(bp, base_addr + UMAC_REG_COMMAND_CONFIG, 0);
+ mac_stopped = true;
+ }
+ }
+
+ if (mac_stopped)
+ msleep(20);
+
+}
+
+#define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4))
+#define BNX2X_PREV_UNDI_RCQ(val) ((val) & 0xffff)
+#define BNX2X_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff)
+#define BNX2X_PREV_UNDI_PROD(rcq, bd) ((bd) << 16 | (rcq))
+
+static void __devinit bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 port,
+ u8 inc)
+{
+ u16 rcq, bd;
+ u32 tmp_reg = REG_RD(bp, BNX2X_PREV_UNDI_PROD_ADDR(port));
+
+ rcq = BNX2X_PREV_UNDI_RCQ(tmp_reg) + inc;
+ bd = BNX2X_PREV_UNDI_BD(tmp_reg) + inc;
+
+ tmp_reg = BNX2X_PREV_UNDI_PROD(rcq, bd);
+ REG_WR(bp, BNX2X_PREV_UNDI_PROD_ADDR(port), tmp_reg);
+
+ BNX2X_DEV_INFO("UNDI producer [%d] rings bd -> 0x%04x, rcq -> 0x%04x\n",
+ port, bd, rcq);
+}
+
+static int __devinit bnx2x_prev_mcp_done(struct bnx2x *bp)
+{
+ u32 rc = bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
+ if (!rc) {
+ BNX2X_ERR("MCP response failure, aborting\n");
+ return -EBUSY;
+ }
+
+ return 0;
+}
+
+static bool __devinit bnx2x_prev_is_path_marked(struct bnx2x *bp)
+{
+ struct bnx2x_prev_path_list *tmp_list;
+ int rc = false;
+
+ if (down_trylock(&bnx2x_prev_sem))
+ return false;
+
+ list_for_each_entry(tmp_list, &bnx2x_prev_list, list) {
+ if (PCI_SLOT(bp->pdev->devfn) == tmp_list->slot &&
+ bp->pdev->bus->number == tmp_list->bus &&
+ BP_PATH(bp) == tmp_list->path) {
+ rc = true;
+ BNX2X_DEV_INFO("Path %d was already cleaned from previous drivers\n",
+ BP_PATH(bp));
+ break;
+ }
+ }
+
+ up(&bnx2x_prev_sem);
+
+ return rc;
+}
+
+static int __devinit bnx2x_prev_mark_path(struct bnx2x *bp)
+{
+ struct bnx2x_prev_path_list *tmp_list;
+ int rc;
+
+ tmp_list = (struct bnx2x_prev_path_list *)
+ kmalloc(sizeof(struct bnx2x_prev_path_list), GFP_KERNEL);
+ if (!tmp_list) {
+ BNX2X_ERR("Failed to allocate 'bnx2x_prev_path_list'\n");
+ return -ENOMEM;
+ }
+
+ tmp_list->bus = bp->pdev->bus->number;
+ tmp_list->slot = PCI_SLOT(bp->pdev->devfn);
+ tmp_list->path = BP_PATH(bp);
+
+ rc = down_interruptible(&bnx2x_prev_sem);
+ if (rc) {
+ BNX2X_ERR("Received %d when tried to take lock\n", rc);
+ kfree(tmp_list);
+ } else {
+ BNX2X_DEV_INFO("Marked path [%d] - finished previous unload\n",
+ BP_PATH(bp));
+ list_add(&tmp_list->list, &bnx2x_prev_list);
+ up(&bnx2x_prev_sem);
+ }
+
+ return rc;
+}
+
+static bool __devinit bnx2x_can_flr(struct bnx2x *bp)
+{
+ int pos;
+ u32 cap;
+ struct pci_dev *dev = bp->pdev;
+
+ pos = pci_pcie_cap(dev);
+ if (!pos)
+ return false;
+
+ pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &cap);
+ if (!(cap & PCI_EXP_DEVCAP_FLR))
+ return false;
+
+ return true;
+}
+
+static int __devinit bnx2x_do_flr(struct bnx2x *bp)
+{
+ int i, pos;
+ u16 status;
+ struct pci_dev *dev = bp->pdev;
+
+ /* probe the capability first */
+ if (bnx2x_can_flr(bp))
+ return -ENOTTY;
+
+ pos = pci_pcie_cap(dev);
+ if (!pos)
+ return -ENOTTY;
+
+ /* Wait for Transaction Pending bit clean */
+ for (i = 0; i < 4; i++) {
+ if (i)
+ msleep((1 << (i - 1)) * 100);
+
+ pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
+ if (!(status & PCI_EXP_DEVSTA_TRPND))
+ goto clear;
+ }
+
+ dev_err(&dev->dev,
+ "transaction is not cleared; proceeding with reset anyway\n");
+
+clear:
+ if (bp->common.bc_ver < REQ_BC_VER_4_INITIATE_FLR) {
+ BNX2X_ERR("FLR not supported by BC_VER: 0x%x\n",
+ bp->common.bc_ver);
+ return -EINVAL;
+ }
+
+ bnx2x_fw_command(bp, DRV_MSG_CODE_INITIATE_FLR, 0);
+
+ return 0;
+}
+
+static int __devinit bnx2x_prev_unload_uncommon(struct bnx2x *bp)
+{
+ int rc;
+
+ BNX2X_DEV_INFO("Uncommon unload Flow\n");
+
+ /* Test if previous unload process was already finished for this path */
+ if (bnx2x_prev_is_path_marked(bp))
+ return bnx2x_prev_mcp_done(bp);
+
+ /* If function has FLR capabilities, and existing FW version matches
+ * the one required, then FLR will be sufficient to clean any residue
+ * left by previous driver
+ */
+ if (bnx2x_test_firmware_version(bp, false) && bnx2x_can_flr(bp))
+ return bnx2x_do_flr(bp);
+
+ /* Close the MCP request, return failure*/
+ rc = bnx2x_prev_mcp_done(bp);
+ if (!rc)
+ rc = BNX2X_PREV_WAIT_NEEDED;
+
+ return rc;
+}
+
+static int __devinit bnx2x_prev_unload_common(struct bnx2x *bp)
+{
+ u32 reset_reg, tmp_reg = 0, rc;
+ /* It is possible a previous function received 'common' answer,
+ * but hasn't loaded yet, therefore creating a scenario of
+ * multiple functions receiving 'common' on the same path.
+ */
+ BNX2X_DEV_INFO("Common unload Flow\n");
+
+ if (bnx2x_prev_is_path_marked(bp))
+ return bnx2x_prev_mcp_done(bp);
+
+ reset_reg = REG_RD(bp, MISC_REG_RESET_REG_1);
+
+ /* Reset should be performed after BRB is emptied */
+ if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) {
+ u32 timer_count = 1000;
+ bool prev_undi = false;
+
+ /* Close the MAC Rx to prevent BRB from filling up */
+ bnx2x_prev_unload_close_mac(bp);
+
+ /* Check if the UNDI driver was previously loaded
* UNDI driver initializes CID offset for normal bell to 0x7
*/
- val = REG_RD(bp, DORQ_REG_NORM_CID_OFST);
- if (val == 0x7) {
- u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
- /* save our pf_num */
- int orig_pf_num = bp->pf_num;
- int port;
- u32 swap_en, swap_val, value;
-
- /* clear the UNDI indication */
- REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0);
-
- BNX2X_DEV_INFO("UNDI is active! reset device\n");
-
- /* try unload UNDI on port 0 */
- bp->pf_num = 0;
- bp->fw_seq =
- (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) &
- DRV_MSG_SEQ_NUMBER_MASK);
- reset_code = bnx2x_fw_command(bp, reset_code, 0);
-
- /* if UNDI is loaded on the other port */
- if (reset_code != FW_MSG_CODE_DRV_UNLOAD_COMMON) {
-
- /* send "DONE" for previous unload */
- bnx2x_fw_command(bp,
- DRV_MSG_CODE_UNLOAD_DONE, 0);
-
- /* unload UNDI on port 1 */
- bp->pf_num = 1;
- bp->fw_seq =
- (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) &
- DRV_MSG_SEQ_NUMBER_MASK);
- reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS;
-
- bnx2x_fw_command(bp, reset_code, 0);
+ reset_reg = REG_RD(bp, MISC_REG_RESET_REG_1);
+ if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_DORQ) {
+ tmp_reg = REG_RD(bp, DORQ_REG_NORM_CID_OFST);
+ if (tmp_reg == 0x7) {
+ BNX2X_DEV_INFO("UNDI previously loaded\n");
+ prev_undi = true;
+ /* clear the UNDI indication */
+ REG_WR(bp, DORQ_REG_NORM_CID_OFST, 0);
}
+ }
+ /* wait until BRB is empty */
+ tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS);
+ while (timer_count) {
+ u32 prev_brb = tmp_reg;
- bnx2x_undi_int_disable(bp);
- port = BP_PORT(bp);
-
- /* close input traffic and wait for it */
- /* Do not rcv packets to BRB */
- REG_WR(bp, (port ? NIG_REG_LLH1_BRB1_DRV_MASK :
- NIG_REG_LLH0_BRB1_DRV_MASK), 0x0);
- /* Do not direct rcv packets that are not for MCP to
- * the BRB */
- REG_WR(bp, (port ? NIG_REG_LLH1_BRB1_NOT_MCP :
- NIG_REG_LLH0_BRB1_NOT_MCP), 0x0);
- /* clear AEU */
- REG_WR(bp, (port ? MISC_REG_AEU_MASK_ATTN_FUNC_1 :
- MISC_REG_AEU_MASK_ATTN_FUNC_0), 0);
- msleep(10);
-
- /* save NIG port swap info */
- swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
- swap_en = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
- /* reset device */
- REG_WR(bp,
- GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR,
- 0xd3ffffff);
-
- value = 0x1400;
- if (CHIP_IS_E3(bp)) {
- value |= MISC_REGISTERS_RESET_REG_2_MSTAT0;
- value |= MISC_REGISTERS_RESET_REG_2_MSTAT1;
- }
+ tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS);
+ if (!tmp_reg)
+ break;
- REG_WR(bp,
- GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
- value);
+ BNX2X_DEV_INFO("BRB still has 0x%08x\n", tmp_reg);
- /* take the NIG out of reset and restore swap values */
- REG_WR(bp,
- GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET,
- MISC_REGISTERS_RESET_REG_1_RST_NIG);
- REG_WR(bp, NIG_REG_PORT_SWAP, swap_val);
- REG_WR(bp, NIG_REG_STRAP_OVERRIDE, swap_en);
+ /* reset timer as long as BRB actually gets emptied */
+ if (prev_brb > tmp_reg)
+ timer_count = 1000;
+ else
+ timer_count--;
- /* send unload done to the MCP */
- bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
+ /* If UNDI resides in memory, manually increment it */
+ if (prev_undi)
+ bnx2x_prev_unload_undi_inc(bp, BP_PORT(bp), 1);
- /* restore our func and fw_seq */
- bp->pf_num = orig_pf_num;
+ udelay(10);
}
+
+ if (!timer_count)
+ BNX2X_ERR("Failed to empty BRB, hope for the best\n");
+
}
- /* now it's safe to release the lock */
- bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET);
+ /* No packets are in the pipeline, path is ready for reset */
+ bnx2x_reset_common(bp);
+
+ rc = bnx2x_prev_mark_path(bp);
+ if (rc) {
+ bnx2x_prev_mcp_done(bp);
+ return rc;
+ }
+
+ return bnx2x_prev_mcp_done(bp);
+}
+
+static int __devinit bnx2x_prev_unload(struct bnx2x *bp)
+{
+ int time_counter = 10;
+ u32 rc, fw, hw_lock_reg, hw_lock_val;
+ BNX2X_DEV_INFO("Entering Previous Unload Flow\n");
+
+ /* Release previously held locks */
+ hw_lock_reg = (BP_FUNC(bp) <= 5) ?
+ (MISC_REG_DRIVER_CONTROL_1 + BP_FUNC(bp) * 8) :
+ (MISC_REG_DRIVER_CONTROL_7 + (BP_FUNC(bp) - 6) * 8);
+
+ hw_lock_val = (REG_RD(bp, hw_lock_reg));
+ if (hw_lock_val) {
+ if (hw_lock_val & HW_LOCK_RESOURCE_NVRAM) {
+ BNX2X_DEV_INFO("Release Previously held NVRAM lock\n");
+ REG_WR(bp, MCP_REG_MCPR_NVM_SW_ARB,
+ (MCPR_NVM_SW_ARB_ARB_REQ_CLR1 << BP_PORT(bp)));
+ }
+
+ BNX2X_DEV_INFO("Release Previously held hw lock\n");
+ REG_WR(bp, hw_lock_reg, 0xffffffff);
+ } else
+ BNX2X_DEV_INFO("No need to release hw/nvram locks\n");
+
+ if (MCPR_ACCESS_LOCK_LOCK & REG_RD(bp, MCP_REG_MCPR_ACCESS_LOCK)) {
+ BNX2X_DEV_INFO("Release previously held alr\n");
+ REG_WR(bp, MCP_REG_MCPR_ACCESS_LOCK, 0);
+ }
+
+
+ do {
+ /* Lock MCP using an unload request */
+ fw = bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS, 0);
+ if (!fw) {
+ BNX2X_ERR("MCP response failure, aborting\n");
+ rc = -EBUSY;
+ break;
+ }
+
+ if (fw == FW_MSG_CODE_DRV_UNLOAD_COMMON) {
+ rc = bnx2x_prev_unload_common(bp);
+ break;
+ }
+
+ /* non-common reply from MCP night require looping */
+ rc = bnx2x_prev_unload_uncommon(bp);
+ if (rc != BNX2X_PREV_WAIT_NEEDED)
+ break;
+
+ msleep(20);
+ } while (--time_counter);
+
+ if (!time_counter || rc) {
+ BNX2X_ERR("Failed unloading previous driver, aborting\n");
+ rc = -EBUSY;
+ }
+
+ BNX2X_DEV_INFO("Finished Previous Unload Flow [%d]\n", rc);
+
+ return rc;
}
static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)
@@ -10100,8 +10367,16 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
func = BP_FUNC(bp);
/* need to reset chip if undi was active */
- if (!BP_NOMCP(bp))
- bnx2x_undi_unload(bp);
+ if (!BP_NOMCP(bp)) {
+ /* init fw_seq */
+ bp->fw_seq =
+ SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
+ DRV_MSG_SEQ_NUMBER_MASK;
+ BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
+
+ bnx2x_prev_unload(bp);
+ }
+
if (CHIP_REV_IS_FPGA(bp))
dev_err(&bp->pdev->dev, "FPGA detected\n");
@@ -11431,9 +11706,18 @@ static int __init bnx2x_init(void)
static void __exit bnx2x_cleanup(void)
{
+ struct list_head *pos, *q;
pci_unregister_driver(&bnx2x_pci_driver);
destroy_workqueue(bnx2x_wq);
+
+ /* Free globablly allocated resources */
+ list_for_each_safe(pos, q, &bnx2x_prev_list) {
+ struct bnx2x_prev_path_list *tmp =
+ list_entry(pos, struct bnx2x_prev_path_list, list);
+ list_del(pos);
+ kfree(tmp);
+ }
}
void bnx2x_notify_link_changed(struct bnx2x *bp)
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
index fd7fb45..ab0a250 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
@@ -987,6 +987,7 @@
* clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero. */
#define IGU_REG_WRITE_DONE_PENDING 0x130480
#define MCP_A_REG_MCPR_SCRATCH 0x3a0000
+#define MCP_REG_MCPR_ACCESS_LOCK 0x8009c
#define MCP_REG_MCPR_CPU_PROGRAM_COUNTER 0x8501c
#define MCP_REG_MCPR_GP_INPUTS 0x800c0
#define MCP_REG_MCPR_GP_OENABLE 0x800c8
@@ -1686,6 +1687,7 @@
[10] rst_dbg; [11] rst_misc_core; [12] rst_dbue (UART); [13]
Pci_resetmdio_n; [14] rst_emac0_hard_core; [15] rst_emac1_hard_core; 16]
rst_pxp_rq_rd_wr; 31:17] reserved */
+#define MISC_REG_RESET_REG_1 0xa580
#define MISC_REG_RESET_REG_2 0xa590
/* [RW 20] 20 bit GRC address where the scratch-pad of the MCP that is
shared with the driver resides */
@@ -5606,6 +5608,7 @@
/* [RC 32] Parity register #0 read clear */
#define XSEM_REG_XSEM_PRTY_STS_CLR_0 0x280128
#define XSEM_REG_XSEM_PRTY_STS_CLR_1 0x280138
+#define MCPR_ACCESS_LOCK_LOCK (1L<<31)
#define MCPR_NVM_ACCESS_ENABLE_EN (1L<<0)
#define MCPR_NVM_ACCESS_ENABLE_WR_EN (1L<<1)
#define MCPR_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0)
@@ -5732,6 +5735,7 @@
#define MISC_REGISTERS_GPIO_PORT_SHIFT 4
#define MISC_REGISTERS_GPIO_SET_POS 8
#define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588
+#define MISC_REGISTERS_RESET_REG_1_RST_BRB1 (0x1<<0)
#define MISC_REGISTERS_RESET_REG_1_RST_DORQ (0x1<<19)
#define MISC_REGISTERS_RESET_REG_1_RST_HC (0x1<<29)
#define MISC_REGISTERS_RESET_REG_1_RST_NIG (0x1<<7)
--
1.7.9.rc2
^ permalink raw reply related
* Re: RCU lock bug in 3.0.21 (bisected to: 682cb56a, fix NULL dereferences in check_peer_redir)
From: Ben Greear @ 2012-03-27 5:30 UTC (permalink / raw)
To: paulmck; +Cc: Eric Dumazet, David Miller, netdev, gregkh
In-Reply-To: <20120327051120.GM2450@linux.vnet.ibm.com>
On 03/26/2012 10:11 PM, Paul E. McKenney wrote:
> On Tue, Mar 27, 2012 at 02:07:14AM +0200, Eric Dumazet wrote:
>> On Mon, 2012-03-26 at 16:46 -0700, Ben Greear wrote:
>>
>>> The 3.0.21 kernel doesn't appear to have a rcu_read_lock_return(),
>>> so I can't use your patch below.
>>
>> This patch was only to show the point (I also CCed Paul, he might have
>> some time to think about it, after he clears the inline stuff with
>> Linus)
>
> There is an rcu_preempt_depth() that returns rcu_read_lock() nesting
> level for CONFIG_PREEMPT_RCU=y on the one hand and returns zero
> for CONFIG_PREEMPT_RCU=n on the other. So if you can reproduce
> with CONFIG_PREEMPT_RCU=y, you can substitute rcu_preempt_depth()
> rcu_read_lock_return() in Eric's earlier patch.
I'll try looking at that tomorrow. I tried adding some code to check for
recursive calls to the fib-dump, and didn't see it ever hit, though
the bug continued to happen readily.
I just #if 0 the part between rcu-read-lock and read-unlock, and
the problem went away..but of course you can't dump ipv6
routes then...
The actual logic to dump the fib is quite complex, full of
opaque types and other stuff ripe for bugs. But, I don't see
how it could cause the rcu splats in such a repeatable manner.
The bug is always reported as being in the same place, so if
there is any other debugging code you can think of to help
shed light on this, I'll be happy to add it and give it a try.
For instance, is there a way to dump (print) all current holders of
the rcu_read_lock? I could call that before/during/after in that
method and maybe get a clue.
Thanks,
Ben
>
> Thanx, Paul
>
>> As I said, I was referreing to you adding stuff in rcu. ;)
>>
>> Unfortunately I wont have time in the near future to do so myself.
>>
>>
>>
--
Ben Greear <greearb@candelatech.com>
Candela Technologies Inc http://www.candelatech.com
^ permalink raw reply
* bnx2x - bnx2x_credit_pool_get_entry bug?
From: Maciej Żenczykowski @ 2012-03-27 5:14 UTC (permalink / raw)
To: Linux NetDev, Vlad Zolotarov; +Cc: Maciej Żenczykowski
drivers/net/bnx2x/bnx2x_sp.c:3850 contains in bnx2x_credit_pool_get_entry():
last modified in commit: 619c5cb6885b9 Vlad Zolotarov 2011-06-14
14:33:44 +0300
static bool bnx2x_credit_pool_get_entry(
struct bnx2x_credit_pool_obj *o,
int *offset)
{
int idx, vec, i;
*offset = -1;
/* Find "internal cam-offset" then add to base for this object... */
for (vec = 0; vec < BNX2X_POOL_VEC_SIZE; vec++) {
/* Skip the current vector if there are no free entries in it */
if (!o->pool_mirror[vec])
continue;
/* If we've got here we are going to find a free entry */
for (idx = vec * BNX2X_POOL_VEC_SIZE, i = 0;
i < BIT_VEC64_ELEM_SZ; idx++, i++)
if (BIT_VEC64_TEST_BIT(o->pool_mirror, idx)) {
/* Got one!! */
BIT_VEC64_CLEAR_BIT(o->pool_mirror, idx);
*offset = o->base_pool_offset + idx;
return true;
}
}
return false;
}
drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h:301:#define
MAX_MAC_CREDIT_E2 272 /* Per Path */
drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h:640:#define
BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h:385:#define
BIT_VEC64_ELEM_SZ 64
looks to me like idx = vec * BNX2X_POOL_VEC_SIZE should actually be
idx = vec * BIT_VEC64_ELEM_SZ
Found this while trying to debug an E1 multicast problem in an older
bnx2x driver and looking upstream for inspiration.
- Maciej
^ permalink raw reply
* Re: RCU lock bug in 3.0.21 (bisected to: 682cb56a, fix NULL dereferences in check_peer_redir)
From: Paul E. McKenney @ 2012-03-27 5:11 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Ben Greear, David Miller, netdev, gregkh
In-Reply-To: <1332806834.3547.16.camel@edumazet-glaptop>
On Tue, Mar 27, 2012 at 02:07:14AM +0200, Eric Dumazet wrote:
> On Mon, 2012-03-26 at 16:46 -0700, Ben Greear wrote:
>
> > The 3.0.21 kernel doesn't appear to have a rcu_read_lock_return(),
> > so I can't use your patch below.
>
> This patch was only to show the point (I also CCed Paul, he might have
> some time to think about it, after he clears the inline stuff with
> Linus)
There is an rcu_preempt_depth() that returns rcu_read_lock() nesting
level for CONFIG_PREEMPT_RCU=y on the one hand and returns zero
for CONFIG_PREEMPT_RCU=n on the other. So if you can reproduce
with CONFIG_PREEMPT_RCU=y, you can substitute rcu_preempt_depth()
rcu_read_lock_return() in Eric's earlier patch.
Thanx, Paul
> As I said, I was referreing to you adding stuff in rcu. ;)
>
> Unfortunately I wont have time in the near future to do so myself.
>
>
>
^ permalink raw reply
* Re: ath: DMA failed to stop in 10 ms AR_CR=0x00000024 AR_DIAG_SW=0x02000020 DMADBG_7=0x00008040
From: Sujith Manoharan @ 2012-03-27 2:17 UTC (permalink / raw)
To: Justin P. Mattock
Cc: Mohammed Shafi, Linux-wireless, Felix Fietkau,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Linux-netdev
In-Reply-To: <4F6FA388.9080408-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Justin P. Mattock wrote:
> I would have to say this patch above does get rid of this crash I was
> seeing. as a quick test I simply connect to a WPA network, then connect
> to an open network going back and forth triggers this freeze for me
> after applying this I am able to toggle back and forth without a freeze.
Thanks for verifying.
Sujith
--
To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH] net/vlan: withdraw VLAN ID attribute from GVRP on VLAN device stop
From: Ward, David - 0663 - MITLL @ 2012-03-27 1:35 UTC (permalink / raw)
To: David Miller; +Cc: jorge@dti2.net, netdev@vger.kernel.org
In-Reply-To: <20120326.174216.151181141269420661.davem@davemloft.net>
[-- Attachment #1: Type: text/plain, Size: 2194 bytes --]
On 03/26/2012 05:42 PM, David Miller wrote:
> From: "Ward, David - 0663 - MITLL"<david.ward@ll.mit.edu>
> Date: Mon, 26 Mar 2012 11:50:16 -0400
>
>> If I create an interface that is initially down, then bring it up, and
>> finally bring it back down, I think it should return to the state it
>> was in initially. So in my opinion, either the GVRP attribute should
>> exist while the interface is down, or it shouldn't.
> You're whole argument breaks down because we definitely don't do this
> for IPv4 addresses, we'll keep receiving traffic for IPv4 addresses
> configured on that interface when received on other interfaces which
> are still up, even when you bring that interface down.
... but that also seems to work if you never bring the interface up. I
can create a dummy interface, set an IP address on it, and immediately
receive traffic on that IP address from another interface, without ever
having brought the dummy interface up. (The behavior after setting the
interface down is the same as before the interface was ever brought up.)
Instead with GVRP, I create an interface and set the GVRP flag on it,
but GVRP does not declare the attribute for that VLAN until you bring
the VLAN interface up the first time. However it doesn't withdraw the
attribute when you bring the VLAN interface down, only when you delete it.
So to approach this differently -- would there be anything wrong with
GVRP declaring the attribute as soon as the GVRP flag is set, even if
the VLAN interface has not come up yet? The user might do this to
deliberately give the switching infrastructure a head start, so that
(for example) the IPv6 DAD packets that are sent as soon as the VLAN
interface comes up make it to all participants on the LAN...right now
you can't do that. You could still choose not to set the GVRP flag on
the interface until you bring it up, similar to what you were saying.
Then each attribute declaration event would have an opposite attribute
withdrawal event. This means if we tried to create an attribute that
already existed and wasn't in the "leaving" state, it would alert us to
a bug.
Thoughts?
David
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4558 bytes --]
^ permalink raw reply
* Wrong use of MAX_JIFFY_OFFSET?
From: Liu Yu @ 2012-03-27 1:25 UTC (permalink / raw)
To: netdev
Hi guys,
I saw a couple of places in current kernel have this kind of code:
> static inline unsigned int elapsed_jiffies_msecs(unsigned long start)
> {
> unsigned long end = jiffies;
>
> if (end >= start)
> return jiffies_to_msecs(end - start);
>
> return jiffies_to_msecs(end + (MAX_JIFFY_OFFSET - start) + 1);
> }
As you know, jiffies has a type of unsigned long, so if we know which is the
end and
which is the start, then (end - start) can simply figure out how much
jiffies flies,
without worry about the overflow.
Look at the code above, assume that there is just an overflow happening on
jiffies: end=0 and start=~0UL.
Since end < start, then the return value of the function is
jiffies_to_msecs(MAX_JIFFY_OFFSET+2).
But shouldn't the correct value be jiffies_to_msecs(1)?
could someone tell me that am I missing anything?
Thanks,
Yu
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox