* Re: [PATCH] r8169: don't use MSI-X on RTL8106e
From: Heiner Kallweit @ 2018-08-22 19:49 UTC (permalink / raw)
To: Thomas Gleixner
Cc: David Miller, helgaas, jian-hong, nic_swsd, netdev, linux-kernel,
linux, linux-pci, marc.zyngier, hch
In-Reply-To: <alpine.DEB.2.21.1808221222260.2514@nanos.tec.linutronix.de>
On 22.08.2018 13:44, Thomas Gleixner wrote:
> On Tue, 21 Aug 2018, Heiner Kallweit wrote:
>> On 21.08.2018 21:31, David Miller wrote:
>>> From: Heiner Kallweit <hkallweit1@gmail.com>
>>> Date: Mon, 20 Aug 2018 22:46:48 +0200
>>>
>>>> I'm in contact with Realtek and according to them few chip versions
>>>> seem to clear MSI-X table entries on resume from suspend. Checking
>>>> with them how this could be fixed / worked around.
>>>> Worst case we may have to disable MSI-X in general.
>>>
>>> I worry that if the chip does this, and somehow MSI-X is enabled and
>>> an interrupt is generated, the chip will write to the cleared out
>>> MSI-X address. This will either write garbage into memory or cause
>>> a bus error and require PCI error recovery.
>>>
>>> It also looks like your test patch doesn't fix things for people who
>>> have tested it.
>>>
>> The test patch was based on the first info from Realtek which made me
>> think that the base address of the MSI-X table is cleared, what
>> obviously is not the case.
>>
>> After some further tests it seems that the solution isn't as simple
>> as storing the MSI-X table entries on suspend and restore them on
>> resume. On my system (where MSI-X works fine) MSI-X table entries
>> on resume are partially different from the ones on suspend.
>
> Which is not a surprise. Please don't try to fiddle with that at the driver
> level. The irq and PCI core code are the ones in charge and if you'd
> restore at the wrong point then hell breaks lose.
>
Instead of spending a lot of effort on a workaround which may not be
acceptable, it may be better to fall back to MSI on all affected chip
versions. For two chip versions which were reported to have this issues
we're doing this already. I asked Realtek whether they have an overview
which chip versions are affected, let's see ..
The Realtek chips provide an alternative, register-based way to access
the MSI-X table, and their Windows driver seems to use it. See here:
https://patchwork.kernel.org/patch/4149171/
But as we handle all MSI-X basics in the PCI core, this isn't an option.
> Can you please do the following:
>
> 1) Store the PCI config space at suspend time
> 2) Compare the PCI config space at resume time and print the difference
>
> Do that on a working and a non-working version of Realtek NICs.
>
> Thanks,
>
> tglx
>
>
>
^ permalink raw reply
* Re: ixgbe hangs when XDP_TX is enabled
From: Jeff Kirsher @ 2018-08-22 16:22 UTC (permalink / raw)
To: Alexander Duyck, tehnerd; +Cc: Netdev, tytus.a.wasilewski, Tymoteusz Kielan
In-Reply-To: <CAKgT0Ud7qMrH+tZJTato9bP+RFq1ejuuyRPr4rNJJ0HsmkYz5w@mail.gmail.com>
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On Tue, 2018-08-21 at 11:13 -0700, Alexander Duyck wrote:
> On Tue, Aug 21, 2018 at 9:59 AM Nikita V. Shirokov <
> tehnerd@tehnerd.com> wrote:
> >
> > On Tue, Aug 21, 2018 at 08:58:15AM -0700, Alexander Duyck wrote:
> > > On Mon, Aug 20, 2018 at 12:32 PM Nikita V. Shirokov <
> > > tehnerd@tehnerd.com> wrote:
> > > >
> > > > we are getting such errors:
> > > >
> > > > [ 408.737313] ixgbe 0000:03:00.0 eth0: Detected Tx Unit Hang
> > > > (XDP)
> > > > Tx Queue <46>
> > > > TDH, TDT <0>, <2>
> > > > next_to_use <2>
> > > > next_to_clean <0>
> > > > tx_buffer_info[next_to_clean]
> > > > time_stamp <0>
> > > > jiffies <1000197c0>
> > > > [ 408.804438] ixgbe 0000:03:00.0 eth0: tx hang 1 detected on
> > > > queue 46, resetting adapter
> > > > [ 408.804440] ixgbe 0000:03:00.0 eth0: initiating reset due to
> > > > tx timeout
> > > > [ 408.817679] ixgbe 0000:03:00.0 eth0: Reset adapter
> > > > [ 408.866091] ixgbe 0000:03:00.0 eth0: TXDCTL.ENABLE for one
> > > > or more queues not cleared within the polling period
> > > > [ 409.345289] ixgbe 0000:03:00.0 eth0: detected SFP+: 3
> > > > [ 409.497232] ixgbe 0000:03:00.0 eth0: NIC Link is Up 10 Gbps,
> > > > Flow Control: RX/TX
> > > >
> > > > while running XDP prog on ixgbe nic.
> > > > right now i'm seing this on bpfnext kernel
> > > > (latest commit from Wed Aug 15 15:04:25 2018 -0700 ;
> > > > 9a76aba02a37718242d7cdc294f0a3901928aa57)
> > > >
> > > > looks like this is the same issue as reported by Brenden in
> > > > https://www.spinics.net/lists/netdev/msg439438.html
> > > >
> > > > --
> > > > Nikita V. Shirokov
> > >
> > > Could you provide some additional information about your setup.
> > > Specifically useful would be "ethtool -i", "ethtool -l", and
> > > lspci
> > > -vvv info for your device. The total number of CPUs on the system
> > > would be useful to know as well. In addition could you try
> > > reproducing
> >
> > sure:
> >
> > ethtool -l eth0
> > Channel parameters for eth0:
> > Pre-set maximums:
> > RX: 0
> > TX: 0
> > Other: 1
> > Combined: 63
> > Current hardware settings:
> > RX: 0
> > TX: 0
> > Other: 1
> > Combined: 48
> >
> > # ethtool -i eth0
> > driver: ixgbe
> > version: 5.1.0-k
> > firmware-version: 0x800006f1
> > expansion-rom-version:
> > bus-info: 0000:03:00.0
> > supports-statistics: yes
> > supports-test: yes
> > supports-eeprom-access: yes
> > supports-register-dump: yes
> > supports-priv-flags: yes
> >
> >
> > # nproc
> > 48
> >
> > lspci:
> >
> > 03:00.0 Ethernet controller: Intel Corporation 82599ES 10-Gigabit
> > SFI/SFP+ Network Connection (rev 01)
> > Subsystem: Intel Corporation Device 000d
> > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
> > VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
> > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast
> > >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> > Latency: 0, Cache Line Size: 32 bytes
> > Interrupt: pin A routed to IRQ 30
> > NUMA node: 0
> > Region 0: Memory at c7d00000 (64-bit, non-prefetchable)
> > [size=1M]
> > Region 2: I/O ports at 6000 [size=32]
> > Region 4: Memory at c7e80000 (64-bit, non-prefetchable)
> > [size=16K]
> > Expansion ROM at c7e00000 [disabled] [size=512K]
> > Capabilities: [40] Power Management version 3
> > Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA
> > PME(D0+,D1-,D2-,D3hot+,D3cold+)
> > Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1
> > PME-
> > Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
> > Address: 0000000000000000 Data: 0000
> > Masking: 00000000 Pending: 00000000
> > Capabilities: [70] MSI-X: Enable+ Count=64 Masked-
> > Vector table: BAR=4 offset=00000000
> > PBA: BAR=4 offset=00002000
> > Capabilities: [a0] Express (v2) Endpoint, MSI 00
> > DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency
> > L0s <512ns, L1 <64us
> > ExtTag- AttnBtn- AttnInd- PwrInd- RBE+
> > FLReset+ SlotPowerLimit 0.000W
> > DevCtl: Report errors: Correctable+ Non-Fatal+
> > Fatal+ Unsupported+
> > RlxdOrd- ExtTag- PhantFunc- AuxPwr-
> > NoSnoop+ FLReset-
> > MaxPayload 256 bytes, MaxReadReq 512 bytes
> > DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+
> > AuxPwr+ TransPend+
> > LnkCap: Port #2, Speed 5GT/s, Width x8, ASPM L0s,
> > Exit Latency L0s unlimited, L1 <8us
> > ClockPM- Surprise- LLActRep- BwNot-
> > ASPMOptComp-
> > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled-
> > CommClk+
> > ExtSynch- ClockPM- AutWidDis- BWInt-
> > AutBWInt-
> > LnkSta: Speed 5GT/s, Width x8, TrErr- Train-
> > SlotClk+ DLActive- BWMgmt- ABWMgmt-
> > DevCap2: Completion Timeout: Range ABCD,
> > TimeoutDis+, LTR-, OBFF Not Supported
> > DevCtl2: Completion Timeout: 50us to 50ms,
> > TimeoutDis-, LTR-, OBFF Disabled
> > LnkCtl2: Target Link Speed: 5GT/s,
> > EnterCompliance- SpeedDis-
> > Transmit Margin: Normal Operating Range,
> > EnterModifiedCompliance- ComplianceSOS-
> > Compliance De-emphasis: -6dB
> > LnkSta2: Current De-emphasis Level: -6dB,
> > EqualizationComplete-, EqualizationPhase1-
> > EqualizationPhase2-, EqualizationPhase3-,
> > LinkEqualizationRequest-
> > Capabilities: [100 v1] Advanced Error Reporting
> > UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
> > UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> > UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt-
> > UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> > UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt-
> > UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
> > CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout-
> > NonFatalErr+
> > CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout-
> > NonFatalErr+
> > AERCap: First Error Pointer: 00, GenCap+ CGenEn-
> > ChkCap+ ChkEn-
> > Capabilities: [140 v1] Device Serial Number 90-e2-ba-ff-
> > ff-b6-b2-60
> > Capabilities: [150 v1] Alternative Routing-ID
> > Interpretation (ARI)
> > ARICap: MFVC- ACS-, Next Function: 0
> > ARICtl: MFVC- ACS-, Function Group: 0
> > Capabilities: [160 v1] Single Root I/O Virtualization (SR-
> > IOV)
> > IOVCap: Migration-, Interrupt Message Number: 000
> > IOVCtl: Enable- Migration- Interrupt- MSE-
> > ARIHierarchy+
> > IOVSta: Migration-
> > Initial VFs: 64, Total VFs: 64, Number of VFs: 0,
> > Function Dependency Link: 00
> > VF offset: 128, stride: 2, Device ID: 10ed
> > Supported Page Size: 00000553, System Page Size:
> > 00000001
> > Region 0: Memory at 00000000c7c00000 (64-bit,
> > prefetchable)
> > Region 3: Memory at 00000000c7b00000 (64-bit,
> > prefetchable)
> > VF Migration: offset: 00000000, BIR: 0
> > Kernel driver in use: ixgbe
> >
> >
> >
> >
> > workaround for now is to do the same, as Brenden did in his
> > original
> > finding: make sure that combined + xdp queues < max_tx_queues
> > (e.g. w/ combined == 14 the issue goes away).
> >
> > > the issue with one of the sample XDP programs provided with the
> > > kernel
> > > such as the xdp2 which I believe uses the XDP_TX function. We
> > > need to
> > > try and create a similar setup in our own environment for
> > > reproduction and debugging.
> >
> > will try but this could take a while, because i'm not sure that we
> > have
> > ixgbe in our test lab (and it would be hard to run such test in
> > prod)
> >
> > >
> > > Thanks.
> > >
> > > - Alex
> >
> > --
> > Nikita V. Shirokov
>
> So I have been reading the datasheet
> (
> https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf
> )
> and it looks like the assumption that Brenden came to in the earlier
> referenced link is probably correct. From what I can tell there is a
> limit of 64 queues in the base RSS mode of the device, so while it
> supports more than 64 queues you can only make use of 64 as per table
> 7-25.
>
> For now I think the workaround you are using is probably the only
> viable solution. I myself don't have time to work on resolving this,
> but I am sure on of the maintainers for ixgbe will be responding
> shortly.
I have notified the 10GbE maintainers, and we are working to reproduce
the issue currently.
>
> One possible solution we may want to look at would be to make use of
> the 32 pool/VF mode in the MTQC register. That should enable us to
> make use of all 128 queues but I am sure there would be other side
> effects such as having to set the bits in the PFVFTE register in
> order
> to enable the extra Tx queues.
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^ permalink raw reply
* Re: [PATCH 05/11] can: rcar: use SPDX identifier for Renesas drivers
From: Wolfram Sang @ 2018-08-22 19:36 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Philippe Ombredanne, Fabio Estevam, Wolfram Sang, Linux-Renesas,
Kuninori Morimoto, Wolfgang Grandegger, Marc Kleine-Budde,
David S. Miller, linux-can, netdev, linux-kernel, Thomas Gleixner
In-Reply-To: <20180822193133.GA1613@kroah.com>
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> > IMHO we should always treat and use the
> > Documentation/process/license-rules.rst as the reference and not SPDX
> > proper who moves at its own pace and evolves its specs and license ids
> > independently of where we stand in the kernel.
> > If this is not right Doc patches are welcomed!
> > In this is very specific case this has been discussed on list a few
> > times. If I recall correctly Thomas also had an opinion on this...
> > So you are correct and this should be for now:
> > // SPDX-License-Identifier: GPL-2.0+
>
> That is correct, stick with that format/version for now please.
OK, will fix.
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* ozlabs.org down?
From: Jeff Kirsher @ 2018-08-22 16:12 UTC (permalink / raw)
To: Jeremy Kerr; +Cc: patchwork, netdev
It appears the entire site is down, including patchworks. Is this
expected? And for how long?
--
Cheers,
Jeff
^ permalink raw reply
* Re: [PATCH 05/11] can: rcar: use SPDX identifier for Renesas drivers
From: Greg Kroah-Hartman @ 2018-08-22 19:31 UTC (permalink / raw)
To: Philippe Ombredanne
Cc: Fabio Estevam, Wolfram Sang, Wolfram Sang, Linux-Renesas,
Kuninori Morimoto, Wolfgang Grandegger, Marc Kleine-Budde,
David S. Miller, linux-can, netdev, linux-kernel, Thomas Gleixner
In-Reply-To: <CAOFm3uF9_rbELx0aYLDXpDnZfi2Z11V1Z4Ktw+DDJT62o2S1kQ@mail.gmail.com>
On Wed, Aug 22, 2018 at 08:16:45PM +0200, Philippe Ombredanne wrote:
> Hi Fabio,
> On Wed, Aug 22, 2018 at 2:55 PM, Fabio Estevam <festevam@gmail.com> wrote:
> > On Wed, Aug 22, 2018 at 3:30 AM, Wolfram Sang <wsa@the-dreams.de> wrote:
> >>
> >>> > +// SPDX-License-Identifier: GPL-2.0-or-later
> >>>
> >>> According to Documentation/process/license-rules.rst the format should
> >>> be like this instead:
> >>>
> >>> // SPDX-License-Identifier: GPL-2.0+
> >>
> >> According to https://spdx.org/licenses/ it should be what I did above.
> >
> > Previous advice I saw was to follow the format described in
> > Documentation/process/license-rules.rst
> >
> > Greg/Philippe,
> >
> > Any inputs on this matter?
> >
> > Thanks
>
> IMHO we should always treat and use the
> Documentation/process/license-rules.rst as the reference and not SPDX
> proper who moves at its own pace and evolves its specs and license ids
> independently of where we stand in the kernel.
> If this is not right Doc patches are welcomed!
> In this is very specific case this has been discussed on list a few
> times. If I recall correctly Thomas also had an opinion on this...
> So you are correct and this should be for now:
> // SPDX-License-Identifier: GPL-2.0+
That is correct, stick with that format/version for now please.
thanks,
greg k-h
^ permalink raw reply
* [bpf PATCH 1/2] tls: possible hang when do_tcp_sendpages hits sndbuf is full case
From: John Fastabend @ 2018-08-22 15:37 UTC (permalink / raw)
To: ast, daniel, davejwatson; +Cc: netdev, john.fastabend, davem
In-Reply-To: <20180822153314.27968.72499.stgit@john-Precision-Tower-5810>
Currently, the lower protocols sk_write_space handler is not called if
TLS is sending a scatterlist via tls_push_sg. However, normally
tls_push_sg calls do_tcp_sendpage, which may be under memory pressure,
that in turn may trigger a wait via sk_wait_event. Typically, this
happens when the in-flight bytes exceed the sdnbuf size. In the normal
case when enough ACKs are received sk_write_space() will be called and
the sk_wait_event will be woken up allowing it to send more data
and/or return to the user.
But, in the TLS case because the sk_write_space() handler does not
wake up the events the above send will wait until the sndtimeo is
exceeded. By default this is MAX_SCHEDULE_TIMEOUT so it look like a
hang to the user (especially this impatient user). To fix this pass
the sk_write_space event to the lower layers sk_write_space event
which in the TCP case will wake any pending events.
I observed the above while integrating sockmap and ktls. It
initially appeared as test_sockmap (modified to use ktls) occasionally
hanging. To reliably reproduce this reduce the sndbuf size and stress
the tls layer by sending many 1B sends. This results in every byte
needing a header and each byte individually being sent to the crypto
layer.
Signed-off-by: John Fastabend <john.fastabend@gmail.com>
---
net/tls/tls_main.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/net/tls/tls_main.c b/net/tls/tls_main.c
index 93c0c22..180b664 100644
--- a/net/tls/tls_main.c
+++ b/net/tls/tls_main.c
@@ -213,9 +213,14 @@ static void tls_write_space(struct sock *sk)
{
struct tls_context *ctx = tls_get_ctx(sk);
- /* We are already sending pages, ignore notification */
- if (ctx->in_tcp_sendpages)
+ /* If in_tcp_sendpages call lower protocol write space handler
+ * to ensure we wake up any waiting operations there. For example
+ * if do_tcp_sendpages where to call sk_wait_event.
+ */
+ if (ctx->in_tcp_sendpages) {
+ ctx->sk_write_space(sk);
return;
+ }
if (!sk->sk_write_pending && tls_is_pending_closed_record(ctx)) {
gfp_t sk_allocation = sk->sk_allocation;
^ permalink raw reply related
* [bpf PATCH 0/2] tls, sockmap, fixes for sk_wait_event
From: John Fastabend @ 2018-08-22 15:37 UTC (permalink / raw)
To: ast, daniel, davejwatson; +Cc: netdev, john.fastabend, davem
I have been testing ktls and sockmap lately and noticed that neither
was handling sk_write_space events correctly. We need to ensure
these events are pushed down to the lower layer in all cases to
handle the case where the lower layer sendpage call has called
sk_wait_event and needs to be woken up. Without this I see
occosional stalls of sndtimeo length while we wait for the
timeout value even though space is available.
Two fixes below. Thanks.
---
John Fastabend (2):
tls: possible hang when do_tcp_sendpages hits sndbuf is full case
bpf: sockmap: write_space events need to be passed to TCP handler
kernel/bpf/sockmap.c | 3 +++
net/tls/tls_main.c | 9 +++++++--
2 files changed, 10 insertions(+), 2 deletions(-)
^ permalink raw reply
* [bpf PATCH 2/2] bpf: sockmap: write_space events need to be passed to TCP handler
From: John Fastabend @ 2018-08-22 15:37 UTC (permalink / raw)
To: ast, daniel, davejwatson; +Cc: netdev, john.fastabend, davem
In-Reply-To: <20180822153314.27968.72499.stgit@john-Precision-Tower-5810>
When sockmap code is using the stream parser it also handles the write
space events in order to handle the case where (a) verdict redirects
skb to another socket and (b) the sockmap then sends the skb but due
to memory constraints (or other EAGAIN errors) needs to do a retry.
But the initial code missed a third case where the
skb_send_sock_locked() triggers an sk_wait_event(). A typically case
would be when sndbuf size is exceeded. If this happens because we
do not pass the write_space event to the lower layers we never wake
up the event and it will wait for sndtimeo. Which as noted in ktls
fix may be rather large and look like a hang to the user.
To reproduce the best test is to reduce the sndbuf size and send
1B data chunks to stress the memory handling.
To fix this pass the event from the upper layer to the lower layer.
Signed-off-by: John Fastabend <john.fastabend@gmail.com>
---
kernel/bpf/sockmap.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/bpf/sockmap.c b/kernel/bpf/sockmap.c
index 98e621a..1d092f3 100644
--- a/kernel/bpf/sockmap.c
+++ b/kernel/bpf/sockmap.c
@@ -1427,12 +1427,15 @@ static void smap_tx_work(struct work_struct *w)
static void smap_write_space(struct sock *sk)
{
struct smap_psock *psock;
+ void (*write_space)(struct sock *sk);
rcu_read_lock();
psock = smap_psock_sk(sk);
if (likely(psock && test_bit(SMAP_TX_RUNNING, &psock->state)))
schedule_work(&psock->tx_work);
+ write_space = psock->save_write_space;
rcu_read_unlock();
+ write_space(sk);
}
static void smap_stop_sock(struct smap_psock *psock, struct sock *sk)
^ permalink raw reply related
* Re: [PATCH] net: macb: do not disable MDIO bus at open/close time
From: Claudiu Beznea @ 2018-08-22 15:33 UTC (permalink / raw)
To: Anssi Hannula, netdev, Nicolas Ferre; +Cc: David S. Miller, Andrew Lunn
In-Reply-To: <20180820145530.7657-1-anssi.hannula@bitwise.fi>
On 20.08.2018 17:55, Anssi Hannula wrote:
> macb_reset_hw() is called from macb_close() and indirectly from
> macb_open(). macb_reset_hw() zeroes the NCR register, including the MPE
> (Management Port Enable) bit.
>
> This will prevent accessing any other PHYs for other Ethernet MACs on
> the MDIO bus, which remains registered at macb_reset_hw() time, until
> macb_init_hw() is called from macb_open() which sets the MPE bit again.
>
> I.e. currently the MDIO bus has a short disruption at open time and is
> disabled at close time until the interface is opened again.
>
> Fix that by only touching the RE and TE bits when enabling and disabling
> RX/TX.
>
> Fixes: 6c36a7074436 ("macb: Use generic PHY layer")
> Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
> ---
>
> Claudiu Beznea wrote:
>> On 10.08.2018 09:22, Anssi Hannula wrote:
>>>
>>> macb_reset_hw() is called in init path too,
>>
>> I only see it in macb_close() and macb_open() called from macb_init_hw().
>
> Yeah, macb_init_hw() is what I meant :)
>
>
> drivers/net/ethernet/cadence/macb_main.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index dc09f9a8a49b..6501e9b3785a 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -2028,14 +2028,17 @@ static void macb_reset_hw(struct macb *bp)
> {
> struct macb_queue *queue;
> unsigned int q;
> + u32 ctrl = macb_readl(bp, NCR);
>
> /* Disable RX and TX (XXX: Should we halt the transmission
> * more gracefully?)
> */
> - macb_writel(bp, NCR, 0);
> + ctrl &= ~(MACB_BIT(RE) | MACB_BIT(TE));
>
> /* Clear the stats registers (XXX: Update stats first?) */
> - macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
> + ctrl |= MACB_BIT(CLRSTAT);
> +
> + macb_writel(bp, NCR, ctrl);
>
> /* Clear all status flags */
> macb_writel(bp, TSR, -1);
> @@ -2170,6 +2173,7 @@ static void macb_init_hw(struct macb *bp)
> unsigned int q;
>
> u32 config;
> + u32 ctrl;
>
> macb_reset_hw(bp);
> macb_set_hwaddr(bp);
> @@ -2223,7 +2227,9 @@ static void macb_init_hw(struct macb *bp)
> }
>
> /* Enable TX and RX */
> - macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
> + ctrl = macb_readl(bp, NCR);
> + ctrl |= MACB_BIT(RE) | MACB_BIT(TE);
> + macb_writel(bp, NCR, ctrl);
I would keep it as:
macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(RE) | MACB_BIT(TE));
> }
>
> /* The hash address register is 64 bits long and takes up two
>
^ permalink raw reply
* Re: [PATCH] strparser: remove any offset before parsing messages
From: Dave Watson @ 2018-08-22 18:38 UTC (permalink / raw)
To: Dominique Martinet
Cc: Doron Roberts-Kedes, Tom Herbert, David S. Miller, netdev,
linux-kernel
In-Reply-To: <20180822054707.GA13455@nautica>
On 08/22/18 07:47 AM, Dominique Martinet wrote:
> > > As I wrote above, I think it should not be possible, so we're not
> > > even talking about a small percentage here.
> > > The reason I didn't use skb_pull (the head-only variant) is that I'd
> > > rather have the overhead than a BUG() if I'm wrong on this...
> >
> > A printk in that section when (orig_offset + eaten > skb_headlen(head))
> > confirms that this case is not uncommon or impossible. Would have to do
> > more work to see how many hundreds of times per second, but it is not a
> > philosophical concern.
>
> Hmm, right, it does happen if I force two bigger packets in a single
> write() on my reproducer; I guess my workload didn't exhibit that
> behaviour with a 9p client...
>
> I've tried measuring that overhead as well by writing a more complex bpf
> program that would fetch the offset in the skb but for some reason I'm
> reading a 0 offset when it's not zero... well, not like there's much
> choice for this at this point anyway; I don't think we'll do this
> without pull, I'll put that on background.
For what it is worth we checked the offset in bpf, something
along the lines of
struct kcm_rx_msg { int full_len; int offset;};
static inline struct kcm_rx_msg *kcm_rx_msg(struct __sk_buff *skb)
{ return (struct kcm_rx_msg *)skb->cb;}
int decode_framing(struct __sk_buff *skb)
{ return load_word(skb, kcm_rx_msg(skb)->offset);}
Although it did puzzle me for a while figuring that out when I ran in
to it.
^ permalink raw reply
* Re: [PATCH] RDMA/smc: Replace ib_query_gid with rdma_get_gid_attr
From: Hans Wippel @ 2018-08-22 14:19 UTC (permalink / raw)
To: Jason Gunthorpe, Ursula Braun
Cc: linux-rdma, Parav Pandit, netdev, linux-kernel
In-Reply-To: <20180818021707.GA25026@ziepe.ca>
On 08/18/2018 04:17 AM, Jason Gunthorpe wrote:
> All RDMA ULPs should be using rdma_get_gid_attr instead of
> ib_query_gid. Convert SMC to use the new API.
>
> In the process correct some confusion with gid_type - if attr->ndev is
> !NULL then gid_type can never be IB_GID_TYPE_IB by
> definition. IB_GID_TYPE_ROCE shares the same enum value and is probably
> what was intended here.
>
> Reviewed-by: Parav Pandit <parav@mellanox.com>
> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
I ran a few SMC tests and the changes look good. So, no objections from
our side and thank you for the patch.
Hans
^ permalink raw reply
* Mobile apps for your company
From: Ray @ 2018-08-22 10:02 UTC (permalink / raw)
To: netdev
Do you have needs for mobile apps design? We are the one who can help you.
We are an India based software company.
What we focus is mobile apps development.
We have 125 staffs in office and have created over 350 apps so far.
We work on many different platforms, such as iOS, Android and others.
Please reply if interested, we will send you our portfolios.
Thanks,
Ray Charles
^ permalink raw reply
* We design apps
From: Ray @ 2018-08-22 9:22 UTC (permalink / raw)
To: netdev
Do you have needs for mobile apps design? We are the one who can help you.
We are an India based software company.
What we focus is mobile apps development.
We have 125 staffs in office and have created over 350 apps so far.
We work on many different platforms, such as iOS, Android and others.
Please reply if interested, we will send you our portfolios.
Thanks,
Ray Charles
^ permalink raw reply
* [PATCH] net_sched: fix unused variable warning in stmmac
From: Arnd Bergmann @ 2018-08-22 15:25 UTC (permalink / raw)
To: Jamal Hadi Salim, Cong Wang, Jiri Pirko, David S. Miller
Cc: Arnd Bergmann, Jakub Kicinski, Simon Horman, Nogah Frankel,
Alexander Aring, John Hurley, netdev, linux-kernel
The new tcf_exts_for_each_action() macro doesn't reference its
arguments when CONFIG_NET_CLS_ACT is disabled, which leads to
a harmless warning in at least one driver:
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c: In function 'tc_fill_actions':
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c:64:6: error: unused variable 'i' [-Werror=unused-variable]
Adding a cast to void lets us avoid this kind of warning.
To be on the safe side, do it for all three arguments, not
just the one that caused the warning.
Fixes: 244cd96adb5f ("net_sched: remove list_head from tc_action")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
include/net/pkt_cls.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/net/pkt_cls.h b/include/net/pkt_cls.h
index c17d51865469..75a3f3fdb359 100644
--- a/include/net/pkt_cls.h
+++ b/include/net/pkt_cls.h
@@ -303,7 +303,7 @@ static inline void tcf_exts_put_net(struct tcf_exts *exts)
for (i = 0; i < TCA_ACT_MAX_PRIO && ((a) = (exts)->actions[i]); i++)
#else
#define tcf_exts_for_each_action(i, a, exts) \
- for (; 0; )
+ for (; 0; (void)(i), (void)(a), (void)(exts))
#endif
static inline void
--
2.18.0
^ permalink raw reply related
* RE: [PATCH] dt-bindings: can: rcar_can: Add r8a774a1 support
From: Chris Paterson @ 2018-08-22 15:12 UTC (permalink / raw)
To: Simon Horman, Fabrizio Castro
Cc: Wolfgang Grandegger, Marc Kleine-Budde, Rob Herring, Mark Rutland,
David S. Miller, linux-can@vger.kernel.org,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
Geert Uytterhoeven, Biju Das, linux-renesas-soc@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20180822104856.34nusjd4ajtwb4ef@verge.net.au>
Hello Simon,
> From: Simon Horman <horms@verge.net.au>
> Sent: 22 August 2018 11:49
>
> On Fri, Aug 17, 2018 at 03:38:23PM +0100, Fabrizio Castro wrote:
> > Document RZ/G2M (r8a774a1) SoC bindings.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das@bp.renesas.com>
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Thank you.
>
> > ---
> > This patch applies on top of next-20180817
> >
> > Documentation/devicetree/bindings/net/can/rcar_can.txt | 8 ++++++--
> > 1 file changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > index 94a7f33..84afc78 100644
> > --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > @@ -4,6 +4,7 @@ Renesas R-Car CAN controller Device Tree Bindings
> > Required properties:
> > - compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743
> SoC.
> > "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
> > + "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
> > "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
> > "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
> > "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
> > @@ -16,7 +17,8 @@ Required properties:
> > "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
> > "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
> > compatible device.
> > - "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
> > + "renesas,rcar-gen3-can" for a generic R-Car Gen3 or RZ/G2
> > + compatible device.
> > When compatible with the generic version, nodes must list the
> > SoC-specific version corresponding to the platform first
> > followed by the generic version.
> > @@ -24,7 +26,9 @@ Required properties:
> > - reg: physical base address and size of the R-Car CAN register map.
> > - interrupts: interrupt specifier for the sole interrupt.
> > - clocks: phandles and clock specifiers for 3 CAN clock inputs.
> > -- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
> > +- clock-names: 2 clock input name strings for RZ/G2: "clkp1",
> > +"can_clk", and
>
> Minor comment: Personally I would start a new sentence at "and".
>
> Question: Is a driver update required so support 2-clock SoCs?
The driver will work okay as-is.
In theory CAN could be broken if renesas,can-clock-select is set to 0x1 (clkp2) in the DT, as this value will be written to the CAN Clock Select Register. However if the documentation is followed there will be no problems.
We should probably update the driver to fix this though, which will be a change specific to all RZ/G2 devices, so perhaps we should also be adding a "renesas,rzg-gen2-can" family compatible string as well? (to driver and documentation)
Kind regards, Chris
>
> > + 3 clock input name strings for every other SoC: "clkp1", "clkp2",
> > + "can_clk".
> > - pinctrl-0: pin control group to be used for this controller.
> > - pinctrl-names: must be "default".
> >
> > --
> > 2.7.4
> >
^ permalink raw reply
* [PATCH lora-next 3/3] net: lora: sx125x sx1301: allow radio to register as a clk provider
From: Ben Whitten @ 2018-08-22 11:02 UTC (permalink / raw)
To: afaerber; +Cc: starnight, hasnain.virk, netdev, liuxuenetmail, shess,
Ben Whitten
In-Reply-To: <1534935761-12738-1-git-send-email-ben.whitten@lairdtech.com>
From: Ben Whitten <ben.whitten@gmail.com>
The 32M is run from the radio, before we just enabled it based on
the radio number but now we can use the clk framework to request the
clk is started when we need it.
The 32M clock produced from the radio is really a gated version of
tcxo which is a fixed clock provided by hardware, and isn't captured
in this patch.
The sx1301 brings the clock up prior to calibration once the radios
have probed themselves.
A sample dts showing the clk link:
sx1301: sx1301@0 {
...
clocks = <&radio1 0>;
clock-names = "clk32m";
radio-spi {
radio0: radio-a@0 {
...
};
radio1: radio-b@1 {
#clock-cells = <0>;
clock-output-names = "clk32m";
};
};
};
Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
---
drivers/net/lora/sx125x.c | 112 ++++++++++++++++++++++++++++++++++++++++++----
drivers/net/lora/sx1301.c | 13 ++++++
drivers/net/lora/sx1301.h | 2 +
3 files changed, 119 insertions(+), 8 deletions(-)
diff --git a/drivers/net/lora/sx125x.c b/drivers/net/lora/sx125x.c
index b5517e4..5989157 100644
--- a/drivers/net/lora/sx125x.c
+++ b/drivers/net/lora/sx125x.c
@@ -9,6 +9,8 @@
* Copyright (c) 2013 Semtech-Cycleo
*/
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
@@ -42,10 +44,16 @@ static const struct reg_field sx125x_regmap_fields[] = {
};
struct sx125x_priv {
+ struct clk *clkout;
+ struct clk_hw clkout_hw;
+
+ struct device *dev;
struct regmap *regmap;
struct regmap_field *regmap_fields[ARRAY_SIZE(sx125x_regmap_fields)];
};
+#define to_clkout(_hw) container_of(_hw, struct sx125x_priv, clkout_hw)
+
static struct regmap_config __maybe_unused sx125x_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -64,6 +72,96 @@ static int sx125x_field_write(struct sx125x_priv *priv,
return regmap_field_write(priv->regmap_fields[field_id], val);
}
+static int sx125x_field_read(struct sx125x_priv *priv,
+ enum sx125x_fields field_id, unsigned int *val)
+{
+ return regmap_field_read(priv->regmap_fields[field_id], val);
+}
+
+static int sx125x_clkout_enable(struct clk_hw *hw)
+{
+ struct sx125x_priv *priv = to_clkout(hw);
+
+ dev_info(priv->dev, "enabling clkout\n");
+ return sx125x_field_write(priv, F_CLK_OUT, 1);
+}
+
+static void sx125x_clkout_disable(struct clk_hw *hw)
+{
+ struct sx125x_priv *priv = to_clkout(hw);
+ int ret;
+
+ dev_info(priv->dev, "disabling clkout\n");
+ ret = sx125x_field_write(priv, F_CLK_OUT, 0);
+ if (ret)
+ dev_err(priv->dev, "error disabling clkout\n");
+}
+
+static int sx125x_clkout_is_enabled(struct clk_hw *hw)
+{
+ struct sx125x_priv *priv = to_clkout(hw);
+ unsigned int enabled;
+ int ret;
+
+ ret = sx125x_field_read(priv, F_CLK_OUT, &enabled);
+ if (ret) {
+ dev_err(priv->dev, "error reading clk enable\n");
+ return 0;
+ }
+ return enabled;
+}
+
+static const struct clk_ops sx125x_clkout_ops = {
+ .enable = sx125x_clkout_enable,
+ .disable = sx125x_clkout_disable,
+ .is_enabled = sx125x_clkout_is_enabled,
+};
+
+static int sx125x_register_clock_provider(struct sx125x_priv *priv)
+{
+ struct device *dev = priv->dev;
+ struct clk_init_data init;
+ const char *parent;
+ int ret;
+
+ /* Disable CLKOUT */
+ ret = sx125x_field_write(priv, F_CLK_OUT, 0);
+ if (ret) {
+ dev_err(dev, "unable to disable clkout\n");
+ return ret;
+ }
+
+ /* Register clock provider if expected in DTB */
+ if (!of_find_property(dev->of_node, "#clock-cells", NULL))
+ return 0;
+
+ dev_info(dev, "registering clkout\n");
+
+ parent = of_clk_get_parent_name(dev->of_node, 0);
+ if (!parent) {
+ dev_err(dev, "Unable to find parent clk\n");
+ return -ENODEV;
+ }
+
+ init.ops = &sx125x_clkout_ops;
+ init.flags = CLK_IS_BASIC;
+ init.parent_names = &parent;
+ init.num_parents = 1;
+ priv->clkout_hw.init = &init;
+
+ of_property_read_string_index(dev->of_node, "clock-output-names", 0,
+ &init.name);
+
+ priv->clkout = devm_clk_register(dev, &priv->clkout_hw);
+ if (IS_ERR(priv->clkout)) {
+ dev_err(dev, "failed to register clkout\n");
+ return PTR_ERR(priv->clkout);
+ }
+ ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get,
+ &priv->clkout_hw);
+ return ret;
+}
+
static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap *regmap, unsigned int radio)
{
struct sx125x_priv *priv;
@@ -76,6 +174,7 @@ static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap
return -ENOMEM;
dev_set_drvdata(dev, priv);
+ priv->dev = dev;
priv->regmap = regmap;
for (i = 0; i < ARRAY_SIZE(sx125x_regmap_fields); i++) {
const struct reg_field *reg_fields = sx125x_regmap_fields;
@@ -99,16 +198,13 @@ static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap
dev_info(dev, "SX125x version: %02x\n", val);
}
- if (radio == 1) { /* HACK */
- ret = sx125x_field_write(priv, F_CLK_OUT, 1);
- if (ret) {
- dev_err(dev, "enabling clock output failed\n");
- return ret;
- }
-
- dev_info(dev, "enabling clock output\n");
+ ret = sx125x_register_clock_provider(priv);
+ if (ret) {
+ dev_err(dev, "failed to register clkout provider: %d\n", ret);
+ return ret;
}
+ /* TODO Only needs setting on radio on the TX path */
ret = sx125x_field_write(priv, F_TX_DAC_CLK_SEL, 1);
if (ret) {
dev_err(dev, "clock select failed\n");
diff --git a/drivers/net/lora/sx1301.c b/drivers/net/lora/sx1301.c
index 8aad331..0a710d7 100644
--- a/drivers/net/lora/sx1301.c
+++ b/drivers/net/lora/sx1301.c
@@ -10,6 +10,7 @@
*/
#include <linux/bitops.h>
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/lora.h>
@@ -395,6 +396,18 @@ static int sx130x_loradev_open(struct net_device *netdev)
return -ENXIO;
}
+ priv->clk32m = devm_clk_get(priv->dev, "clk32m");
+ if (IS_ERR(priv->clk32m)) {
+ dev_err(priv->dev, "failed to get clk32m\n");
+ return PTR_ERR(priv->clk32m);
+ }
+
+ ret = clk_prepare_enable(priv->clk32m);
+ if (ret) {
+ dev_err(priv->dev, "failed to enable clk32m: %d\n", ret);
+ return ret;
+ }
+
ret = sx1301_field_write(priv, F_GLOBAL_EN, 1);
if (ret) {
dev_err(priv->dev, "enable global clocks failed\n");
diff --git a/drivers/net/lora/sx1301.h b/drivers/net/lora/sx1301.h
index 59fcb2c..4b1abd1 100644
--- a/drivers/net/lora/sx1301.h
+++ b/drivers/net/lora/sx1301.h
@@ -9,6 +9,7 @@
#ifndef _SX1301_
#define _SX1301_
+#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/gpio/consumer.h>
#include <linux/lora/dev.h>
@@ -109,6 +110,7 @@ static const struct reg_field sx1301_regmap_fields[] = {
struct sx1301_priv {
struct lora_dev_priv lora;
struct device *dev;
+ struct clk *clk32m;
struct spi_device *spi;
struct gpio_desc *rst_gpio;
struct regmap *regmap;
--
2.7.4
^ permalink raw reply related
* [PATCH lora-next 1/3] net: lora: sx1301: convert to using regmap fields for bit ops
From: Ben Whitten @ 2018-08-22 11:02 UTC (permalink / raw)
To: afaerber; +Cc: starnight, hasnain.virk, netdev, liuxuenetmail, shess,
Ben Whitten
From: Ben Whitten <ben.whitten@gmail.com>
We convert to using regmap fields to allow bit access to the registers
where regmap handles the read update write.
Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
---
drivers/net/lora/sx1301.c | 240 +++++++++++++---------------------------------
drivers/net/lora/sx1301.h | 46 +++++++++
2 files changed, 113 insertions(+), 173 deletions(-)
diff --git a/drivers/net/lora/sx1301.c b/drivers/net/lora/sx1301.c
index 971d234..8aad331 100644
--- a/drivers/net/lora/sx1301.c
+++ b/drivers/net/lora/sx1301.c
@@ -24,27 +24,6 @@
#include "sx1301.h"
-#define REG_PAGE_RESET_SOFT_RESET BIT(7)
-
-#define REG_16_GLOBAL_EN BIT(3)
-
-#define REG_17_CLK32M_EN BIT(0)
-
-#define REG_0_105_FORCE_HOST_RADIO_CTRL BIT(1)
-#define REG_0_105_FORCE_HOST_FE_CTRL BIT(2)
-#define REG_0_105_FORCE_DEC_FILTER_GAIN BIT(3)
-
-#define REG_0_MCU_RST_0 BIT(0)
-#define REG_0_MCU_RST_1 BIT(1)
-#define REG_0_MCU_SELECT_MUX_0 BIT(2)
-#define REG_0_MCU_SELECT_MUX_1 BIT(3)
-
-#define REG_2_43_RADIO_A_EN BIT(0)
-#define REG_2_43_RADIO_B_EN BIT(1)
-#define REG_2_43_RADIO_RST BIT(2)
-
-#define REG_EMERGENCY_FORCE_HOST_CTRL BIT(0)
-
static const struct regmap_range_cfg sx1301_regmap_ranges[] = {
{
.name = "Pages",
@@ -74,6 +53,12 @@ static struct regmap_config sx1301_regmap_config = {
.max_register = SX1301_MAX_REGISTER,
};
+static int sx1301_field_write(struct sx1301_priv *priv,
+ enum sx1301_fields field_id, u8 val)
+{
+ return regmap_field_write(priv->regmap_fields[field_id], val);
+}
+
static int sx1301_read_burst(struct sx1301_priv *priv, u8 reg, u8 *val, size_t len)
{
u8 addr = reg & 0x7f;
@@ -91,11 +76,6 @@ static int sx1301_write_burst(struct sx1301_priv *priv, u8 reg, const u8 *val, s
return spi_sync_transfer(priv->spi, xfr, 2);
}
-static int sx1301_soft_reset(struct sx1301_priv *priv)
-{
- return regmap_write(priv->regmap, SX1301_PAGE, REG_PAGE_RESET_SOFT_RESET);
-}
-
static int sx1301_agc_ram_read(struct sx1301_priv *priv, u8 addr, unsigned int *val)
{
int ret;
@@ -137,7 +117,7 @@ static int sx1301_arb_ram_read(struct sx1301_priv *priv, u8 addr, unsigned int *
static int sx1301_load_firmware(struct sx1301_priv *priv, int mcu, const struct firmware *fw)
{
u8 *buf;
- u8 rst, select_mux;
+ enum sx1301_fields rst, select_mux;
unsigned int val;
int ret;
@@ -148,29 +128,26 @@ static int sx1301_load_firmware(struct sx1301_priv *priv, int mcu, const struct
switch (mcu) {
case 0:
- rst = REG_0_MCU_RST_0;
- select_mux = REG_0_MCU_SELECT_MUX_0;
+ rst = F_MCU_RST_0;
+ select_mux = F_MCU_SELECT_MUX_0;
break;
case 1:
- rst = REG_0_MCU_RST_1;
- select_mux = REG_0_MCU_SELECT_MUX_1;
+ rst = F_MCU_RST_1;
+ select_mux = F_MCU_SELECT_MUX_1;
break;
default:
return -EINVAL;
}
- ret = regmap_read(priv->regmap, SX1301_MCU_CTRL, &val);
+ ret = sx1301_field_write(priv, rst, 1);
if (ret) {
- dev_err(priv->dev, "MCU read failed\n");
+ dev_err(priv->dev, "MCU reset failed\n");
return ret;
}
- val |= rst;
- val &= ~select_mux;
-
- ret = regmap_write(priv->regmap, SX1301_MCU_CTRL, val);
+ ret = sx1301_field_write(priv, select_mux, 0);
if (ret) {
- dev_err(priv->dev, "MCU reset / select mux write failed\n");
+ dev_err(priv->dev, "MCU RAM select mux failed\n");
return ret;
}
@@ -211,17 +188,9 @@ static int sx1301_load_firmware(struct sx1301_priv *priv, int mcu, const struct
kfree(buf);
- ret = regmap_read(priv->regmap, SX1301_MCU_CTRL, &val);
+ ret = sx1301_field_write(priv, select_mux, 1);
if (ret) {
- dev_err(priv->dev, "MCU read (1) failed\n");
- return ret;
- }
-
- val |= select_mux;
-
- ret = regmap_write(priv->regmap, SX1301_MCU_CTRL, val);
- if (ret) {
- dev_err(priv->dev, "MCU reset / select mux write (1) failed\n");
+ dev_err(priv->dev, "MCU RAM release mux failed\n");
return ret;
}
@@ -247,17 +216,9 @@ static int sx1301_agc_calibrate(struct sx1301_priv *priv)
return ret;
}
- ret = regmap_read(priv->regmap, SX1301_FORCE_CTRL, &val);
+ ret = sx1301_field_write(priv, F_FORCE_HOST_RADIO_CTRL, 0);
if (ret) {
- dev_err(priv->dev, "0|105 read failed\n");
- return ret;
- }
-
- val &= ~REG_0_105_FORCE_HOST_RADIO_CTRL;
-
- ret = regmap_write(priv->regmap, SX1301_FORCE_CTRL, val);
- if (ret) {
- dev_err(priv->dev, "0|105 write failed\n");
+ dev_err(priv->dev, "force host control failed\n");
return ret;
}
@@ -271,17 +232,9 @@ static int sx1301_agc_calibrate(struct sx1301_priv *priv)
return ret;
}
- ret = regmap_read(priv->regmap, SX1301_MCU_CTRL, &val);
+ ret = sx1301_field_write(priv, F_MCU_RST_1, 0);
if (ret) {
- dev_err(priv->dev, "MCU read (0) failed\n");
- return ret;
- }
-
- val &= ~REG_0_MCU_RST_1;
-
- ret = regmap_write(priv->regmap, SX1301_MCU_CTRL, val);
- if (ret) {
- dev_err(priv->dev, "MCU write (0) failed\n");
+ dev_err(priv->dev, "MCU 1 reset failed\n");
return ret;
}
@@ -299,34 +252,18 @@ static int sx1301_agc_calibrate(struct sx1301_priv *priv)
return -ENXIO;
}
- ret = regmap_read(priv->regmap, SX1301_EMERGENCY_FORCE_HOST_CTRL, &val);
+ ret = sx1301_field_write(priv, F_EMERGENCY_FORCE_HOST_CTRL, 0);
if (ret) {
- dev_err(priv->dev, "emergency force read failed\n");
- return ret;
- }
-
- val &= ~REG_EMERGENCY_FORCE_HOST_CTRL;
-
- ret = regmap_write(priv->regmap, SX1301_EMERGENCY_FORCE_HOST_CTRL, val);
- if (ret) {
- dev_err(priv->dev, "emergency force write failed\n");
+ dev_err(priv->dev, "emergency force failed\n");
return ret;
}
dev_err(priv->dev, "starting calibration...\n");
msleep(2300);
- ret = regmap_read(priv->regmap, SX1301_EMERGENCY_FORCE_HOST_CTRL, &val);
- if (ret) {
- dev_err(priv->dev, "emergency force read (1) failed\n");
- return ret;
- }
-
- val |= REG_EMERGENCY_FORCE_HOST_CTRL;
-
- ret = regmap_write(priv->regmap, SX1301_EMERGENCY_FORCE_HOST_CTRL, val);
+ ret = sx1301_field_write(priv, F_EMERGENCY_FORCE_HOST_CTRL, 1);
if (ret) {
- dev_err(priv->dev, "emergency force write (1) failed\n");
+ dev_err(priv->dev, "emergency force release failed\n");
return ret;
}
@@ -373,19 +310,15 @@ static int sx1301_load_all_firmware(struct sx1301_priv *priv)
if (ret)
return ret;
- ret = regmap_read(priv->regmap, SX1301_FORCE_CTRL, &val);
- if (ret) {
- dev_err(priv->dev, "0|105 read failed\n");
+ ret = sx1301_field_write(priv, F_FORCE_HOST_RADIO_CTRL, 0);
+ if (ret)
return ret;
- }
-
- val &= ~(REG_0_105_FORCE_HOST_RADIO_CTRL | REG_0_105_FORCE_HOST_FE_CTRL | REG_0_105_FORCE_DEC_FILTER_GAIN);
-
- ret = regmap_write(priv->regmap, SX1301_FORCE_CTRL, val);
- if (ret) {
- dev_err(priv->dev, "0|105 write failed\n");
+ ret = sx1301_field_write(priv, F_FORCE_HOST_FE_CTRL, 0);
+ if (ret)
+ return ret;
+ ret = sx1301_field_write(priv, F_FORCE_DEC_FILTER_GAIN, 0);
+ if (ret)
return ret;
- }
ret = regmap_write(priv->regmap, SX1301_CHRS, 0);
if (ret) {
@@ -393,17 +326,15 @@ static int sx1301_load_all_firmware(struct sx1301_priv *priv)
return ret;
}
- ret = regmap_read(priv->regmap, SX1301_MCU_CTRL, &val);
+ ret = sx1301_field_write(priv, F_MCU_RST_0, 0);
if (ret) {
- dev_err(priv->dev, "MCU read (0) failed\n");
+ dev_err(priv->dev, "MCU 0 release failed\n");
return ret;
}
- val &= ~(REG_0_MCU_RST_1 | REG_0_MCU_RST_0);
-
- ret = regmap_write(priv->regmap, SX1301_MCU_CTRL, val);
+ ret = sx1301_field_write(priv, F_MCU_RST_1, 0);
if (ret) {
- dev_err(priv->dev, "MCU write (0) failed\n");
+ dev_err(priv->dev, "MCU 1 release failed\n");
return ret;
}
@@ -455,7 +386,6 @@ static netdev_tx_t sx130x_loradev_start_xmit(struct sk_buff *skb, struct net_dev
static int sx130x_loradev_open(struct net_device *netdev)
{
struct sx1301_priv *priv = netdev_priv(netdev);
- unsigned int val;
int ret;
netdev_dbg(netdev, "%s", __func__);
@@ -465,31 +395,15 @@ static int sx130x_loradev_open(struct net_device *netdev)
return -ENXIO;
}
- ret = regmap_read(priv->regmap, SX1301_GEN, &val);
+ ret = sx1301_field_write(priv, F_GLOBAL_EN, 1);
if (ret) {
- netdev_err(netdev, "16 read (1) failed\n");
+ dev_err(priv->dev, "enable global clocks failed\n");
return ret;
}
- val |= REG_16_GLOBAL_EN;
-
- ret = regmap_write(priv->regmap, SX1301_GEN, val);
+ ret = sx1301_field_write(priv, F_CLK32M_EN, 1);
if (ret) {
- netdev_err(netdev, "16 write (1) failed\n");
- return ret;
- }
-
- ret = regmap_read(priv->regmap, SX1301_CKEN, &val);
- if (ret) {
- netdev_err(netdev, "17 read (1) failed\n");
- return ret;
- }
-
- val |= REG_17_CLK32M_EN;
-
- ret = regmap_write(priv->regmap, SX1301_CKEN, val);
- if (ret) {
- netdev_err(netdev, "17 write (1) failed\n");
+ dev_err(priv->dev, "enable 32M clock failed\n");
return ret;
}
@@ -536,6 +450,7 @@ static int sx1301_probe(struct spi_device *spi)
struct sx1301_priv *priv;
struct gpio_desc *rst;
int ret;
+ int i;
unsigned int ver;
unsigned int val;
@@ -572,6 +487,19 @@ static int sx1301_probe(struct spi_device *spi)
return ret;
}
+ for (i = 0; i < ARRAY_SIZE(sx1301_regmap_fields); i++) {
+ const struct reg_field *reg_fields = sx1301_regmap_fields;
+
+ priv->regmap_fields[i] = devm_regmap_field_alloc(&spi->dev,
+ priv->regmap,
+ reg_fields[i]);
+ if (IS_ERR(priv->regmap_fields[i])) {
+ ret = PTR_ERR(priv->regmap_fields[i]);
+ dev_err(&spi->dev, "Cannot allocate regmap field: %d\n", ret);
+ return ret;
+ }
+ }
+
ret = regmap_read(priv->regmap, SX1301_VER, &ver);
if (ret) {
dev_err(&spi->dev, "version read failed\n");
@@ -589,83 +517,49 @@ static int sx1301_probe(struct spi_device *spi)
return ret;
}
- ret = sx1301_soft_reset(priv);
+ ret = sx1301_field_write(priv, F_SOFT_RESET, 1);
if (ret) {
dev_err(&spi->dev, "soft reset failed\n");
return ret;
}
- ret = regmap_read(priv->regmap, SX1301_GEN, &val);
+ ret = sx1301_field_write(priv, F_GLOBAL_EN, 0);
if (ret) {
- dev_err(&spi->dev, "16 read failed\n");
+ dev_err(&spi->dev, "gate global clocks failed\n");
return ret;
}
- val &= ~REG_16_GLOBAL_EN;
-
- ret = regmap_write(priv->regmap, SX1301_GEN, val);
- if (ret) {
- dev_err(&spi->dev, "16 write failed\n");
- return ret;
- }
-
- ret = regmap_read(priv->regmap, SX1301_CKEN, &val);
+ ret = sx1301_field_write(priv, F_CLK32M_EN, 0);
if (ret) {
- dev_err(&spi->dev, "17 read failed\n");
+ dev_err(&spi->dev, "gate 32M clock failed\n");
return ret;
}
- val &= ~REG_17_CLK32M_EN;
-
- ret = regmap_write(priv->regmap, SX1301_CKEN, val);
+ ret = sx1301_field_write(priv, F_RADIO_A_EN, 1);
if (ret) {
- dev_err(&spi->dev, "17 write failed\n");
+ dev_err(&spi->dev, "radio a enable failed\n");
return ret;
}
- ret = regmap_read(priv->regmap, SX1301_RADIO_CFG, &val);
- if (ret) {
- dev_err(&spi->dev, "2|43 read failed\n");
- return ret;
- }
-
- val |= REG_2_43_RADIO_B_EN | REG_2_43_RADIO_A_EN;
-
- ret = regmap_write(priv->regmap, SX1301_RADIO_CFG, val);
+ ret = sx1301_field_write(priv, F_RADIO_B_EN, 1);
if (ret) {
- dev_err(&spi->dev, "2|43 write failed\n");
+ dev_err(&spi->dev, "radio b enable failed\n");
return ret;
}
msleep(500);
- ret = regmap_read(priv->regmap, SX1301_RADIO_CFG, &val);
+ ret = sx1301_field_write(priv, F_RADIO_RST, 1);
if (ret) {
- dev_err(&spi->dev, "2|43 read failed\n");
- return ret;
- }
-
- val |= REG_2_43_RADIO_RST;
-
- ret = regmap_write(priv->regmap, SX1301_RADIO_CFG, val);
- if (ret) {
- dev_err(&spi->dev, "2|43 write failed\n");
+ dev_err(&spi->dev, "radio asert reset failed\n");
return ret;
}
msleep(5);
- ret = regmap_read(priv->regmap, SX1301_RADIO_CFG, &val);
- if (ret) {
- dev_err(&spi->dev, "2|43 read failed\n");
- return ret;
- }
-
- val &= ~REG_2_43_RADIO_RST;
-
- ret = regmap_write(priv->regmap, SX1301_RADIO_CFG, val);
+ ret = sx1301_field_write(priv, F_RADIO_RST, 0);
if (ret) {
- dev_err(&spi->dev, "2|43 write failed\n");
+ dev_err(&spi->dev, "radio deasert reset failed\n");
return ret;
}
diff --git a/drivers/net/lora/sx1301.h b/drivers/net/lora/sx1301.h
index e939c02..59fcb2c 100644
--- a/drivers/net/lora/sx1301.h
+++ b/drivers/net/lora/sx1301.h
@@ -61,12 +61,58 @@
#define SX1301_MAX_REGISTER (SX1301_PAGE_BASE(3) + 0x7F)
+enum sx1301_fields {
+ F_SOFT_RESET,
+ F_GLOBAL_EN,
+ F_CLK32M_EN,
+ F_RADIO_A_EN,
+ F_RADIO_B_EN,
+ F_RADIO_RST,
+
+ F_MCU_RST_0,
+ F_MCU_RST_1,
+ F_MCU_SELECT_MUX_0,
+ F_MCU_SELECT_MUX_1,
+
+ F_FORCE_HOST_RADIO_CTRL,
+ F_FORCE_HOST_FE_CTRL,
+ F_FORCE_DEC_FILTER_GAIN,
+
+ F_EMERGENCY_FORCE_HOST_CTRL,
+};
+
+static const struct reg_field sx1301_regmap_fields[] = {
+ /* PAGE */
+ [F_SOFT_RESET] = REG_FIELD(SX1301_PAGE, 7, 7),
+ /* GEN */
+ [F_GLOBAL_EN] = REG_FIELD(SX1301_GEN, 3, 3),
+ /* CKEN */
+ [F_CLK32M_EN] = REG_FIELD(SX1301_CKEN, 0, 0),
+ /* RADIO_CFG */
+ [F_RADIO_A_EN] = REG_FIELD(SX1301_RADIO_CFG, 0, 0),
+ [F_RADIO_B_EN] = REG_FIELD(SX1301_RADIO_CFG, 1, 1),
+ [F_RADIO_RST] = REG_FIELD(SX1301_RADIO_CFG, 2, 2),
+ /* MCU_CTRL */
+ [F_MCU_RST_0] = REG_FIELD(SX1301_MCU_CTRL, 0, 0),
+ [F_MCU_RST_1] = REG_FIELD(SX1301_MCU_CTRL, 1, 1),
+ [F_MCU_SELECT_MUX_0] = REG_FIELD(SX1301_MCU_CTRL, 2, 2),
+ [F_MCU_SELECT_MUX_1] = REG_FIELD(SX1301_MCU_CTRL, 3, 3),
+ /* FORCE_CTRL */
+ [F_FORCE_HOST_RADIO_CTRL] = REG_FIELD(SX1301_FORCE_CTRL, 1, 1),
+ [F_FORCE_HOST_FE_CTRL] = REG_FIELD(SX1301_FORCE_CTRL, 2, 2),
+ [F_FORCE_DEC_FILTER_GAIN] = REG_FIELD(SX1301_FORCE_CTRL, 3, 3),
+ /* EMERGENCY_FORCE_HOST_CTRL */
+ [F_EMERGENCY_FORCE_HOST_CTRL] =
+ REG_FIELD(SX1301_EMERGENCY_FORCE_HOST_CTRL, 0, 0),
+};
+
struct sx1301_priv {
struct lora_dev_priv lora;
struct device *dev;
struct spi_device *spi;
struct gpio_desc *rst_gpio;
struct regmap *regmap;
+ struct regmap_field *regmap_fields[ARRAY_SIZE(sx1301_regmap_fields)];
};
int __init sx130x_radio_init(void);
--
2.7.4
^ permalink raw reply related
* [PATCH lora-next 2/3] net: lora: sx125x: convert to regmap fields
From: Ben Whitten @ 2018-08-22 11:02 UTC (permalink / raw)
To: afaerber; +Cc: starnight, hasnain.virk, netdev, liuxuenetmail, shess,
Ben Whitten
In-Reply-To: <1534935761-12738-1-git-send-email-ben.whitten@lairdtech.com>
From: Ben Whitten <ben.whitten@gmail.com>
We convert to using regmap fields to allow regmap to take care of read
modify writes and bit shifting for ofset fields.
Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
---
drivers/net/lora/sx125x.c | 59 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 51 insertions(+), 8 deletions(-)
diff --git a/drivers/net/lora/sx125x.c b/drivers/net/lora/sx125x.c
index 3476a59..b5517e4 100644
--- a/drivers/net/lora/sx125x.c
+++ b/drivers/net/lora/sx125x.c
@@ -25,11 +25,25 @@
#include "sx125x.h"
-#define REG_CLK_SELECT_TX_DAC_CLK_SELECT_CLK_IN BIT(0)
-#define REG_CLK_SELECT_CLK_OUT BIT(1)
+enum sx125x_fields {
+ F_CLK_OUT,
+ F_TX_DAC_CLK_SEL,
+ F_SX1257_XOSC_GM_STARTUP,
+ F_SX1257_XOSC_DISABLE_CORE,
+};
+
+static const struct reg_field sx125x_regmap_fields[] = {
+ /* CLK_SELECT */
+ [F_CLK_OUT] = REG_FIELD(SX125X_CLK_SELECT, 1, 1),
+ [F_TX_DAC_CLK_SEL] = REG_FIELD(SX125X_CLK_SELECT, 0, 0),
+ /* XOSC */ /* TODO maybe make this dynamic */
+ [F_SX1257_XOSC_GM_STARTUP] = REG_FIELD(SX1257_XOSC, 0, 3),
+ [F_SX1257_XOSC_DISABLE_CORE] = REG_FIELD(SX1257_XOSC, 5, 5),
+};
struct sx125x_priv {
struct regmap *regmap;
+ struct regmap_field *regmap_fields[ARRAY_SIZE(sx125x_regmap_fields)];
};
static struct regmap_config __maybe_unused sx125x_regmap_config = {
@@ -44,11 +58,18 @@ static struct regmap_config __maybe_unused sx125x_regmap_config = {
.max_register = SX125X_MAX_REGISTER,
};
+static int sx125x_field_write(struct sx125x_priv *priv,
+ enum sx125x_fields field_id, u8 val)
+{
+ return regmap_field_write(priv->regmap_fields[field_id], val);
+}
+
static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap *regmap, unsigned int radio)
{
struct sx125x_priv *priv;
unsigned int val;
int ret;
+ int i;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -56,6 +77,18 @@ static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap
dev_set_drvdata(dev, priv);
priv->regmap = regmap;
+ for (i = 0; i < ARRAY_SIZE(sx125x_regmap_fields); i++) {
+ const struct reg_field *reg_fields = sx125x_regmap_fields;
+
+ priv->regmap_fields[i] = devm_regmap_field_alloc(dev,
+ priv->regmap,
+ reg_fields[i]);
+ if (IS_ERR(priv->regmap_fields[i])) {
+ ret = PTR_ERR(priv->regmap_fields[i]);
+ dev_err(dev, "Cannot allocate regmap field: %d\n", ret);
+ return ret;
+ }
+ }
if (false) {
ret = regmap_read(priv->regmap, SX1255_VERSION, &val);
@@ -66,24 +99,34 @@ static int __maybe_unused sx125x_regmap_probe(struct device *dev, struct regmap
dev_info(dev, "SX125x version: %02x\n", val);
}
- val = REG_CLK_SELECT_TX_DAC_CLK_SELECT_CLK_IN;
if (radio == 1) { /* HACK */
- val |= REG_CLK_SELECT_CLK_OUT;
+ ret = sx125x_field_write(priv, F_CLK_OUT, 1);
+ if (ret) {
+ dev_err(dev, "enabling clock output failed\n");
+ return ret;
+ }
+
dev_info(dev, "enabling clock output\n");
}
- ret = regmap_write(priv->regmap, SX125X_CLK_SELECT, val);
+ ret = sx125x_field_write(priv, F_TX_DAC_CLK_SEL, 1);
if (ret) {
- dev_err(dev, "clk write failed\n");
+ dev_err(dev, "clock select failed\n");
return ret;
}
dev_dbg(dev, "clk written\n");
if (true) {
- ret = regmap_write(priv->regmap, SX1257_XOSC, 13 + 2 * 16);
+ ret = sx125x_field_write(priv, F_SX1257_XOSC_DISABLE_CORE, 1);
+ if (ret) {
+ dev_err(dev, "xosc disable failed\n");
+ return ret;
+ }
+
+ ret = sx125x_field_write(priv, F_SX1257_XOSC_GM_STARTUP, 13);
if (ret) {
- dev_err(dev, "xosc write failed\n");
+ dev_err(dev, "xosc startup adjust failed\n");
return ret;
}
}
--
2.7.4
^ permalink raw reply related
* Re: [PATCH] testsuite: Handle large number of kernel options
From: Luca Boccassi @ 2018-08-22 11:02 UTC (permalink / raw)
To: Stefan Bader, net-devel; +Cc: Stephen Hemminger, Christian Ehrhardt
In-Reply-To: <1534926698-25163-1-git-send-email-stefan.bader@canonical.com>
[-- Attachment #1: Type: text/plain, Size: 887 bytes --]
On Wed, 2018-08-22 at 10:31 +0200, Stefan Bader wrote:
> Once there are more than a certain number of kernel config options
> set (this happened for us with kernel 4.17), the method of passing
> those as command line arguments exceeds the maximum number of
> arguments the shell supports. This causes the whole testsuite to
> fail.
> Instead, create a temporary file and modify its contents so that
> the config option variables are exported. Then this file can be
> sourced in before running the tests.
>
> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
> ---
> testsuite/Makefile | 16 +++++++++++-----
> 1 file changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/testsuite/Makefile b/testsuite/Makefile
> index 8fcbc55..f9f3b19 100644
Acked-by: Luca Boccassi <bluca@debian.org>
Looks good to me, thanks.
--
Kind regards,
Luca Boccassi
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH] dt-bindings: can: rcar_can: Add r8a774a1 support
From: Simon Horman @ 2018-08-22 10:48 UTC (permalink / raw)
To: Fabrizio Castro
Cc: Wolfgang Grandegger, Marc Kleine-Budde, Rob Herring, Mark Rutland,
David S. Miller, linux-can, netdev, devicetree,
Geert Uytterhoeven, Chris Paterson, Biju Das, linux-renesas-soc,
linux-kernel
In-Reply-To: <1534516703-11448-1-git-send-email-fabrizio.castro@bp.renesas.com>
On Fri, Aug 17, 2018 at 03:38:23PM +0100, Fabrizio Castro wrote:
> Document RZ/G2M (r8a774a1) SoC bindings.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> This patch applies on top of next-20180817
>
> Documentation/devicetree/bindings/net/can/rcar_can.txt | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> index 94a7f33..84afc78 100644
> --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
> +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> @@ -4,6 +4,7 @@ Renesas R-Car CAN controller Device Tree Bindings
> Required properties:
> - compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
> "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
> + "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
> "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
> "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
> "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
> @@ -16,7 +17,8 @@ Required properties:
> "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
> "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
> compatible device.
> - "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
> + "renesas,rcar-gen3-can" for a generic R-Car Gen3 or RZ/G2
> + compatible device.
> When compatible with the generic version, nodes must list the
> SoC-specific version corresponding to the platform first
> followed by the generic version.
> @@ -24,7 +26,9 @@ Required properties:
> - reg: physical base address and size of the R-Car CAN register map.
> - interrupts: interrupt specifier for the sole interrupt.
> - clocks: phandles and clock specifiers for 3 CAN clock inputs.
> -- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
> +- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk", and
Minor comment: Personally I would start a new sentence at "and".
Question: Is a driver update required so support 2-clock SoCs?
> + 3 clock input name strings for every other SoC: "clkp1", "clkp2",
> + "can_clk".
> - pinctrl-0: pin control group to be used for this controller.
> - pinctrl-names: must be "default".
>
> --
> 2.7.4
>
^ permalink raw reply
* [PATCH] sch_cake: Fix TC filter flow override and expand it to hosts as well
From: Toke Høiland-Jørgensen @ 2018-08-22 10:29 UTC (permalink / raw)
To: netdev; +Cc: cake
The TC filter flow mapping override completely skipped the call to
cake_hash(); however that meant that the internal state was not being
updated, which ultimately leads to deadlocks in some configurations. Fix
that by passing the overridden flow ID into cake_hash() instead so it can
react appropriately.
In addition, the major number of the class ID can now be set to override
the host mapping in host isolation mode. If both host and flow are
overridden (or if the respective modes are disabled), flow dissection and
hashing will be skipped entirely; otherwise, the hashing will be kept for
the portions that are not set by the filter.
Signed-off-by: Toke Høiland-Jørgensen <toke@toke.dk>
---
net/sched/sch_cake.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/net/sched/sch_cake.c b/net/sched/sch_cake.c
index 35fc7252187c..6bdf6ba06775 100644
--- a/net/sched/sch_cake.c
+++ b/net/sched/sch_cake.c
@@ -621,15 +621,20 @@ static bool cake_ddst(int flow_mode)
}
static u32 cake_hash(struct cake_tin_data *q, const struct sk_buff *skb,
- int flow_mode)
+ int flow_mode, u16 flow_override, u16 host_override)
{
- u32 flow_hash = 0, srchost_hash, dsthost_hash;
+ u32 flow_hash = 0, srchost_hash = 0, dsthost_hash = 0;
u16 reduced_hash, srchost_idx, dsthost_idx;
struct flow_keys keys, host_keys;
if (unlikely(flow_mode == CAKE_FLOW_NONE))
return 0;
+ /* If both overrides are set we can skip packet dissection entirely */
+ if ((flow_override || !(flow_mode & CAKE_FLOW_FLOWS)) &&
+ (host_override || !(flow_mode & CAKE_FLOW_HOSTS)))
+ goto skip_hash;
+
skb_flow_dissect_flow_keys(skb, &keys,
FLOW_DISSECTOR_F_STOP_AT_FLOW_LABEL);
@@ -676,6 +681,14 @@ static u32 cake_hash(struct cake_tin_data *q, const struct sk_buff *skb,
if (flow_mode & CAKE_FLOW_FLOWS)
flow_hash = flow_hash_from_keys(&keys);
+skip_hash:
+ if (flow_override)
+ flow_hash = flow_override - 1;
+ if (host_override) {
+ dsthost_hash = host_override - 1;
+ srchost_hash = host_override - 1;
+ }
+
if (!(flow_mode & CAKE_FLOW_FLOWS)) {
if (flow_mode & CAKE_FLOW_SRC_IP)
flow_hash ^= srchost_hash;
@@ -1571,7 +1584,7 @@ static u32 cake_classify(struct Qdisc *sch, struct cake_tin_data **t,
struct cake_sched_data *q = qdisc_priv(sch);
struct tcf_proto *filter;
struct tcf_result res;
- u32 flow = 0;
+ u16 flow = 0, host = 0;
int result;
filter = rcu_dereference_bh(q->filter_list);
@@ -1595,10 +1608,12 @@ static u32 cake_classify(struct Qdisc *sch, struct cake_tin_data **t,
#endif
if (TC_H_MIN(res.classid) <= CAKE_QUEUES)
flow = TC_H_MIN(res.classid);
+ if (TC_H_MAJ(res.classid) <= (CAKE_QUEUES << 16))
+ host = TC_H_MAJ(res.classid) >> 16;
}
hash:
*t = cake_select_tin(sch, skb);
- return flow ?: cake_hash(*t, skb, flow_mode) + 1;
+ return cake_hash(*t, skb, flow_mode, flow, host) + 1;
}
static void cake_reconfigure(struct Qdisc *sch);
^ permalink raw reply related
* Re: [endianness bug] cxgb4: mk_act_open_req() buggers ->{local,peer}_ip on big-endian hosts
From: Ganesh Goudar @ 2018-08-22 10:29 UTC (permalink / raw)
To: Al Viro; +Cc: Rahul Lakkireddy, David Miller, netdev@vger.kernel.org
In-Reply-To: <20180817194410.GH6515@ZenIV.linux.org.uk>
Hi Al,
All the issues you have mentioned make sense to me, I will fix them
and try to have them tested on big endian machine.
I got all the patches from net-endian.chelsio they all look good,
But I am yet to go through
(struct cxgb4_next_header .match_val/.match_mask/mask should be net-endian).
regarding "le64_to_cpu(*src)", I think we have not tested our vf driver on
a big endian machine. will address this as well.
Thanks
Ganesh
^ permalink raw reply
* (unknown),
From: системы администратор @ 2018-08-22 9:07 UTC (permalink / raw)
--
внимания;
Ваши сообщения превысил лимит памяти, который составляет 5 Гб, определенных администратором, который в настоящее время работает на 10.9GB, Вы не сможете отправить или получить новую почту, пока вы повторно не проверить ваш почтовый ящик почты. Чтобы восстановить работоспособность Вашего почтового ящика, отправьте следующую информацию ниже:
имя:
Имя пользователя:
пароль:
Подтверждение пароля:
Адрес электронной почты:
телефон:
Если вы не в состоянии перепроверить сообщения, ваш почтовый ящик будет отключен!
Приносим извинения за неудобства.
Проверочный код: EN: Ru...776774990..2018
Почты технической поддержки ©2018
^ permalink raw reply
* [PATCH v2] Revert "net: stmmac: fix build failure due to missing COMMON_CLK dependency"
From: Geert Uytterhoeven @ 2018-08-22 13:27 UTC (permalink / raw)
To: David S . Miller
Cc: Giuseppe Cavallaro, Alexandre Torgue, Jose Abreu, Arnd Bergmann,
netdev, linux-kernel, Geert Uytterhoeven
This reverts commit bde4975310eb1982bd0bbff673989052d92fd481.
All legacy clock implementations now implement clk_set_rate() (Some
implementations may be dummies, though).
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arnd.de>
Acked-by: Jose Abreu <joabreu@synopsys.com>
---
Marked "RFC", as this depends on "m68k: coldfire: Normalize clk API" and
"MIPS: AR7: Normalize clk API".
v2:
- Add Acked-by,
- Dropped RFC state, as all dependencies are now upstream:
- commit eec85fa9d98a889e ("m68k: coldfire: Normalize clk API"),
- commit 6b5939d2e528525a ("MIPS: AR7: Normalize clk API").
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index edf20361ea5f15c7..bf4acebb6bcddd88 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -33,7 +33,7 @@ config DWMAC_DWC_QOS_ETH
select PHYLIB
select CRC32
select MII
- depends on OF && COMMON_CLK && HAS_DMA
+ depends on OF && HAS_DMA
help
Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
@@ -57,7 +57,7 @@ config DWMAC_ANARION
config DWMAC_IPQ806X
tristate "QCA IPQ806x DWMAC support"
default ARCH_QCOM
- depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
+ depends on OF && (ARCH_QCOM || COMPILE_TEST)
select MFD_SYSCON
help
Support for QCA IPQ806X DWMAC Ethernet.
@@ -100,7 +100,7 @@ config DWMAC_OXNAS
config DWMAC_ROCKCHIP
tristate "Rockchip dwmac support"
default ARCH_ROCKCHIP
- depends on OF && COMMON_CLK && (ARCH_ROCKCHIP || COMPILE_TEST)
+ depends on OF && (ARCH_ROCKCHIP || COMPILE_TEST)
select MFD_SYSCON
help
Support for Ethernet controller on Rockchip RK3288 SoC.
@@ -123,7 +123,7 @@ config DWMAC_SOCFPGA
config DWMAC_STI
tristate "STi GMAC support"
default ARCH_STI
- depends on OF && COMMON_CLK && (ARCH_STI || COMPILE_TEST)
+ depends on OF && (ARCH_STI || COMPILE_TEST)
select MFD_SYSCON
---help---
Support for ethernet controller on STi SOCs.
@@ -147,7 +147,7 @@ config DWMAC_STM32
config DWMAC_SUNXI
tristate "Allwinner GMAC support"
default ARCH_SUNXI
- depends on OF && COMMON_CLK && (ARCH_SUNXI || COMPILE_TEST)
+ depends on OF && (ARCH_SUNXI || COMPILE_TEST)
---help---
Support for Allwinner A20/A31 GMAC ethernet controllers.
--
2.17.1
^ permalink raw reply related
* [PATCH] brcmfmac: fix wrong strnchr usage
From: Rasmus Villemoes @ 2018-08-22 13:22 UTC (permalink / raw)
To: Kalle Valo, David S. Miller
Cc: netdev, linux-kernel, linux-wireless, Rasmus Villemoes
strnchr takes arguments in the order of its name: string, max bytes to
read, character to search for. Here we're passing '\n' aka 10 as the
buffer size, and searching for sizeof(buf) aka BRCMF_DCMD_SMLEN aka
256 (aka '\0', since it's implicitly converted to char) within those 10
bytes.
Just interchanging the last two arguments would still leave a bug,
because if we've been successful once, there are not sizeof(buf)
characters left after the new value of p.
Since clmver is immediately afterwards passed as a %s argument, I assume
that it is actually a properly nul-terminated string. For that case, we
have strreplace().
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
Incidentally, I found this because I was looking at our strnchr
implementation and noticed a corner case: strchr() is specified by C and
POSIX standards to consider the trailing '\0' to be part of the string,
so strchr(foo, '\0') must be equivalent to "foo +
strlen(foo)". strnchr() is not specified by anyone. Our implementation
returns NULL as soon as count is depleted or hitting a '\0' byte, so
since we were here looking for a '\0' byte, the first strnchr() call was
guaranteed to return NULL.
Had strnchr() instead returned a pointer to the '\0' if such was found
within the first count (in this case 10) bytes, we'd be overwriting that
with a ' ', and continue until no '\0' was found within the next 10
bytes.
drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
index cd3651069d0c..94044a7a6021 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c
@@ -296,9 +296,7 @@ int brcmf_c_preinit_dcmds(struct brcmf_if *ifp)
/* Replace all newline/linefeed characters with space
* character
*/
- ptr = clmver;
- while ((ptr = strnchr(ptr, '\n', sizeof(buf))) != NULL)
- *ptr = ' ';
+ strreplace(clmver, '\n', ' ');
brcmf_dbg(INFO, "CLM version = %s\n", clmver);
}
--
2.16.4
^ permalink raw reply related
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