* Re: Re: BUG: corrupted list in p9_read_work
From: Dominique Martinet @ 2018-10-10 16:00 UTC (permalink / raw)
To: syzbot
Cc: davem, dvyukov, ericvh, linux-kernel, lucho, netdev, rminnich,
syzkaller-bugs, v9fs-developer
In-Reply-To: <00000000000010889e0577e0f5f2@google.com>
syzbot wrote on Wed, Oct 10, 2018:
>>> But note that syzbot can test fixes itself on request. It boils down
>>> to just giving it the patch and the base tree:
>>> https://github.com/google/syzkaller/blob/master/docs/syzbot.md#testing-patches
>
>> .. and for clarifying that bit, let's try that! :)
>
>> #syz test: git://github.com/martinetd/linux
>> e4ca13f7d075e551dc158df6af18fb412a1dba0a
>
> "git://github.com/martinetd/linux" does not look like a valid git
> repo address.
It works though, is it just picky because I didn't end it in .git? let's
try again, sorry for the noise...
#syz test: git://github.com/martinetd/linux.git e4ca13f7d075e551dc158df6af18fb412a1dba0a
--
Dominique
^ permalink raw reply
* Re: BUG: corrupted list in p9_read_work
From: Dominique Martinet @ 2018-10-10 15:58 UTC (permalink / raw)
To: Dmitry Vyukov
Cc: Leon Romanovsky, syzbot, David Miller, Eric Van Hensbergen, LKML,
Latchesar Ionkov, netdev, Ron Minnich, syzkaller-bugs,
v9fs-developer
In-Reply-To: <CACT4Y+Zx5nDN-H8WfC4WtgK7YeAWZig9WsDr1J4DXZBZb+vgWQ@mail.gmail.com>
Dmitry Vyukov wrote on Wed, Oct 10, 2018:
> > The problem is that you can't just give the client a file like trans fd;
> > you'd need to open an ""rdma socket"" (simplifying wording a bit), and
> > afaik there is no standard tool for it ; or rather, the problem is that
> > RDMA is packet based so even if there were you can't just write stuff
> > in a fd and hope it'll work, so you need a server.
> >
> > If you're interested, 9p is trivial enough that I could provide you with
> > a trivial server that works like your file (just need to reimplement
> > something that parses header to packetize it properly; so you could
> > write to its stdin for example) ; that'd require some setup in the VM
> > (configure rxe and install that tool), but it would definitely be
> > possible.
> > What do you think ?
>
> I would like to hear more details.
> Opening a socket is not a problem. Why do we need a tool for this?
Sorry, that's my head thinking unixy and piping things :)
> I don't understand the problem with "packet-based" and what does it
> mean to have a separate server? Any why?
Packet-based means you can't just read/write in a fd and expect the
other side to know where to cut the packets to send it to the client,
but if we do it internally there's no problem. We know where to cut.
> We definitely don't want to involve a separate third-party server,
> that's very problematic for multiple reasons. But we can have a chunk
> of custom C code inside of syzkaller.
> What exactly setup we need?
The setup itself isn't that bad, it's actually pretty much trivial - on
a fedora VM I just had to run 'rxe_cfg start ens3' (virtio interface
name) and then the infiniband tools are happy e.g. ibv_devinfo should
list an interface if you have the userspace library that should have
come with rxe_cfg.
(specifically, my VM uses /etc/libibverbs.d/rxe.driver to point to the
lib, and /usr/lib64/libibverbs/librxe-rdmav16.so the lib itself)
Once tools like ibv_devinfo list the interface, it means syzkaller can
use it, and very probably means the kernel can as well; that's it.
> I guess it will make things simpler if you provide some kind of "hello
> world" C program that mounts 9p/rdma. I don't need exact messages
> (they will be same as with pipe transport, right?) nor actual server
> implementation, but just the place where to inject these packets.
That's still the tricky part, I'm afraid... Making a separate server
would have been easy because I could have reused some of my junk for the
actual connection handling (some rdma helper library I wrote ages
ago[1]), but if you're going to just embed C code you'll probably want
something lower level? I've never seen syzkaller use any library call
but I'm not even sure I would know how to create a qp without
libibverbs, would standard stuff be OK ?
I think the interface improved quite a bit since I last looked at it so
I'll need a bit of time to figure it out again but I'll send you a
simple conection with a few messages soonish™
[1] https://github.com/cea-hpc/mooshika
--
Dominique
^ permalink raw reply
* Re: [PATCH v2 lora-next 1/4] net: lora: sx1301: convert burst spi functions to regmap raw
From: Andreas Färber @ 2018-10-10 7:59 UTC (permalink / raw)
To: Ben Whitten, Mark Brown
Cc: starnight, hasnain.virk, netdev, liuxuenetmail, shess,
Ben Whitten, linux-spi@vger.kernel.org, Stefan Popa
In-Reply-To: <1539089532-2481-2-git-send-email-ben.whitten@lairdtech.com>
Hi Ben and Mark,
Am 09.10.18 um 14:52 schrieb Ben Whitten:
> As we have caching disabled we can access the regmap using raw for our
> firmware reading and writing bursts.
> We also remove the now defunct spi element from the structure as this
> completes the move to regmap.
>
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
> drivers/net/lora/sx1301.c | 26 +++++++++++++++++---------
> drivers/net/lora/sx1301.h | 2 --
> 2 files changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/lora/sx1301.c b/drivers/net/lora/sx1301.c
> index fd29258..5ab0e2d 100644
> --- a/drivers/net/lora/sx1301.c
> +++ b/drivers/net/lora/sx1301.c
> @@ -76,19 +76,28 @@ static struct regmap_config sx1301_regmap_config = {
>
> static int sx1301_read_burst(struct sx1301_priv *priv, u8 reg, u8 *val, size_t len)
> {
> - u8 addr = reg & 0x7f;
> - return spi_write_then_read(priv->spi, &addr, 1, val, len);
> + size_t max;
> +
> + max = regmap_get_raw_read_max(priv->regmap);
> + if (max && max < len) {
> + dev_err(priv->dev, "Burst greater then max raw read\n");
> + return -EINVAL;
> + }
> +
> + return regmap_raw_read(priv->regmap, reg, val, len);
I believe the way we are using it with a single register needs
regmap_noinc_read() instead, in case we ever want to enable caching? ...
> }
>
> static int sx1301_write_burst(struct sx1301_priv *priv, u8 reg, const u8 *val, size_t len)
> {
> - u8 addr = reg | BIT(7);
> - struct spi_transfer xfr[2] = {
> - { .tx_buf = &addr, .len = 1 },
> - { .tx_buf = val, .len = len },
> - };
> + size_t max;
> +
> + max = regmap_get_raw_write_max(priv->regmap);
> + if (max && max < len) {
> + dev_err(priv->dev, "Burst greater then max raw write\n");
> + return -EINVAL;
> + }
>
> - return spi_sync_transfer(priv->spi, xfr, 2);
> + return regmap_raw_write(priv->regmap, reg, val, len);
... Which would mean we are lacking a noinc API for write here!
@Mark/Stefan, any reason noinc was not implemented symmetrically?
For sx1276 I have local regmap conversion patches, but I kept getting
-EINVAL for bursts and haven't figured out why yet. Need to compare to
your code - I assume you successfully tested this, Ben.
Regards,
Andreas
> }
>
> static int sx1301_soft_reset(struct sx1301_priv *priv)
> @@ -566,7 +575,6 @@ static int sx1301_probe(struct spi_device *spi)
>
> spi_set_drvdata(spi, netdev);
> priv->dev = &spi->dev;
> - priv->spi = spi;
>
> priv->regmap = devm_regmap_init_spi(spi, &sx1301_regmap_config);
> if (IS_ERR(priv->regmap)) {
> diff --git a/drivers/net/lora/sx1301.h b/drivers/net/lora/sx1301.h
> index e939c02..e6400f8 100644
> --- a/drivers/net/lora/sx1301.h
> +++ b/drivers/net/lora/sx1301.h
> @@ -12,7 +12,6 @@
> #include <linux/regmap.h>
> #include <linux/gpio/consumer.h>
> #include <linux/lora/dev.h>
> -#include <linux/spi/spi.h>
>
> #define SX1301_CHIP_VERSION 103
>
> @@ -64,7 +63,6 @@
> struct sx1301_priv {
> struct lora_dev_priv lora;
> struct device *dev;
> - struct spi_device *spi;
> struct gpio_desc *rst_gpio;
> struct regmap *regmap;
> };
>
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH v8 10/15] octeontx2-af: Reconfig MSIX base with IOVA
From: Arnd Bergmann @ 2018-10-10 7:58 UTC (permalink / raw)
To: Sunil Kovvuri; +Cc: Networking, David Miller, linux-soc, gakula, sgoutham
In-Reply-To: <CA+sq2CcknQ1W+KjdXwSagv2O8=XEH6qm1ssj-8D1wy+3FuVuJw@mail.gmail.com>
On Wed, Oct 10, 2018 at 9:36 AM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
> On Tue, Oct 9, 2018 at 5:30 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > On Tue, Oct 9, 2018 at 11:20 AM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
> > > On Tue, Oct 9, 2018 at 1:27 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > > > On Tue, Oct 9, 2018 at 9:03 AM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
> > > > > On Mon, Oct 8, 2018 at 5:38 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > > > > > On Sun, Oct 7, 2018 at 5:01 PM <sunil.kovvuri@gmail.com> wrote:
> > > > I think if you enable CONFIG_DEBUG_VIRTUAL, the virt_to_page()
> > > > above should trigger a warning in
> > > >
> > > > phys_addr_t __virt_to_phys(unsigned long x)
> > > > {
> > > > WARN(!__is_lm_address(x),
> > > > "virt_to_phys used for non-linear address: %pK (%pS)\n",
> > > > (void *)x,
> > > > (void *)x);
> > > >
> > > > return __virt_to_phys_nodebug(x);
> > > > }
> > > >
> > > > Can you verify that?
> > >
> > > No, it isn't, as for 64bit systems CONFIG_SPARSEMEM_VMEMMAP is enabled.
> >
> > But that is also user-selectable, right? It still seems to be really
> > fragile to rely on non-documented behavior of virt_to_phys()
> > here, if that only works for some configurations.
> >
> > > But is there any alternative to what is being done ?
> >
> > I'm not completely sure, but there may be a way to do this correctly
> > using the iommu API instead of the dma-mapping API. What you do
> > here is fairly rare, but not unprecedented.
>
> After further checking the only way i found is using dma_map_resource() which
> accepts physical address and creates a mapping. Will test and submit next series
> with the changes.
Ah, perfect. I remember having seen this in the past, but forgot about
it when commenting here. This should be the correct way to do it. If
it doesn't work, we need to fix the implementation.
Arnd
^ permalink raw reply
* Re: [PATCH net-next 05/19] net: usb: aqc111: Introduce PHY access
From: Igor Russkikh @ 2018-10-10 7:54 UTC (permalink / raw)
To: Andrew Lunn
Cc: David S . Miller, linux-usb@vger.kernel.org,
netdev@vger.kernel.org, Dmitry Bezrukov
In-Reply-To: <20181010005852.GA20147@lunn.ch>
On 10.10.2018 03:58, Andrew Lunn wrote:
>
> I just discovered driver_priv.
>
> https://elixir.bootlin.com/linux/v4.19-rc7/source/include/linux/usb/usbnet.h#L33
>
> It would be good to use that, to avoid the casts.
Looks good to me, thanks.
Regards,
Igor
^ permalink raw reply
* Re: [PATCH v8 10/15] octeontx2-af: Reconfig MSIX base with IOVA
From: Sunil Kovvuri @ 2018-10-10 7:35 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Linux Netdev List, David S. Miller, linux-soc, Geetha sowjanya,
Sunil Goutham
In-Reply-To: <CAK8P3a21m8Uw6JkjU2-eG9p4yzcpiqgR5PcFeATX9+SbUMqGSg@mail.gmail.com>
On Tue, Oct 9, 2018 at 5:30 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> On Tue, Oct 9, 2018 at 11:20 AM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
> >
> > On Tue, Oct 9, 2018 at 1:27 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > >
> > > On Tue, Oct 9, 2018 at 9:03 AM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
> > > > On Mon, Oct 8, 2018 at 5:38 PM Arnd Bergmann <arnd@arndb.de> wrote:
> > > > > On Sun, Oct 7, 2018 at 5:01 PM <sunil.kovvuri@gmail.com> wrote:
> > > I think if you enable CONFIG_DEBUG_VIRTUAL, the virt_to_page()
> > > above should trigger a warning in
> > >
> > > phys_addr_t __virt_to_phys(unsigned long x)
> > > {
> > > WARN(!__is_lm_address(x),
> > > "virt_to_phys used for non-linear address: %pK (%pS)\n",
> > > (void *)x,
> > > (void *)x);
> > >
> > > return __virt_to_phys_nodebug(x);
> > > }
> > >
> > > Can you verify that?
> > >
> > > Arnd
> >
> > No, it isn't, as for 64bit systems CONFIG_SPARSEMEM_VMEMMAP is enabled.
>
> But that is also user-selectable, right? It still seems to be really
> fragile to rely on non-documented behavior of virt_to_phys()
> here, if that only works for some configurations.
>
> > But is there any alternative to what is being done ?
>
> I'm not completely sure, but there may be a way to do this correctly
> using the iommu API instead of the dma-mapping API. What you do
> here is fairly rare, but not unprecedented.
>
> Arnd
After further checking the only way i found is using dma_map_resource() which
accepts physical address and creates a mapping. Will test and submit next series
with the changes.
Thanks,
Sunil.
^ permalink raw reply
* Re: [PATCH] qtnfmac: avoid uninitialized variable access
From: Sergey Matyukevich @ 2018-10-10 14:56 UTC (permalink / raw)
To: Kalle Valo
Cc: Igor Mitsyanko, Arnd Bergmann, Igor Mitsyanko, Avinash Patil,
Sergey Matyukevich, Kalle Valo, David S. Miller,
Andrey Shevchenko, linux-wireless@vger.kernel.org,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <20181009202507.xs5bcaq5pi4zcps3@bars>
> > When qtnf_trans_send_cmd_with_resp() fails, we have not yet initialized
> > 'resp', as pointed out by a valid gcc warning:
> >
> > drivers/net/wireless/quantenna/qtnfmac/commands.c: In function 'qtnf_cmd_send_with_reply':
> > drivers/net/wireless/quantenna/qtnfmac/commands.c:133:54: error: 'resp' may be used uninitialized in this function [-Werror=maybe-uninitialized]
> >
> > Since 'resp_skb' is also not set here, we can skip all further
> > processing and just print the warning and return the failure code.
> >
> > Fixes: c6ed298ffe09 ("qtnfmac: cleanup and unify command error handling")
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> Thanks for the patch! And for reminding me that I forgot to enable
> gcc warnings in CI builds in addition to sparse checks.
>
> Reviewed-by: Sergey Matyukevich <sergey.matyukevich.os@quantenna.com>
Hi Kalle,
Could you please hold back applying this patch for now. We have got
another report for the same function, this time static analysis tool
warning. It looks like the patch from Arnd does not cover both cases.
So we will take a closer look and send a combined fix later.
Regards,
Sergey
^ permalink raw reply
* Re: Re: BUG: corrupted list in p9_read_work
From: syzbot @ 2018-10-10 14:49 UTC (permalink / raw)
To: Dominique Martinet
Cc: asmadeus, davem, dvyukov, ericvh, linux-kernel, lucho, netdev,
rminnich, syzkaller-bugs, v9fs-developer
In-Reply-To: <20181010144855.GB20918@nautica>
> Dmitry Vyukov wrote on Wed, Oct 10, 2018:
>> > Back to the current patch, since as I said I am not confident this is a
>> > good enough fix for the current bug, will I get notified if the bug
>> > happens again once the patch hits linux-next with the Reported-by tag ?
>> > (I don't have the setup necessary to run a syz repro as there is no C
>> > repro, and won't have much time to do that setup sorry)
>> Yes, the bug will be reported again if it still happens after the
>> patch is merged (not just into linux-next, but into all tested trees,
>> but it does not matter much). So marking bugs as fixed tentatively is
>> fine if that's our best guess.
> Ok, thanks for confirming...
>> But note that syzbot can test fixes itself on request. It boils down
>> to just giving it the patch and the base tree:
>> https://github.com/google/syzkaller/blob/master/docs/syzbot.md#testing-patches
> .. and for clarifying that bit, let's try that! :)
> #syz test: git://github.com/martinetd/linux
> e4ca13f7d075e551dc158df6af18fb412a1dba0a
"git://github.com/martinetd/linux" does not look like a valid git repo
address.
> --
> Dominique
^ permalink raw reply
* Re: BUG: corrupted list in p9_read_work
From: Dominique Martinet @ 2018-10-10 14:48 UTC (permalink / raw)
To: Dmitry Vyukov
Cc: syzbot, David Miller, Eric Van Hensbergen, LKML, Latchesar Ionkov,
netdev, Ron Minnich, syzkaller-bugs, v9fs-developer
In-Reply-To: <CACT4Y+Y0JS17HaC8u6f2jz_wSuLnSTbUrGmMpN+fH2FT3H2cYQ@mail.gmail.com>
Dmitry Vyukov wrote on Wed, Oct 10, 2018:
> > Back to the current patch, since as I said I am not confident this is a
> > good enough fix for the current bug, will I get notified if the bug
> > happens again once the patch hits linux-next with the Reported-by tag ?
> > (I don't have the setup necessary to run a syz repro as there is no C
> > repro, and won't have much time to do that setup sorry)
>
> Yes, the bug will be reported again if it still happens after the
> patch is merged (not just into linux-next, but into all tested trees,
> but it does not matter much). So marking bugs as fixed tentatively is
> fine if that's our best guess.
Ok, thanks for confirming...
> But note that syzbot can test fixes itself on request. It boils down
> to just giving it the patch and the base tree:
> https://github.com/google/syzkaller/blob/master/docs/syzbot.md#testing-patches
.. and for clarifying that bit, let's try that! :)
#syz test: git://github.com/martinetd/linux e4ca13f7d075e551dc158df6af18fb412a1dba0a
--
Dominique
^ permalink raw reply
* Re: [PATCH net-next] net: mscc: allow extracting the FCS into the skb
From: Antoine Tenart @ 2018-10-10 14:46 UTC (permalink / raw)
To: Andrew Lunn
Cc: Antoine Tenart, Florian Fainelli, davem, netdev, linux-kernel,
thomas.petazzoni, alexandre.belloni, quentin.schulz,
allan.nielsen
In-Reply-To: <20181002124323.GC9155@lunn.ch>
Hi all,
On Tue, Oct 02, 2018 at 02:43:23PM +0200, Andrew Lunn wrote:
> > The question could be "do we need len += ETH_FCS_LEN" to account for the
> > FCS when NETIF_F_RXFCS is used", but I looked at other drivers and it
> > seemed to me the FCS is not accounted in the stats. Should it be?
>
> There does not appear to be a good answer to that. I submitted a patch
> to a driver i'm using to not count it, so that the stats counters we
> consistent with another driver. The patch was rejected.
>
> I think the best you can do is flip a coin, and then document it using
> a comment about if it is/is not included.
I'll leave it as-is then :)
@Dave, Florian: it seems to me no modification was requested after
discussing those changes. Where do we stand regarding the patch?
Thanks!
Antoine
--
Antoine Ténart, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH 0/4] Add SOCFPGA System Manager
From: Thor Thayer @ 2018-10-10 14:42 UTC (permalink / raw)
To: lee.jones, peppe.cavallaro, dinguyen, linux, alexandre.torgue,
joabreu
Cc: davem, mchehab+samsung, catalin.marinas, akpm, arnd, aisheng.dong,
linux-kernel, netdev, linux-arm-kernel
In-Reply-To: <1537826946-18942-1-git-send-email-thor.thayer@linux.intel.com>
Hi
On 09/24/2018 05:09 PM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
>
> Add MFD driver for ARM64 SOCFPGA System Manager to steer
> System Manager calls appropriately.
> The SOCFPGA System Manager includes registers from several
> SOC peripherals.
>
> On ARM32, syscon handles this aggregated register grouping.
> Redirect System Manager calls to syscon for ARM32 SOCFPGA
> systems.
>
> The ARM64 System Manager can only be accessed from priority
> level EL3 so this new MFD driver handles the calls to EL3.
>
> Thor Thayer (4):
> mfd: altera-sysmgr: Add SOCFPGA System Manager abstraction
> ARM: socfpga_defconfig: Enable CONFIG_MTD_ALTERA_SYSMGR
> arm64: defconfig: Enable CONFIG_MTD_ALTERA_SYSMGR
> net: stmmac: socfpga: Convert to shared System Manager driver
>
> MAINTAINERS | 6 +
> arch/arm/configs/socfpga_defconfig | 1 +
> arch/arm64/configs/defconfig | 1 +
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 1 +
> drivers/mfd/altera-sysmgr.c | 310 +++++++++++++++++++++
> .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 4 +-
> include/linux/mfd/altera-sysmgr.h | 113 ++++++++
> 8 files changed, 444 insertions(+), 1 deletion(-)
> create mode 100644 drivers/mfd/altera-sysmgr.c
> create mode 100644 include/linux/mfd/altera-sysmgr.h
>
Gentle ping.
Thor
^ permalink raw reply
* Re: BUG: corrupted list in p9_read_work
From: Dominique Martinet @ 2018-10-10 14:40 UTC (permalink / raw)
To: Dmitry Vyukov
Cc: Leon Romanovsky, syzbot, David Miller, Eric Van Hensbergen, LKML,
Latchesar Ionkov, netdev, Ron Minnich, syzkaller-bugs,
v9fs-developer
In-Reply-To: <CACT4Y+bv5dWx0JwCzTPD3mWJRaMHOtRVcvpV5fdQ5KS7zAF_fA@mail.gmail.com>
Dmitry Vyukov wrote on Wed, Oct 10, 2018:
> How can they be faked?
> If we could create a private rdma/virtio stub instance per test
> process, then we could I think easily use that instance for 9p. But is
> it possible?
"RDMA" itself can be faked pretty easily nowadays, there's a "rxe"
driver that is soft RDMA over ethernet and can run over anything.
The problem is that you can't just give the client a file like trans fd;
you'd need to open an ""rdma socket"" (simplifying wording a bit), and
afaik there is no standard tool for it ; or rather, the problem is that
RDMA is packet based so even if there were you can't just write stuff
in a fd and hope it'll work, so you need a server.
If you're interested, 9p is trivial enough that I could provide you with
a trivial server that works like your file (just need to reimplement
something that parses header to packetize it properly; so you could
write to its stdin for example) ; that'd require some setup in the VM
(configure rxe and install that tool), but it would definitely be
possible.
What do you think ?
For virtio, I'm not as familiar with the environment so I do not know if
there are ways to fake it as easily unfortunately.
> Testing on real hardware is mostly outside of our priorities at the
> moment. I mean syzkaller itself can be run on anything, and one could
> extend descriptions to use a known rdma interface and run on a real
> hardware. But we can't afford this at the moment.
Sure, I understand that.
> As far as I understand RDMA maintainers run syzkaller on real
> hardware, but I don't know if they are up to including 9p into
> testing. +Leon
I'd be interested in knowing what kind of tests runs there :)
--
Dominique Martinet
^ permalink raw reply
* [PATCH] Bluetooth: Remove redundant check on status
From: Colin King @ 2018-10-10 14:37 UTC (permalink / raw)
To: Marcel Holtmann, Johan Hedberg, David S . Miller, linux-bluetooth,
netdev
Cc: kernel-janitors, linux-kernel
From: Colin Ian King <colin.king@canonical.com>
The check on statis is redundant as a status has to be zero at
the point it is being checked because of a previous check and return
path via label 'unlock'. Remove the redundant check and the deadcode
that can never be reached.
Detected by CoverityScan, CID#1471710 ("Logically dead code")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
net/bluetooth/hci_event.c | 38 +++++++++++++++++---------------------
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index f47f8fad757a..ef9928d7b4fb 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -4937,31 +4937,27 @@ static void le_conn_complete_evt(struct hci_dev *hdev, u8 status,
hci_debugfs_create_conn(conn);
hci_conn_add_sysfs(conn);
- if (!status) {
- /* The remote features procedure is defined for master
- * role only. So only in case of an initiated connection
- * request the remote features.
- *
- * If the local controller supports slave-initiated features
- * exchange, then requesting the remote features in slave
- * role is possible. Otherwise just transition into the
- * connected state without requesting the remote features.
- */
- if (conn->out ||
- (hdev->le_features[0] & HCI_LE_SLAVE_FEATURES)) {
- struct hci_cp_le_read_remote_features cp;
+ /* The remote features procedure is defined for master
+ * role only. So only in case of an initiated connection
+ * request the remote features.
+ *
+ * If the local controller supports slave-initiated features
+ * exchange, then requesting the remote features in slave
+ * role is possible. Otherwise just transition into the
+ * connected state without requesting the remote features.
+ */
+ if (conn->out ||
+ (hdev->le_features[0] & HCI_LE_SLAVE_FEATURES)) {
+ struct hci_cp_le_read_remote_features cp;
- cp.handle = __cpu_to_le16(conn->handle);
+ cp.handle = __cpu_to_le16(conn->handle);
- hci_send_cmd(hdev, HCI_OP_LE_READ_REMOTE_FEATURES,
- sizeof(cp), &cp);
+ hci_send_cmd(hdev, HCI_OP_LE_READ_REMOTE_FEATURES,
+ sizeof(cp), &cp);
- hci_conn_hold(conn);
- } else {
- conn->state = BT_CONNECTED;
- hci_connect_cfm(conn, status);
- }
+ hci_conn_hold(conn);
} else {
+ conn->state = BT_CONNECTED;
hci_connect_cfm(conn, status);
}
--
2.17.1
^ permalink raw reply related
* Re: [virtio-dev] Re: [PATCH net-next v2 0/5] virtio: support packed ring
From: Michael S. Tsirkin @ 2018-10-10 14:36 UTC (permalink / raw)
To: Jason Wang
Cc: Tiwei Bie, virtualization, linux-kernel, netdev, virtio-dev, wexu,
jfreimann
In-Reply-To: <98d6bd4d-45e2-4207-e961-782f649e0139@redhat.com>
On Thu, Sep 13, 2018 at 05:47:29PM +0800, Jason Wang wrote:
>
>
> On 2018年09月13日 16:59, Tiwei Bie wrote:
> > > If what you say is true then we should take a careful look
> > > and not supporting these generic things with packed layout.
> > > Once we do support them it will be too late and we won't
> > > be able to get performance back.
> > I think it's a good point that we don't need to support
> > everything in packed ring (especially these which would
> > hurt the performance), as the packed ring aims at high
> > performance. I'm also wondering about the features. Is
> > there any possibility that we won't support the out of
> > order processing (at least not by default) in packed ring?
> > If I didn't miss anything, the need to support out of order
> > processing in packed ring will make the data structure
> > inside the driver not cache friendly which is similar to
> > the case of the descriptor table in the split ring (the
> > difference is that, it only happens in driver now).
>
> Out of order is not the only user, DMA is another one. We don't have used
> ring(len), so we need to maintain buffer length somewhere even for in order
> device.
For a bunch of systems dma unmap is a nop so we do not really
need to maintain it. It's a question of an API to detect that
and optimize for it. I posted a proposed patch for that -
want to try using that?
> But if it's not too late, I second for a OUT_OF_ORDER feature.
> Starting from in order can have much simpler code in driver.
>
> Thanks
It's tricky to change the flag polarity because of compatibility
with legacy interfaces. Why is this such a big deal?
Let's teach drivers about IN_ORDER, then if devices
are in order it will get enabled by default.
--
MST
^ permalink raw reply
* Re: BUG: corrupted list in p9_read_work
From: Dmitry Vyukov @ 2018-10-10 14:29 UTC (permalink / raw)
To: Dominique Martinet
Cc: syzbot, David Miller, Eric Van Hensbergen, LKML, Latchesar Ionkov,
netdev, Ron Minnich, syzkaller-bugs, v9fs-developer
In-Reply-To: <20181009020949.GA29622@nautica>
On Tue, Oct 9, 2018 at 4:09 AM, Dominique Martinet
<asmadeus@codewreck.org> wrote:
> syzbot wrote on Mon, Oct 08, 2018:
>> syzbot has found a reproducer for the following crash on:
>>
>> HEAD commit: 0854ba5ff5c9 Merge git://git.kernel.org/pub/scm/linux/kern..
>> git tree: upstream
>> console output: https://syzkaller.appspot.com/x/log.txt?x=1514ec06400000
>> kernel config: https://syzkaller.appspot.com/x/.config?x=88e9a8a39dc0be2d
>> dashboard link: https://syzkaller.appspot.com/bug?extid=2222c34dc40b515f30dc
>> compiler: gcc (GCC) 8.0.1 20180413 (experimental)
>> syz repro: https://syzkaller.appspot.com/x/repro.syz?x=10b91685400000
>>
>> IMPORTANT: if you fix the bug, please add the following tag to the commit:
>> Reported-by: syzbot+2222c34dc40b515f30dc@syzkaller.appspotmail.com
>>
>> list_del corruption, ffff88019ae36ee8->next is LIST_POISON1
>> (dead000000000100)
>> ------------[ cut here ]------------
>> [...]
>> list_del include/linux/list.h:125 [inline]
>> p9_read_work+0xab6/0x10e0 net/9p/trans_fd.c:379
>
> Hmm this looks very much like the report from
> syzbot+735d926e9d1317c3310c@syzkaller.appspotmail.com
> which should have been fixed by Tomas in 9f476d7c540cb
> ("net/9p/trans_fd.c: fix race by holding the lock")...
>
> It looks like another double list_del, looking at the code again there
> actually are other ways this could happen around connection errors.
> For example,
> - p9_read_work receives something and lookup works... meanwhile
> - p9_write_work fails to write and calls p9_conn_cancel, which deletes
> from the req_list without waiting for other works to finish (could also
> happen in p9_poll_mux)
> - p9_read_work finishes processing the read and deletes from list again
>
> For this one the simplest fix would probably be to just not
> list_del/call p9_client_cb at all if m->r?req->status isn't
> REQ_STATUS_ERROR in p9_read_work after the "got new packet" debug print,
> and frankly I think that's saner so I'll send a patch shortly doing
> that, but I have zero confidence there aren't similar bugs around, the
> tcp code is so messy... Most of the syzbot reports recently have been
> around trans_fd which I don't think is used much in real life, and this
> is not really motivating (i.e. I think it would probably need a more
> extensive rewrite but nobody cares) :/
>
>
> Dmitry, on that note, do you think syzbot could possibly test other
> transports somehow? rdma or virtio cannot be faked as easily as passing
> a fd around, but I'd be very interested in seeing these flayed a bit.
>
> (I'm also curious what logic is used to generate the syz tests, the
> write$P9_Rxx replies have nothing to do with what the client would
> expect so it probably doesn't test very far; this test in particular
> does not even get past the initial P9_TVERSION that the client would
> expect immediately after mount, so it's basically only testing logic
> around packet handling on error... Or if we're accepting a RREADDIR in
> reply to TVERSION we have bigger problems, and now I'm looking at it I
> think we just might never check that....... I'll look at that for the
> next cycle)
>
>
> Back to the current patch, since as I said I am not confident this is a
> good enough fix for the current bug, will I get notified if the bug
> happens again once the patch hits linux-next with the Reported-by tag ?
> (I don't have the setup necessary to run a syz repro as there is no C
> repro, and won't have much time to do that setup sorry)
Yes, the bug will be reported again if it still happens after the
patch is merged (not just into linux-next, but into all tested trees,
but it does not matter much). So marking bugs as fixed tentatively is
fine if that's our best guess.
But note that syzbot can test fixes itself on request. It boils down
to just giving it the patch and the base tree:
https://github.com/google/syzkaller/blob/master/docs/syzbot.md#testing-patches
^ permalink raw reply
* [PATCH] selftests: bpf: install script with_addr.sh
From: Anders Roxell @ 2018-10-10 14:27 UTC (permalink / raw)
To: ast, daniel, shuah; +Cc: netdev, linux-kernel, linux-kselftest, Anders Roxell
When test_flow_dissector.sh runs it complains that it can't find script
with_addr.sh:
./test_flow_dissector.sh: line 81: ./with_addr.sh: No such file or
directory
Rework so that with_addr.sh gets installed, add it to
TEST_PROGS_EXTENDED variable.
Fixes: 50b3ed57dee9 ("selftests/bpf: test bpf flow dissection")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
---
tools/testing/selftests/bpf/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile
index 1381ab81099c..efd108ff737d 100644
--- a/tools/testing/selftests/bpf/Makefile
+++ b/tools/testing/selftests/bpf/Makefile
@@ -51,6 +51,8 @@ TEST_PROGS := test_kmod.sh \
test_skb_cgroup_id.sh \
test_flow_dissector.sh
+TEST_PROGS_EXTENDED := with_addr.sh
+
# Compile but not part of 'make run_tests'
TEST_GEN_PROGS_EXTENDED = test_libbpf_open test_sock_addr test_skb_cgroup_id_user \
flow_dissector_load test_flow_dissector
--
2.19.1
^ permalink raw reply related
* [RFC PATCH 3/3] can: tcan4x5x: Add tcan4x5x driver to the kernel
From: Dan Murphy @ 2018-10-10 14:20 UTC (permalink / raw)
To: wg, mkl, davem; +Cc: linux-can, netdev, linux-kernel, Dan Murphy
In-Reply-To: <20181010142055.25271-1-dmurphy@ti.com>
Add the TCAN4x5x SPI CAN driver. This device
uses the Bosch MCAN IP core along with a SPI
interface map. Leverage the MCAN common core
code to manage the MCAN IP.
This device has a special method to indicate a
write/read operation on the data payload.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
---
drivers/net/can/m_can/Kconfig | 6 +
drivers/net/can/m_can/Makefile | 1 +
drivers/net/can/m_can/tcan4x5x.c | 321 +++++++++++++++++++++++++++++++
3 files changed, 328 insertions(+)
create mode 100644 drivers/net/can/m_can/tcan4x5x.c
diff --git a/drivers/net/can/m_can/Kconfig b/drivers/net/can/m_can/Kconfig
index b1a9358b7660..943e10e15f17 100644
--- a/drivers/net/can/m_can/Kconfig
+++ b/drivers/net/can/m_can/Kconfig
@@ -15,3 +15,9 @@ config CAN_M_CAN_PLATFORM
tristate "Bosch M_CAN devices"
---help---
Say Y here if you want to support for Bosch M_CAN controller.
+
+config CAN_M_CAN_TCAN4X5X
+ depends on CAN_M_CAN_CORE
+ tristate "TCAN4X5X M_CAN device"
+ ---help---
+ Say Y here if you want to support for TI M_CAN controller.
diff --git a/drivers/net/can/m_can/Makefile b/drivers/net/can/m_can/Makefile
index e013d6f4c941..6a9584908d10 100644
--- a/drivers/net/can/m_can/Makefile
+++ b/drivers/net/can/m_can/Makefile
@@ -4,3 +4,4 @@
obj-$(CONFIG_CAN_M_CAN_CORE) += m_can_core.o
obj-$(CONFIG_CAN_M_CAN_PLATFORM) += m_can.o
+obj-$(CONFIG_CAN_M_CAN_TCAN4X5X) += tcan4x5x.o
diff --git a/drivers/net/can/m_can/tcan4x5x.c b/drivers/net/can/m_can/tcan4x5x.c
new file mode 100644
index 000000000000..e43d591c696d
--- /dev/null
+++ b/drivers/net/can/m_can/tcan4x5x.c
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPI to CAN driver for the Texas Instruments TCAN4x5x
+// Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include <linux/regulator/consumer.h>
+#include <linux/gpio/consumer.h>
+
+#include "m_can_core.h"
+
+#define DEVICE_NAME "tcan4x5x"
+#define TCAN4X5X_EXT_CLK_DEF 40000000
+
+#define TCAN4X5X_DEV_ID0 0x00
+#define TCAN4X5X_DEV_ID1 0x04
+#define TCAN4X5X_REV 0x08
+#define TCAN4X5X_STATUS 0x0C
+#define TCAN4X5X_ERROR_STATUS 0x10
+#define TCAN4X5X_CONTROL 0x14
+
+#define TCAN4X5X_CONFIG 0x800
+#define TCAN4X5X_TS_PRESCALE 0x804
+#define TCAN4X5X_TEST_REG 0x808
+#define TCAN4X5X_INT_FLAGS 0x820
+#define TCAN4X5X_MCAN_INT_REG 0x824
+#define TCAN4X5X_INT_EN 0x830
+
+#define TCAN4X5X_MRAM_START 0x8000
+
+#define TCAN4X5X_MAX_REGISTER 0x8fff
+
+#define TCAN4X5X_WRITE_CMD (0x61 << 24)
+#define TCAN4X5X_READ_CMD (0x41 << 24)
+
+struct tcan4x5x_priv {
+ struct regmap *regmap;
+ struct spi_device *spi;
+ struct mutex tcan4x5x_lock; /* SPI device lock */
+
+ struct gpio_desc *reset_gpio;
+ struct gpio_desc *interrupt_gpio;
+ struct gpio_desc *wake_gpio;
+ struct regulator *power;
+};
+
+static int regmap_spi_gather_write(void *context, const void *reg,
+ size_t reg_len, const void *val,
+ size_t val_len)
+{
+ struct device *dev = context;
+ struct spi_device *spi = to_spi_device(dev);
+ u32 addr;
+ struct spi_message m;
+ struct spi_transfer t[2] = {{ .tx_buf = &addr, .len = 4, .cs_change = 0,},
+ { .tx_buf = val, .len = val_len, },};
+
+ addr = TCAN4X5X_WRITE_CMD | (*((u16 *)reg) << 8) | val_len >> 2;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&t[0], &m);
+ spi_message_add_tail(&t[1], &m);
+
+ return spi_sync(spi, &m);
+}
+
+static int tcan4x5x_regmap_write(void *context, const void *data, size_t count)
+{
+ u16 *reg = (u16 *)(data);
+ const u32 *val = data + 2;
+
+ return regmap_spi_gather_write(context, reg, 2, val, count - 2);
+}
+
+static int regmap_spi_async_write(void *context,
+ const void *reg, size_t reg_len,
+ const void *val, size_t val_len,
+ struct regmap_async *a)
+{
+ return -ENOTSUPP;
+}
+
+static struct regmap_async *regmap_spi_async_alloc(void)
+{
+ return NULL;
+}
+
+static int tcan4x5x_regmap_read(void *context,
+ const void *reg, size_t reg_size,
+ void *val, size_t val_size)
+{
+ struct device *dev = context;
+ struct spi_device *spi = to_spi_device(dev);
+
+ u32 addr = TCAN4X5X_READ_CMD | (*((u16 *)reg) << 8) | val_size >> 2;
+
+ return spi_write_then_read(spi, &addr, 4, val, val_size);
+}
+
+static struct regmap_bus tcan4x5x_bus = {
+ .write = tcan4x5x_regmap_write,
+ .gather_write = regmap_spi_gather_write,
+ .async_write = regmap_spi_async_write,
+ .async_alloc = regmap_spi_async_alloc,
+ .read = tcan4x5x_regmap_read,
+ .read_flag_mask = 0x00,
+ .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
+ .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
+};
+
+u32 tcan4x5x_read_reg(const struct m_can_classdev *m_can_class, int reg)
+{
+ struct tcan4x5x_priv *priv = (struct tcan4x5x_priv *)m_can_class->device_data;
+ u32 val;
+
+ regmap_read(priv->regmap, reg, &val);
+
+ return val;
+}
+
+u32 tcan4x5x_read_fifo(const struct m_can_classdev *m_can_class, int reg)
+{
+ struct tcan4x5x_priv *priv = (struct tcan4x5x_priv *)m_can_class->device_data;
+ u32 val;
+
+ regmap_read(priv->regmap, reg, &val);
+
+ return val;
+}
+
+int tcan4x5x_write_reg(const struct m_can_classdev *m_can_class, int reg, int val)
+{
+ struct tcan4x5x_priv *priv = (struct tcan4x5x_priv *)m_can_class->device_data;
+
+ return regmap_write(priv->regmap, reg, val);
+}
+
+int tcan4x5x_write_fifo(const struct m_can_classdev *m_can_class, int reg, int val)
+{
+ struct tcan4x5x_priv *priv = (struct tcan4x5x_priv *)m_can_class->device_data;
+
+ return regmap_write(priv->regmap, reg, val);
+}
+
+static int tcan4x5x_power_enable(struct regulator *reg, int enable)
+{
+ if (IS_ERR_OR_NULL(reg))
+ return 0;
+
+ if (enable)
+ return regulator_enable(reg);
+ else
+ return regulator_disable(reg);
+}
+
+static int tcan4x5x_init(struct m_can_classdev *class_dev)
+{
+ /* Zero out the MCAN buffers */
+ m_can_init_ram(class_dev);
+
+ return 0;
+}
+
+static int tcan4x5x_parse_config(struct m_can_classdev *class_dev)
+{
+ struct tcan4x5x_priv *tcan4x5x = (struct tcan4x5x_priv *)class_dev->device_data;
+
+ tcan4x5x->reset_gpio = devm_gpiod_get_optional(class_dev->dev,
+ "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(tcan4x5x->reset_gpio))
+ tcan4x5x->reset_gpio = NULL;
+
+ tcan4x5x->wake_gpio = devm_gpiod_get_optional(class_dev->dev,
+ "wake-up", GPIOD_OUT_LOW);
+ if (IS_ERR(tcan4x5x->wake_gpio))
+ tcan4x5x->wake_gpio = NULL;
+
+ tcan4x5x->interrupt_gpio = devm_gpiod_get(class_dev->dev,
+ "data-ready", GPIOD_IN);
+ if (IS_ERR(tcan4x5x->interrupt_gpio)) {
+ dev_err(class_dev->dev, "data-ready gpio not defined\n");
+ return -EINVAL;
+ }
+
+ class_dev->net->irq = gpiod_to_irq(tcan4x5x->interrupt_gpio);
+
+ tcan4x5x->power = devm_regulator_get_optional(class_dev->dev,
+ "vsup");
+ if (PTR_ERR(tcan4x5x->power) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
+ return 0;
+}
+
+static const struct regmap_config tcan4x5x_regmap = {
+ .reg_bits = 16,
+ .val_bits = 32,
+ .cache_type = REGCACHE_NONE,
+ .max_register = TCAN4X5X_MAX_REGISTER,
+};
+
+static int tcan4x5x_can_probe(struct spi_device *spi)
+{
+ struct tcan4x5x_priv *priv;
+ struct m_can_classdev *mcan_class;
+ int freq, ret;
+
+ mcan_class = m_can_core_allocate_dev(&spi->dev);
+ priv = devm_kzalloc(&spi->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ mcan_class->device_data = priv;
+
+ m_can_core_get_clocks(mcan_class);
+ if (IS_ERR(mcan_class->cclk)) {
+ dev_err(&spi->dev, "no CAN clock source defined\n");
+ freq = TCAN4X5X_EXT_CLK_DEF;
+ } else {
+ freq = clk_get_rate(mcan_class->cclk);
+ }
+
+ /* Sanity check */
+ if (freq < 20000000 || freq > TCAN4X5X_EXT_CLK_DEF)
+ return -ERANGE;
+
+ mcan_class->reg_offset = 0x1000;
+ mcan_class->pm_clock_support = 0;
+ mcan_class->mram_start = TCAN4X5X_MRAM_START;
+ mcan_class->m_can_read = &tcan4x5x_read_reg;
+ mcan_class->m_can_write = &tcan4x5x_write_reg;
+ mcan_class->m_can_fifo_write = &tcan4x5x_write_fifo;
+ mcan_class->m_can_fifo_read = &tcan4x5x_read_fifo;
+
+ mcan_class->can.clock.freq = freq;
+
+ mcan_class->dev = &spi->dev;
+ spi_set_drvdata(spi, priv);
+
+ ret = tcan4x5x_parse_config(mcan_class);
+ if (ret)
+ goto out_clk;
+
+ /* Configure the SPI bus */
+ spi->bits_per_word = 32;
+ ret = spi_setup(spi);
+ if (ret)
+ goto out_clk;
+
+ priv->regmap = devm_regmap_init(&spi->dev, &tcan4x5x_bus,
+ &spi->dev, &tcan4x5x_regmap);
+
+ tcan4x5x_init(mcan_class);
+
+ m_can_core_register(mcan_class);
+
+ mutex_init(&priv->tcan4x5x_lock);
+
+ netdev_info(mcan_class->net, "TCAN4X5X successfully initialized.\n");
+ return 0;
+
+out_clk:
+ if (!IS_ERR(mcan_class->cclk)) {
+ clk_disable_unprepare(mcan_class->cclk);
+ clk_disable_unprepare(mcan_class->hclk);
+ }
+
+ free_candev(mcan_class->net);
+ dev_err(&spi->dev, "Probe failed, err=%d\n", -ret);
+ return ret;
+}
+
+static int tcan4x5x_can_remove(struct spi_device *spi)
+{
+#if 0
+ struct tcan4x5x_priv *priv = spi_get_drvdata(spi);
+ struct net_device *net = mcan_class->net;
+
+ unregister_candev(net);
+
+ tcan4x5x_power_enable(priv->power, 0);
+
+ if (!IS_ERR(mcan_class->cclk))
+ clk_disable_unprepare(mcan_class->cclk);
+
+ free_candev(net);
+#endif
+ return 0;
+}
+
+static const struct of_device_id tcan4x5x_of_match[] = {
+ { .compatible = "ti,tcan4x5x", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, tcan4x5x_of_match);
+
+static const struct spi_device_id tcan4x5x_id_table[] = {
+ {
+ .name = "tcan4x5x",
+ .driver_data = 0,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(spi, tcan4x5x_id_table);
+
+static struct spi_driver tcan4x5x_can_driver = {
+ .driver = {
+ .name = DEVICE_NAME,
+ .of_match_table = tcan4x5x_of_match,
+ .pm = NULL,
+ },
+ .id_table = tcan4x5x_id_table,
+ .probe = tcan4x5x_can_probe,
+ .remove = tcan4x5x_can_remove,
+};
+module_spi_driver(tcan4x5x_can_driver);
+
+MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
+MODULE_DESCRIPTION("Texas Instruments TCAN4x5x CAN driver");
+MODULE_LICENSE("GPL v2");
--
2.19.0
^ permalink raw reply related
* [RFC PATCH 2/3] dt-bindings: can: tcan4x5x: Add DT bindings for TCAN4x5X driver
From: Dan Murphy @ 2018-10-10 14:20 UTC (permalink / raw)
To: wg, mkl, davem; +Cc: linux-can, netdev, linux-kernel, Dan Murphy
In-Reply-To: <20181010142055.25271-1-dmurphy@ti.com>
DT binding documentation for TI TCAN4x5x driver.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
---
.../devicetree/bindings/net/can/tcan4x5x.txt | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/can/tcan4x5x.txt
diff --git a/Documentation/devicetree/bindings/net/can/tcan4x5x.txt b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt
new file mode 100644
index 000000000000..c742d0f10861
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/tcan4x5x.txt
@@ -0,0 +1,34 @@
+Texas Instruments TCAN4x5x CAN Controller
+================================================
+
+This file provides device node information for the TCAN4x5x interface contains.
+
+Required properties:
+ - compatible: "ti,tcan4x5x"
+ - reg: 0
+ - #address-cells : 1
+ - #size-cells : 0
+ - spi-max-frequency: Maximum frequency of the SPI bus the chip can
+ operate at should be less than or equal to 18 MHz.
+ - data-ready-gpios: Interrupt GPIO for data and error reporting.
+ - wake-up-gpios: Wake up GPIO to wake up the TCAN device
+
+See Documentation/devicetree/bindings/net/can/m_can.txt for additional
+required property details.
+
+Optional properties:
+ - reset-gpios: Hardwired output GPIO. If not defined then software
+ reset.
+
+Example:
+tcan4x5x: tcan4x5x@0 {
+ compatible = "ti,tcan4x5x";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&tclkin_ck>;
+ spi-max-frequency = <10000000>;
+ data-ready-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ wake-up-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+ };
--
2.19.0
^ permalink raw reply related
* [RFC PATCH 1/3] can: m_can: Create m_can core to leverage common code
From: Dan Murphy @ 2018-10-10 14:20 UTC (permalink / raw)
To: wg, mkl, davem; +Cc: linux-can, netdev, linux-kernel, Dan Murphy
In-Reply-To: <20181010142055.25271-1-dmurphy@ti.com>
Create a common code base that can be leveraged by other
devices that use the Bosch MCAN IP.
The common code manages the MCAN IP as well as registering
the CAN device.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
---
drivers/net/can/m_can/Kconfig | 12 +
drivers/net/can/m_can/Makefile | 3 +-
drivers/net/can/m_can/m_can.c | 1683 +----------------
.../net/can/m_can/{m_can.c => m_can_core.c} | 479 +++--
drivers/net/can/m_can/m_can_core.h | 100 +
5 files changed, 360 insertions(+), 1917 deletions(-)
copy drivers/net/can/m_can/{m_can.c => m_can_core.c} (83%)
create mode 100644 drivers/net/can/m_can/m_can_core.h
diff --git a/drivers/net/can/m_can/Kconfig b/drivers/net/can/m_can/Kconfig
index 04f20dd39007..b1a9358b7660 100644
--- a/drivers/net/can/m_can/Kconfig
+++ b/drivers/net/can/m_can/Kconfig
@@ -1,5 +1,17 @@
config CAN_M_CAN
+ tristate "Bosch M_CAN support"
+ ---help---
+ Say Y here if you want to support for Bosch M_CAN controller.
+
+config CAN_M_CAN_CORE
+ depends on CAN_M_CAN
+ tristate "Bosch M_CAN Core support"
+ ---help---
+ Say Y here if you want to support for Bosch M_CAN controller.
+
+config CAN_M_CAN_PLATFORM
depends on HAS_IOMEM
+ depends on CAN_M_CAN_CORE
tristate "Bosch M_CAN devices"
---help---
Say Y here if you want to support for Bosch M_CAN controller.
diff --git a/drivers/net/can/m_can/Makefile b/drivers/net/can/m_can/Makefile
index 8bbd7f24f5be..e013d6f4c941 100644
--- a/drivers/net/can/m_can/Makefile
+++ b/drivers/net/can/m_can/Makefile
@@ -2,4 +2,5 @@
# Makefile for the Bosch M_CAN controller driver.
#
-obj-$(CONFIG_CAN_M_CAN) += m_can.o
+obj-$(CONFIG_CAN_M_CAN_CORE) += m_can_core.o
+obj-$(CONFIG_CAN_M_CAN_PLATFORM) += m_can.o
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 9b449400376b..079cb31d2da3 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -14,1590 +14,34 @@
*/
#include <linux/clk.h>
-#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/netdevice.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
-#include <linux/iopoll.h>
#include <linux/can/dev.h>
#include <linux/pinctrl/consumer.h>
-/* napi related */
-#define M_CAN_NAPI_WEIGHT 64
-
-/* message ram configuration data length */
-#define MRAM_CFG_LEN 8
-
-/* registers definition */
-enum m_can_reg {
- M_CAN_CREL = 0x0,
- M_CAN_ENDN = 0x4,
- M_CAN_CUST = 0x8,
- M_CAN_DBTP = 0xc,
- M_CAN_TEST = 0x10,
- M_CAN_RWD = 0x14,
- M_CAN_CCCR = 0x18,
- M_CAN_NBTP = 0x1c,
- M_CAN_TSCC = 0x20,
- M_CAN_TSCV = 0x24,
- M_CAN_TOCC = 0x28,
- M_CAN_TOCV = 0x2c,
- M_CAN_ECR = 0x40,
- M_CAN_PSR = 0x44,
-/* TDCR Register only available for version >=3.1.x */
- M_CAN_TDCR = 0x48,
- M_CAN_IR = 0x50,
- M_CAN_IE = 0x54,
- M_CAN_ILS = 0x58,
- M_CAN_ILE = 0x5c,
- M_CAN_GFC = 0x80,
- M_CAN_SIDFC = 0x84,
- M_CAN_XIDFC = 0x88,
- M_CAN_XIDAM = 0x90,
- M_CAN_HPMS = 0x94,
- M_CAN_NDAT1 = 0x98,
- M_CAN_NDAT2 = 0x9c,
- M_CAN_RXF0C = 0xa0,
- M_CAN_RXF0S = 0xa4,
- M_CAN_RXF0A = 0xa8,
- M_CAN_RXBC = 0xac,
- M_CAN_RXF1C = 0xb0,
- M_CAN_RXF1S = 0xb4,
- M_CAN_RXF1A = 0xb8,
- M_CAN_RXESC = 0xbc,
- M_CAN_TXBC = 0xc0,
- M_CAN_TXFQS = 0xc4,
- M_CAN_TXESC = 0xc8,
- M_CAN_TXBRP = 0xcc,
- M_CAN_TXBAR = 0xd0,
- M_CAN_TXBCR = 0xd4,
- M_CAN_TXBTO = 0xd8,
- M_CAN_TXBCF = 0xdc,
- M_CAN_TXBTIE = 0xe0,
- M_CAN_TXBCIE = 0xe4,
- M_CAN_TXEFC = 0xf0,
- M_CAN_TXEFS = 0xf4,
- M_CAN_TXEFA = 0xf8,
-};
-
-/* m_can lec values */
-enum m_can_lec_type {
- LEC_NO_ERROR = 0,
- LEC_STUFF_ERROR,
- LEC_FORM_ERROR,
- LEC_ACK_ERROR,
- LEC_BIT1_ERROR,
- LEC_BIT0_ERROR,
- LEC_CRC_ERROR,
- LEC_UNUSED,
-};
-
-enum m_can_mram_cfg {
- MRAM_SIDF = 0,
- MRAM_XIDF,
- MRAM_RXF0,
- MRAM_RXF1,
- MRAM_RXB,
- MRAM_TXE,
- MRAM_TXB,
- MRAM_CFG_NUM,
-};
-
-/* Core Release Register (CREL) */
-#define CREL_REL_SHIFT 28
-#define CREL_REL_MASK (0xF << CREL_REL_SHIFT)
-#define CREL_STEP_SHIFT 24
-#define CREL_STEP_MASK (0xF << CREL_STEP_SHIFT)
-#define CREL_SUBSTEP_SHIFT 20
-#define CREL_SUBSTEP_MASK (0xF << CREL_SUBSTEP_SHIFT)
-
-/* Data Bit Timing & Prescaler Register (DBTP) */
-#define DBTP_TDC BIT(23)
-#define DBTP_DBRP_SHIFT 16
-#define DBTP_DBRP_MASK (0x1f << DBTP_DBRP_SHIFT)
-#define DBTP_DTSEG1_SHIFT 8
-#define DBTP_DTSEG1_MASK (0x1f << DBTP_DTSEG1_SHIFT)
-#define DBTP_DTSEG2_SHIFT 4
-#define DBTP_DTSEG2_MASK (0xf << DBTP_DTSEG2_SHIFT)
-#define DBTP_DSJW_SHIFT 0
-#define DBTP_DSJW_MASK (0xf << DBTP_DSJW_SHIFT)
-
-/* Transmitter Delay Compensation Register (TDCR) */
-#define TDCR_TDCO_SHIFT 8
-#define TDCR_TDCO_MASK (0x7F << TDCR_TDCO_SHIFT)
-#define TDCR_TDCF_SHIFT 0
-#define TDCR_TDCF_MASK (0x7F << TDCR_TDCF_SHIFT)
-
-/* Test Register (TEST) */
-#define TEST_LBCK BIT(4)
-
-/* CC Control Register(CCCR) */
-#define CCCR_CMR_MASK 0x3
-#define CCCR_CMR_SHIFT 10
-#define CCCR_CMR_CANFD 0x1
-#define CCCR_CMR_CANFD_BRS 0x2
-#define CCCR_CMR_CAN 0x3
-#define CCCR_CME_MASK 0x3
-#define CCCR_CME_SHIFT 8
-#define CCCR_CME_CAN 0
-#define CCCR_CME_CANFD 0x1
-#define CCCR_CME_CANFD_BRS 0x2
-#define CCCR_TXP BIT(14)
-#define CCCR_TEST BIT(7)
-#define CCCR_MON BIT(5)
-#define CCCR_CSR BIT(4)
-#define CCCR_CSA BIT(3)
-#define CCCR_ASM BIT(2)
-#define CCCR_CCE BIT(1)
-#define CCCR_INIT BIT(0)
-#define CCCR_CANFD 0x10
-/* for version >=3.1.x */
-#define CCCR_EFBI BIT(13)
-#define CCCR_PXHD BIT(12)
-#define CCCR_BRSE BIT(9)
-#define CCCR_FDOE BIT(8)
-/* only for version >=3.2.x */
-#define CCCR_NISO BIT(15)
-
-/* Nominal Bit Timing & Prescaler Register (NBTP) */
-#define NBTP_NSJW_SHIFT 25
-#define NBTP_NSJW_MASK (0x7f << NBTP_NSJW_SHIFT)
-#define NBTP_NBRP_SHIFT 16
-#define NBTP_NBRP_MASK (0x1ff << NBTP_NBRP_SHIFT)
-#define NBTP_NTSEG1_SHIFT 8
-#define NBTP_NTSEG1_MASK (0xff << NBTP_NTSEG1_SHIFT)
-#define NBTP_NTSEG2_SHIFT 0
-#define NBTP_NTSEG2_MASK (0x7f << NBTP_NTSEG2_SHIFT)
-
-/* Error Counter Register(ECR) */
-#define ECR_RP BIT(15)
-#define ECR_REC_SHIFT 8
-#define ECR_REC_MASK (0x7f << ECR_REC_SHIFT)
-#define ECR_TEC_SHIFT 0
-#define ECR_TEC_MASK 0xff
-
-/* Protocol Status Register(PSR) */
-#define PSR_BO BIT(7)
-#define PSR_EW BIT(6)
-#define PSR_EP BIT(5)
-#define PSR_LEC_MASK 0x7
-
-/* Interrupt Register(IR) */
-#define IR_ALL_INT 0xffffffff
-
-/* Renamed bits for versions > 3.1.x */
-#define IR_ARA BIT(29)
-#define IR_PED BIT(28)
-#define IR_PEA BIT(27)
-
-/* Bits for version 3.0.x */
-#define IR_STE BIT(31)
-#define IR_FOE BIT(30)
-#define IR_ACKE BIT(29)
-#define IR_BE BIT(28)
-#define IR_CRCE BIT(27)
-#define IR_WDI BIT(26)
-#define IR_BO BIT(25)
-#define IR_EW BIT(24)
-#define IR_EP BIT(23)
-#define IR_ELO BIT(22)
-#define IR_BEU BIT(21)
-#define IR_BEC BIT(20)
-#define IR_DRX BIT(19)
-#define IR_TOO BIT(18)
-#define IR_MRAF BIT(17)
-#define IR_TSW BIT(16)
-#define IR_TEFL BIT(15)
-#define IR_TEFF BIT(14)
-#define IR_TEFW BIT(13)
-#define IR_TEFN BIT(12)
-#define IR_TFE BIT(11)
-#define IR_TCF BIT(10)
-#define IR_TC BIT(9)
-#define IR_HPM BIT(8)
-#define IR_RF1L BIT(7)
-#define IR_RF1F BIT(6)
-#define IR_RF1W BIT(5)
-#define IR_RF1N BIT(4)
-#define IR_RF0L BIT(3)
-#define IR_RF0F BIT(2)
-#define IR_RF0W BIT(1)
-#define IR_RF0N BIT(0)
-#define IR_ERR_STATE (IR_BO | IR_EW | IR_EP)
-
-/* Interrupts for version 3.0.x */
-#define IR_ERR_LEC_30X (IR_STE | IR_FOE | IR_ACKE | IR_BE | IR_CRCE)
-#define IR_ERR_BUS_30X (IR_ERR_LEC_30X | IR_WDI | IR_ELO | IR_BEU | \
- IR_BEC | IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | \
- IR_RF1L | IR_RF0L)
-#define IR_ERR_ALL_30X (IR_ERR_STATE | IR_ERR_BUS_30X)
-/* Interrupts for version >= 3.1.x */
-#define IR_ERR_LEC_31X (IR_PED | IR_PEA)
-#define IR_ERR_BUS_31X (IR_ERR_LEC_31X | IR_WDI | IR_ELO | IR_BEU | \
- IR_BEC | IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | \
- IR_RF1L | IR_RF0L)
-#define IR_ERR_ALL_31X (IR_ERR_STATE | IR_ERR_BUS_31X)
-
-/* Interrupt Line Select (ILS) */
-#define ILS_ALL_INT0 0x0
-#define ILS_ALL_INT1 0xFFFFFFFF
-
-/* Interrupt Line Enable (ILE) */
-#define ILE_EINT1 BIT(1)
-#define ILE_EINT0 BIT(0)
-
-/* Rx FIFO 0/1 Configuration (RXF0C/RXF1C) */
-#define RXFC_FWM_SHIFT 24
-#define RXFC_FWM_MASK (0x7f << RXFC_FWM_SHIFT)
-#define RXFC_FS_SHIFT 16
-#define RXFC_FS_MASK (0x7f << RXFC_FS_SHIFT)
-
-/* Rx FIFO 0/1 Status (RXF0S/RXF1S) */
-#define RXFS_RFL BIT(25)
-#define RXFS_FF BIT(24)
-#define RXFS_FPI_SHIFT 16
-#define RXFS_FPI_MASK 0x3f0000
-#define RXFS_FGI_SHIFT 8
-#define RXFS_FGI_MASK 0x3f00
-#define RXFS_FFL_MASK 0x7f
-
-/* Rx Buffer / FIFO Element Size Configuration (RXESC) */
-#define M_CAN_RXESC_8BYTES 0x0
-#define M_CAN_RXESC_64BYTES 0x777
-
-/* Tx Buffer Configuration(TXBC) */
-#define TXBC_NDTB_SHIFT 16
-#define TXBC_NDTB_MASK (0x3f << TXBC_NDTB_SHIFT)
-#define TXBC_TFQS_SHIFT 24
-#define TXBC_TFQS_MASK (0x3f << TXBC_TFQS_SHIFT)
-
-/* Tx FIFO/Queue Status (TXFQS) */
-#define TXFQS_TFQF BIT(21)
-#define TXFQS_TFQPI_SHIFT 16
-#define TXFQS_TFQPI_MASK (0x1f << TXFQS_TFQPI_SHIFT)
-#define TXFQS_TFGI_SHIFT 8
-#define TXFQS_TFGI_MASK (0x1f << TXFQS_TFGI_SHIFT)
-#define TXFQS_TFFL_SHIFT 0
-#define TXFQS_TFFL_MASK (0x3f << TXFQS_TFFL_SHIFT)
-
-/* Tx Buffer Element Size Configuration(TXESC) */
-#define TXESC_TBDS_8BYTES 0x0
-#define TXESC_TBDS_64BYTES 0x7
-
-/* Tx Event FIFO Configuration (TXEFC) */
-#define TXEFC_EFS_SHIFT 16
-#define TXEFC_EFS_MASK (0x3f << TXEFC_EFS_SHIFT)
-
-/* Tx Event FIFO Status (TXEFS) */
-#define TXEFS_TEFL BIT(25)
-#define TXEFS_EFF BIT(24)
-#define TXEFS_EFGI_SHIFT 8
-#define TXEFS_EFGI_MASK (0x1f << TXEFS_EFGI_SHIFT)
-#define TXEFS_EFFL_SHIFT 0
-#define TXEFS_EFFL_MASK (0x3f << TXEFS_EFFL_SHIFT)
-
-/* Tx Event FIFO Acknowledge (TXEFA) */
-#define TXEFA_EFAI_SHIFT 0
-#define TXEFA_EFAI_MASK (0x1f << TXEFA_EFAI_SHIFT)
-
-/* Message RAM Configuration (in bytes) */
-#define SIDF_ELEMENT_SIZE 4
-#define XIDF_ELEMENT_SIZE 8
-#define RXF0_ELEMENT_SIZE 72
-#define RXF1_ELEMENT_SIZE 72
-#define RXB_ELEMENT_SIZE 72
-#define TXE_ELEMENT_SIZE 8
-#define TXB_ELEMENT_SIZE 72
-
-/* Message RAM Elements */
-#define M_CAN_FIFO_ID 0x0
-#define M_CAN_FIFO_DLC 0x4
-#define M_CAN_FIFO_DATA(n) (0x8 + ((n) << 2))
-
-/* Rx Buffer Element */
-/* R0 */
-#define RX_BUF_ESI BIT(31)
-#define RX_BUF_XTD BIT(30)
-#define RX_BUF_RTR BIT(29)
-/* R1 */
-#define RX_BUF_ANMF BIT(31)
-#define RX_BUF_FDF BIT(21)
-#define RX_BUF_BRS BIT(20)
-
-/* Tx Buffer Element */
-/* T0 */
-#define TX_BUF_ESI BIT(31)
-#define TX_BUF_XTD BIT(30)
-#define TX_BUF_RTR BIT(29)
-/* T1 */
-#define TX_BUF_EFC BIT(23)
-#define TX_BUF_FDF BIT(21)
-#define TX_BUF_BRS BIT(20)
-#define TX_BUF_MM_SHIFT 24
-#define TX_BUF_MM_MASK (0xff << TX_BUF_MM_SHIFT)
-
-/* Tx event FIFO Element */
-/* E1 */
-#define TX_EVENT_MM_SHIFT TX_BUF_MM_SHIFT
-#define TX_EVENT_MM_MASK (0xff << TX_EVENT_MM_SHIFT)
-
-/* address offset and element number for each FIFO/Buffer in the Message RAM */
-struct mram_cfg {
- u16 off;
- u8 num;
-};
-
-/* m_can private data structure */
-struct m_can_priv {
- struct can_priv can; /* must be the first member */
- struct napi_struct napi;
- struct net_device *dev;
- struct device *device;
- struct clk *hclk;
- struct clk *cclk;
- void __iomem *base;
- u32 irqstatus;
- int version;
-
- /* message ram configuration */
- void __iomem *mram_base;
- struct mram_cfg mcfg[MRAM_CFG_NUM];
-};
-
-static inline u32 m_can_read(const struct m_can_priv *priv, enum m_can_reg reg)
-{
- return readl(priv->base + reg);
-}
-
-static inline void m_can_write(const struct m_can_priv *priv,
- enum m_can_reg reg, u32 val)
-{
- writel(val, priv->base + reg);
-}
-
-static inline u32 m_can_fifo_read(const struct m_can_priv *priv,
- u32 fgi, unsigned int offset)
-{
- return readl(priv->mram_base + priv->mcfg[MRAM_RXF0].off +
- fgi * RXF0_ELEMENT_SIZE + offset);
-}
-
-static inline void m_can_fifo_write(const struct m_can_priv *priv,
- u32 fpi, unsigned int offset, u32 val)
-{
- writel(val, priv->mram_base + priv->mcfg[MRAM_TXB].off +
- fpi * TXB_ELEMENT_SIZE + offset);
-}
-
-static inline u32 m_can_txe_fifo_read(const struct m_can_priv *priv,
- u32 fgi,
- u32 offset) {
- return readl(priv->mram_base + priv->mcfg[MRAM_TXE].off +
- fgi * TXE_ELEMENT_SIZE + offset);
-}
-
-static inline bool m_can_tx_fifo_full(const struct m_can_priv *priv)
-{
- return !!(m_can_read(priv, M_CAN_TXFQS) & TXFQS_TFQF);
-}
-
-static inline void m_can_config_endisable(const struct m_can_priv *priv,
- bool enable)
-{
- u32 cccr = m_can_read(priv, M_CAN_CCCR);
- u32 timeout = 10;
- u32 val = 0;
-
- if (enable) {
- /* enable m_can configuration */
- m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT);
- udelay(5);
- /* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */
- m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE);
- } else {
- m_can_write(priv, M_CAN_CCCR, cccr & ~(CCCR_INIT | CCCR_CCE));
- }
-
- /* there's a delay for module initialization */
- if (enable)
- val = CCCR_INIT | CCCR_CCE;
-
- while ((m_can_read(priv, M_CAN_CCCR) & (CCCR_INIT | CCCR_CCE)) != val) {
- if (timeout == 0) {
- netdev_warn(priv->dev, "Failed to init module\n");
- return;
- }
- timeout--;
- udelay(1);
- }
-}
-
-static inline void m_can_enable_all_interrupts(const struct m_can_priv *priv)
-{
- /* Only interrupt line 0 is used in this driver */
- m_can_write(priv, M_CAN_ILE, ILE_EINT0);
-}
-
-static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv)
-{
- m_can_write(priv, M_CAN_ILE, 0x0);
-}
-
-static void m_can_read_fifo(struct net_device *dev, u32 rxfs)
-{
- struct net_device_stats *stats = &dev->stats;
- struct m_can_priv *priv = netdev_priv(dev);
- struct canfd_frame *cf;
- struct sk_buff *skb;
- u32 id, fgi, dlc;
- int i;
-
- /* calculate the fifo get index for where to read data */
- fgi = (rxfs & RXFS_FGI_MASK) >> RXFS_FGI_SHIFT;
- dlc = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC);
- if (dlc & RX_BUF_FDF)
- skb = alloc_canfd_skb(dev, &cf);
- else
- skb = alloc_can_skb(dev, (struct can_frame **)&cf);
- if (!skb) {
- stats->rx_dropped++;
- return;
- }
-
- if (dlc & RX_BUF_FDF)
- cf->len = can_dlc2len((dlc >> 16) & 0x0F);
- else
- cf->len = get_can_dlc((dlc >> 16) & 0x0F);
-
- id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_ID);
- if (id & RX_BUF_XTD)
- cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG;
- else
- cf->can_id = (id >> 18) & CAN_SFF_MASK;
-
- if (id & RX_BUF_ESI) {
- cf->flags |= CANFD_ESI;
- netdev_dbg(dev, "ESI Error\n");
- }
-
- if (!(dlc & RX_BUF_FDF) && (id & RX_BUF_RTR)) {
- cf->can_id |= CAN_RTR_FLAG;
- } else {
- if (dlc & RX_BUF_BRS)
- cf->flags |= CANFD_BRS;
-
- for (i = 0; i < cf->len; i += 4)
- *(u32 *)(cf->data + i) =
- m_can_fifo_read(priv, fgi,
- M_CAN_FIFO_DATA(i / 4));
- }
-
- /* acknowledge rx fifo 0 */
- m_can_write(priv, M_CAN_RXF0A, fgi);
-
- stats->rx_packets++;
- stats->rx_bytes += cf->len;
-
- netif_receive_skb(skb);
-}
-
-static int m_can_do_rx_poll(struct net_device *dev, int quota)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- u32 pkts = 0;
- u32 rxfs;
-
- rxfs = m_can_read(priv, M_CAN_RXF0S);
- if (!(rxfs & RXFS_FFL_MASK)) {
- netdev_dbg(dev, "no messages in fifo0\n");
- return 0;
- }
-
- while ((rxfs & RXFS_FFL_MASK) && (quota > 0)) {
- if (rxfs & RXFS_RFL)
- netdev_warn(dev, "Rx FIFO 0 Message Lost\n");
-
- m_can_read_fifo(dev, rxfs);
-
- quota--;
- pkts++;
- rxfs = m_can_read(priv, M_CAN_RXF0S);
- }
-
- if (pkts)
- can_led_event(dev, CAN_LED_EVENT_RX);
-
- return pkts;
-}
-
-static int m_can_handle_lost_msg(struct net_device *dev)
-{
- struct net_device_stats *stats = &dev->stats;
- struct sk_buff *skb;
- struct can_frame *frame;
-
- netdev_err(dev, "msg lost in rxf0\n");
-
- stats->rx_errors++;
- stats->rx_over_errors++;
-
- skb = alloc_can_err_skb(dev, &frame);
- if (unlikely(!skb))
- return 0;
-
- frame->can_id |= CAN_ERR_CRTL;
- frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
-
- netif_receive_skb(skb);
-
- return 1;
-}
-
-static int m_can_handle_lec_err(struct net_device *dev,
- enum m_can_lec_type lec_type)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- struct net_device_stats *stats = &dev->stats;
- struct can_frame *cf;
- struct sk_buff *skb;
-
- priv->can.can_stats.bus_error++;
- stats->rx_errors++;
-
- /* propagate the error condition to the CAN stack */
- skb = alloc_can_err_skb(dev, &cf);
- if (unlikely(!skb))
- return 0;
-
- /* check for 'last error code' which tells us the
- * type of the last error to occur on the CAN bus
- */
- cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
-
- switch (lec_type) {
- case LEC_STUFF_ERROR:
- netdev_dbg(dev, "stuff error\n");
- cf->data[2] |= CAN_ERR_PROT_STUFF;
- break;
- case LEC_FORM_ERROR:
- netdev_dbg(dev, "form error\n");
- cf->data[2] |= CAN_ERR_PROT_FORM;
- break;
- case LEC_ACK_ERROR:
- netdev_dbg(dev, "ack error\n");
- cf->data[3] = CAN_ERR_PROT_LOC_ACK;
- break;
- case LEC_BIT1_ERROR:
- netdev_dbg(dev, "bit1 error\n");
- cf->data[2] |= CAN_ERR_PROT_BIT1;
- break;
- case LEC_BIT0_ERROR:
- netdev_dbg(dev, "bit0 error\n");
- cf->data[2] |= CAN_ERR_PROT_BIT0;
- break;
- case LEC_CRC_ERROR:
- netdev_dbg(dev, "CRC error\n");
- cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;
- break;
- default:
- break;
- }
-
- stats->rx_packets++;
- stats->rx_bytes += cf->can_dlc;
- netif_receive_skb(skb);
-
- return 1;
-}
-
-static int __m_can_get_berr_counter(const struct net_device *dev,
- struct can_berr_counter *bec)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- unsigned int ecr;
-
- ecr = m_can_read(priv, M_CAN_ECR);
- bec->rxerr = (ecr & ECR_REC_MASK) >> ECR_REC_SHIFT;
- bec->txerr = (ecr & ECR_TEC_MASK) >> ECR_TEC_SHIFT;
-
- return 0;
-}
-
-static int m_can_clk_start(struct m_can_priv *priv)
-{
- int err;
-
- err = pm_runtime_get_sync(priv->device);
- if (err < 0) {
- pm_runtime_put_noidle(priv->device);
- return err;
- }
-
- return 0;
-}
-
-static void m_can_clk_stop(struct m_can_priv *priv)
-{
- pm_runtime_put_sync(priv->device);
-}
-
-static int m_can_get_berr_counter(const struct net_device *dev,
- struct can_berr_counter *bec)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- int err;
-
- err = m_can_clk_start(priv);
- if (err)
- return err;
-
- __m_can_get_berr_counter(dev, bec);
-
- m_can_clk_stop(priv);
-
- return 0;
-}
-
-static int m_can_handle_state_change(struct net_device *dev,
- enum can_state new_state)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- struct net_device_stats *stats = &dev->stats;
- struct can_frame *cf;
- struct sk_buff *skb;
- struct can_berr_counter bec;
- unsigned int ecr;
-
- switch (new_state) {
- case CAN_STATE_ERROR_ACTIVE:
- /* error warning state */
- priv->can.can_stats.error_warning++;
- priv->can.state = CAN_STATE_ERROR_WARNING;
- break;
- case CAN_STATE_ERROR_PASSIVE:
- /* error passive state */
- priv->can.can_stats.error_passive++;
- priv->can.state = CAN_STATE_ERROR_PASSIVE;
- break;
- case CAN_STATE_BUS_OFF:
- /* bus-off state */
- priv->can.state = CAN_STATE_BUS_OFF;
- m_can_disable_all_interrupts(priv);
- priv->can.can_stats.bus_off++;
- can_bus_off(dev);
- break;
- default:
- break;
- }
-
- /* propagate the error condition to the CAN stack */
- skb = alloc_can_err_skb(dev, &cf);
- if (unlikely(!skb))
- return 0;
-
- __m_can_get_berr_counter(dev, &bec);
-
- switch (new_state) {
- case CAN_STATE_ERROR_ACTIVE:
- /* error warning state */
- cf->can_id |= CAN_ERR_CRTL;
- cf->data[1] = (bec.txerr > bec.rxerr) ?
- CAN_ERR_CRTL_TX_WARNING :
- CAN_ERR_CRTL_RX_WARNING;
- cf->data[6] = bec.txerr;
- cf->data[7] = bec.rxerr;
- break;
- case CAN_STATE_ERROR_PASSIVE:
- /* error passive state */
- cf->can_id |= CAN_ERR_CRTL;
- ecr = m_can_read(priv, M_CAN_ECR);
- if (ecr & ECR_RP)
- cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
- if (bec.txerr > 127)
- cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
- cf->data[6] = bec.txerr;
- cf->data[7] = bec.rxerr;
- break;
- case CAN_STATE_BUS_OFF:
- /* bus-off state */
- cf->can_id |= CAN_ERR_BUSOFF;
- break;
- default:
- break;
- }
-
- stats->rx_packets++;
- stats->rx_bytes += cf->can_dlc;
- netif_receive_skb(skb);
-
- return 1;
-}
-
-static int m_can_handle_state_errors(struct net_device *dev, u32 psr)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- int work_done = 0;
-
- if ((psr & PSR_EW) &&
- (priv->can.state != CAN_STATE_ERROR_WARNING)) {
- netdev_dbg(dev, "entered error warning state\n");
- work_done += m_can_handle_state_change(dev,
- CAN_STATE_ERROR_WARNING);
- }
-
- if ((psr & PSR_EP) &&
- (priv->can.state != CAN_STATE_ERROR_PASSIVE)) {
- netdev_dbg(dev, "entered error passive state\n");
- work_done += m_can_handle_state_change(dev,
- CAN_STATE_ERROR_PASSIVE);
- }
-
- if ((psr & PSR_BO) &&
- (priv->can.state != CAN_STATE_BUS_OFF)) {
- netdev_dbg(dev, "entered error bus off state\n");
- work_done += m_can_handle_state_change(dev,
- CAN_STATE_BUS_OFF);
- }
-
- return work_done;
-}
-
-static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus)
-{
- if (irqstatus & IR_WDI)
- netdev_err(dev, "Message RAM Watchdog event due to missing READY\n");
- if (irqstatus & IR_ELO)
- netdev_err(dev, "Error Logging Overflow\n");
- if (irqstatus & IR_BEU)
- netdev_err(dev, "Bit Error Uncorrected\n");
- if (irqstatus & IR_BEC)
- netdev_err(dev, "Bit Error Corrected\n");
- if (irqstatus & IR_TOO)
- netdev_err(dev, "Timeout reached\n");
- if (irqstatus & IR_MRAF)
- netdev_err(dev, "Message RAM access failure occurred\n");
-}
-
-static inline bool is_lec_err(u32 psr)
-{
- psr &= LEC_UNUSED;
-
- return psr && (psr != LEC_UNUSED);
-}
-
-static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,
- u32 psr)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- int work_done = 0;
-
- if (irqstatus & IR_RF0L)
- work_done += m_can_handle_lost_msg(dev);
-
- /* handle lec errors on the bus */
- if ((priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) &&
- is_lec_err(psr))
- work_done += m_can_handle_lec_err(dev, psr & LEC_UNUSED);
-
- /* other unproccessed error interrupts */
- m_can_handle_other_err(dev, irqstatus);
-
- return work_done;
-}
-
-static int m_can_poll(struct napi_struct *napi, int quota)
-{
- struct net_device *dev = napi->dev;
- struct m_can_priv *priv = netdev_priv(dev);
- int work_done = 0;
- u32 irqstatus, psr;
-
- irqstatus = priv->irqstatus | m_can_read(priv, M_CAN_IR);
- if (!irqstatus)
- goto end;
-
- psr = m_can_read(priv, M_CAN_PSR);
- if (irqstatus & IR_ERR_STATE)
- work_done += m_can_handle_state_errors(dev, psr);
-
- if (irqstatus & IR_ERR_BUS_30X)
- work_done += m_can_handle_bus_errors(dev, irqstatus, psr);
-
- if (irqstatus & IR_RF0N)
- work_done += m_can_do_rx_poll(dev, (quota - work_done));
-
- if (work_done < quota) {
- napi_complete_done(napi, work_done);
- m_can_enable_all_interrupts(priv);
- }
-
-end:
- return work_done;
-}
-
-static void m_can_echo_tx_event(struct net_device *dev)
-{
- u32 txe_count = 0;
- u32 m_can_txefs;
- u32 fgi = 0;
- int i = 0;
- unsigned int msg_mark;
-
- struct m_can_priv *priv = netdev_priv(dev);
- struct net_device_stats *stats = &dev->stats;
-
- /* read tx event fifo status */
- m_can_txefs = m_can_read(priv, M_CAN_TXEFS);
-
- /* Get Tx Event fifo element count */
- txe_count = (m_can_txefs & TXEFS_EFFL_MASK)
- >> TXEFS_EFFL_SHIFT;
-
- /* Get and process all sent elements */
- for (i = 0; i < txe_count; i++) {
- /* retrieve get index */
- fgi = (m_can_read(priv, M_CAN_TXEFS) & TXEFS_EFGI_MASK)
- >> TXEFS_EFGI_SHIFT;
-
- /* get message marker */
- msg_mark = (m_can_txe_fifo_read(priv, fgi, 4) &
- TX_EVENT_MM_MASK) >> TX_EVENT_MM_SHIFT;
-
- /* ack txe element */
- m_can_write(priv, M_CAN_TXEFA, (TXEFA_EFAI_MASK &
- (fgi << TXEFA_EFAI_SHIFT)));
-
- /* update stats */
- stats->tx_bytes += can_get_echo_skb(dev, msg_mark);
- stats->tx_packets++;
- }
-}
-
-static irqreturn_t m_can_isr(int irq, void *dev_id)
-{
- struct net_device *dev = (struct net_device *)dev_id;
- struct m_can_priv *priv = netdev_priv(dev);
- struct net_device_stats *stats = &dev->stats;
- u32 ir;
-
- ir = m_can_read(priv, M_CAN_IR);
- if (!ir)
- return IRQ_NONE;
-
- /* ACK all irqs */
- if (ir & IR_ALL_INT)
- m_can_write(priv, M_CAN_IR, ir);
-
- /* schedule NAPI in case of
- * - rx IRQ
- * - state change IRQ
- * - bus error IRQ and bus error reporting
- */
- if ((ir & IR_RF0N) || (ir & IR_ERR_ALL_30X)) {
- priv->irqstatus = ir;
- m_can_disable_all_interrupts(priv);
- napi_schedule(&priv->napi);
- }
-
- if (priv->version == 30) {
- if (ir & IR_TC) {
- /* Transmission Complete Interrupt*/
- stats->tx_bytes += can_get_echo_skb(dev, 0);
- stats->tx_packets++;
- can_led_event(dev, CAN_LED_EVENT_TX);
- netif_wake_queue(dev);
- }
- } else {
- if (ir & IR_TEFN) {
- /* New TX FIFO Element arrived */
- m_can_echo_tx_event(dev);
- can_led_event(dev, CAN_LED_EVENT_TX);
- if (netif_queue_stopped(dev) &&
- !m_can_tx_fifo_full(priv))
- netif_wake_queue(dev);
- }
- }
-
- return IRQ_HANDLED;
-}
-
-static const struct can_bittiming_const m_can_bittiming_const_30X = {
- .name = KBUILD_MODNAME,
- .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */
- .tseg1_max = 64,
- .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
- .tseg2_max = 16,
- .sjw_max = 16,
- .brp_min = 1,
- .brp_max = 1024,
- .brp_inc = 1,
-};
-
-static const struct can_bittiming_const m_can_data_bittiming_const_30X = {
- .name = KBUILD_MODNAME,
- .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */
- .tseg1_max = 16,
- .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
- .tseg2_max = 8,
- .sjw_max = 4,
- .brp_min = 1,
- .brp_max = 32,
- .brp_inc = 1,
-};
-
-static const struct can_bittiming_const m_can_bittiming_const_31X = {
- .name = KBUILD_MODNAME,
- .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */
- .tseg1_max = 256,
- .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
- .tseg2_max = 128,
- .sjw_max = 128,
- .brp_min = 1,
- .brp_max = 512,
- .brp_inc = 1,
-};
-
-static const struct can_bittiming_const m_can_data_bittiming_const_31X = {
- .name = KBUILD_MODNAME,
- .tseg1_min = 1, /* Time segment 1 = prop_seg + phase_seg1 */
- .tseg1_max = 32,
- .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
- .tseg2_max = 16,
- .sjw_max = 16,
- .brp_min = 1,
- .brp_max = 32,
- .brp_inc = 1,
-};
-
-static int m_can_set_bittiming(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- const struct can_bittiming *bt = &priv->can.bittiming;
- const struct can_bittiming *dbt = &priv->can.data_bittiming;
- u16 brp, sjw, tseg1, tseg2;
- u32 reg_btp;
-
- brp = bt->brp - 1;
- sjw = bt->sjw - 1;
- tseg1 = bt->prop_seg + bt->phase_seg1 - 1;
- tseg2 = bt->phase_seg2 - 1;
- reg_btp = (brp << NBTP_NBRP_SHIFT) | (sjw << NBTP_NSJW_SHIFT) |
- (tseg1 << NBTP_NTSEG1_SHIFT) | (tseg2 << NBTP_NTSEG2_SHIFT);
- m_can_write(priv, M_CAN_NBTP, reg_btp);
-
- if (priv->can.ctrlmode & CAN_CTRLMODE_FD) {
- reg_btp = 0;
- brp = dbt->brp - 1;
- sjw = dbt->sjw - 1;
- tseg1 = dbt->prop_seg + dbt->phase_seg1 - 1;
- tseg2 = dbt->phase_seg2 - 1;
-
- /* TDC is only needed for bitrates beyond 2.5 MBit/s.
- * This is mentioned in the "Bit Time Requirements for CAN FD"
- * paper presented at the International CAN Conference 2013
- */
- if (dbt->bitrate > 2500000) {
- u32 tdco, ssp;
-
- /* Use the same value of secondary sampling point
- * as the data sampling point
- */
- ssp = dbt->sample_point;
-
- /* Equation based on Bosch's M_CAN User Manual's
- * Transmitter Delay Compensation Section
- */
- tdco = (priv->can.clock.freq / 1000) *
- ssp / dbt->bitrate;
-
- /* Max valid TDCO value is 127 */
- if (tdco > 127) {
- netdev_warn(dev, "TDCO value of %u is beyond maximum. Using maximum possible value\n",
- tdco);
- tdco = 127;
- }
-
- reg_btp |= DBTP_TDC;
- m_can_write(priv, M_CAN_TDCR,
- tdco << TDCR_TDCO_SHIFT);
- }
-
- reg_btp |= (brp << DBTP_DBRP_SHIFT) |
- (sjw << DBTP_DSJW_SHIFT) |
- (tseg1 << DBTP_DTSEG1_SHIFT) |
- (tseg2 << DBTP_DTSEG2_SHIFT);
-
- m_can_write(priv, M_CAN_DBTP, reg_btp);
- }
-
- return 0;
-}
-
-/* Configure M_CAN chip:
- * - set rx buffer/fifo element size
- * - configure rx fifo
- * - accept non-matching frame into fifo 0
- * - configure tx buffer
- * - >= v3.1.x: TX FIFO is used
- * - configure mode
- * - setup bittiming
- */
-static void m_can_chip_config(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- u32 cccr, test;
-
- m_can_config_endisable(priv, true);
-
- /* RX Buffer/FIFO Element Size 64 bytes data field */
- m_can_write(priv, M_CAN_RXESC, M_CAN_RXESC_64BYTES);
-
- /* Accept Non-matching Frames Into FIFO 0 */
- m_can_write(priv, M_CAN_GFC, 0x0);
-
- if (priv->version == 30) {
- /* only support one Tx Buffer currently */
- m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_SHIFT) |
- priv->mcfg[MRAM_TXB].off);
- } else {
- /* TX FIFO is used for newer IP Core versions */
- m_can_write(priv, M_CAN_TXBC,
- (priv->mcfg[MRAM_TXB].num << TXBC_TFQS_SHIFT) |
- (priv->mcfg[MRAM_TXB].off));
- }
-
- /* support 64 bytes payload */
- m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_64BYTES);
-
- /* TX Event FIFO */
- if (priv->version == 30) {
- m_can_write(priv, M_CAN_TXEFC, (1 << TXEFC_EFS_SHIFT) |
- priv->mcfg[MRAM_TXE].off);
- } else {
- /* Full TX Event FIFO is used */
- m_can_write(priv, M_CAN_TXEFC,
- ((priv->mcfg[MRAM_TXE].num << TXEFC_EFS_SHIFT)
- & TXEFC_EFS_MASK) |
- priv->mcfg[MRAM_TXE].off);
- }
-
- /* rx fifo configuration, blocking mode, fifo size 1 */
- m_can_write(priv, M_CAN_RXF0C,
- (priv->mcfg[MRAM_RXF0].num << RXFC_FS_SHIFT) |
- priv->mcfg[MRAM_RXF0].off);
-
- m_can_write(priv, M_CAN_RXF1C,
- (priv->mcfg[MRAM_RXF1].num << RXFC_FS_SHIFT) |
- priv->mcfg[MRAM_RXF1].off);
-
- cccr = m_can_read(priv, M_CAN_CCCR);
- test = m_can_read(priv, M_CAN_TEST);
- test &= ~TEST_LBCK;
- if (priv->version == 30) {
- /* Version 3.0.x */
-
- cccr &= ~(CCCR_TEST | CCCR_MON |
- (CCCR_CMR_MASK << CCCR_CMR_SHIFT) |
- (CCCR_CME_MASK << CCCR_CME_SHIFT));
-
- if (priv->can.ctrlmode & CAN_CTRLMODE_FD)
- cccr |= CCCR_CME_CANFD_BRS << CCCR_CME_SHIFT;
-
- } else {
- /* Version 3.1.x or 3.2.x */
- cccr &= ~(CCCR_TEST | CCCR_MON | CCCR_BRSE | CCCR_FDOE |
- CCCR_NISO);
-
- /* Only 3.2.x has NISO Bit implemented */
- if (priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO)
- cccr |= CCCR_NISO;
-
- if (priv->can.ctrlmode & CAN_CTRLMODE_FD)
- cccr |= (CCCR_BRSE | CCCR_FDOE);
- }
-
- /* Loopback Mode */
- if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
- cccr |= CCCR_TEST | CCCR_MON;
- test |= TEST_LBCK;
- }
-
- /* Enable Monitoring (all versions) */
- if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
- cccr |= CCCR_MON;
-
- /* Write config */
- m_can_write(priv, M_CAN_CCCR, cccr);
- m_can_write(priv, M_CAN_TEST, test);
-
- /* Enable interrupts */
- m_can_write(priv, M_CAN_IR, IR_ALL_INT);
- if (!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
- if (priv->version == 30)
- m_can_write(priv, M_CAN_IE, IR_ALL_INT &
- ~(IR_ERR_LEC_30X));
- else
- m_can_write(priv, M_CAN_IE, IR_ALL_INT &
- ~(IR_ERR_LEC_31X));
- else
- m_can_write(priv, M_CAN_IE, IR_ALL_INT);
-
- /* route all interrupts to INT0 */
- m_can_write(priv, M_CAN_ILS, ILS_ALL_INT0);
-
- /* set bittiming params */
- m_can_set_bittiming(dev);
-
- m_can_config_endisable(priv, false);
-}
-
-static void m_can_start(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
-
- /* basic m_can configuration */
- m_can_chip_config(dev);
-
- priv->can.state = CAN_STATE_ERROR_ACTIVE;
-
- m_can_enable_all_interrupts(priv);
-}
-
-static int m_can_set_mode(struct net_device *dev, enum can_mode mode)
-{
- switch (mode) {
- case CAN_MODE_START:
- m_can_start(dev);
- netif_wake_queue(dev);
- break;
- default:
- return -EOPNOTSUPP;
- }
-
- return 0;
-}
-
-/* Checks core release number of M_CAN
- * returns 0 if an unsupported device is detected
- * else it returns the release and step coded as:
- * return value = 10 * <release> + 1 * <step>
- */
-static int m_can_check_core_release(void __iomem *m_can_base)
-{
- u32 crel_reg;
- u8 rel;
- u8 step;
- int res;
- struct m_can_priv temp_priv = {
- .base = m_can_base
- };
-
- /* Read Core Release Version and split into version number
- * Example: Version 3.2.1 => rel = 3; step = 2; substep = 1;
- */
- crel_reg = m_can_read(&temp_priv, M_CAN_CREL);
- rel = (u8)((crel_reg & CREL_REL_MASK) >> CREL_REL_SHIFT);
- step = (u8)((crel_reg & CREL_STEP_MASK) >> CREL_STEP_SHIFT);
-
- if (rel == 3) {
- /* M_CAN v3.x.y: create return value */
- res = 30 + step;
- } else {
- /* Unsupported M_CAN version */
- res = 0;
- }
-
- return res;
-}
-
-/* Selectable Non ISO support only in version 3.2.x
- * This function checks if the bit is writable.
- */
-static bool m_can_niso_supported(const struct m_can_priv *priv)
-{
- u32 cccr_reg, cccr_poll;
- int niso_timeout;
-
- m_can_config_endisable(priv, true);
- cccr_reg = m_can_read(priv, M_CAN_CCCR);
- cccr_reg |= CCCR_NISO;
- m_can_write(priv, M_CAN_CCCR, cccr_reg);
-
- niso_timeout = readl_poll_timeout((priv->base + M_CAN_CCCR), cccr_poll,
- (cccr_poll == cccr_reg), 0, 10);
-
- /* Clear NISO */
- cccr_reg &= ~(CCCR_NISO);
- m_can_write(priv, M_CAN_CCCR, cccr_reg);
-
- m_can_config_endisable(priv, false);
-
- /* return false if time out (-ETIMEDOUT), else return true */
- return !niso_timeout;
-}
-
-static int m_can_dev_setup(struct platform_device *pdev, struct net_device *dev,
- void __iomem *addr)
-{
- struct m_can_priv *priv;
- int m_can_version;
-
- m_can_version = m_can_check_core_release(addr);
- /* return if unsupported version */
- if (!m_can_version) {
- dev_err(&pdev->dev, "Unsupported version number: %2d",
- m_can_version);
- return -EINVAL;
- }
-
- priv = netdev_priv(dev);
- netif_napi_add(dev, &priv->napi, m_can_poll, M_CAN_NAPI_WEIGHT);
-
- /* Shared properties of all M_CAN versions */
- priv->version = m_can_version;
- priv->dev = dev;
- priv->base = addr;
- priv->can.do_set_mode = m_can_set_mode;
- priv->can.do_get_berr_counter = m_can_get_berr_counter;
-
- /* Set M_CAN supported operations */
- priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
- CAN_CTRLMODE_LISTENONLY |
- CAN_CTRLMODE_BERR_REPORTING |
- CAN_CTRLMODE_FD;
-
- /* Set properties depending on M_CAN version */
- switch (priv->version) {
- case 30:
- /* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.0.x */
- can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);
- priv->can.bittiming_const = &m_can_bittiming_const_30X;
- priv->can.data_bittiming_const =
- &m_can_data_bittiming_const_30X;
- break;
- case 31:
- /* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.1.x */
- can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);
- priv->can.bittiming_const = &m_can_bittiming_const_31X;
- priv->can.data_bittiming_const =
- &m_can_data_bittiming_const_31X;
- break;
- case 32:
- priv->can.bittiming_const = &m_can_bittiming_const_31X;
- priv->can.data_bittiming_const =
- &m_can_data_bittiming_const_31X;
- priv->can.ctrlmode_supported |= (m_can_niso_supported(priv)
- ? CAN_CTRLMODE_FD_NON_ISO
- : 0);
- break;
- default:
- dev_err(&pdev->dev, "Unsupported version number: %2d",
- priv->version);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static int m_can_open(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- int err;
-
- err = m_can_clk_start(priv);
- if (err)
- return err;
-
- /* open the can device */
- err = open_candev(dev);
- if (err) {
- netdev_err(dev, "failed to open can device\n");
- goto exit_disable_clks;
- }
-
- /* register interrupt handler */
- err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name,
- dev);
- if (err < 0) {
- netdev_err(dev, "failed to request interrupt\n");
- goto exit_irq_fail;
- }
-
- /* start the m_can controller */
- m_can_start(dev);
-
- can_led_event(dev, CAN_LED_EVENT_OPEN);
- napi_enable(&priv->napi);
- netif_start_queue(dev);
-
- return 0;
-
-exit_irq_fail:
- close_candev(dev);
-exit_disable_clks:
- m_can_clk_stop(priv);
- return err;
-}
-
-static void m_can_stop(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
-
- /* disable all interrupts */
- m_can_disable_all_interrupts(priv);
-
- /* set the state as STOPPED */
- priv->can.state = CAN_STATE_STOPPED;
-}
-
-static int m_can_close(struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
-
- netif_stop_queue(dev);
- napi_disable(&priv->napi);
- m_can_stop(dev);
- m_can_clk_stop(priv);
- free_irq(dev->irq, dev);
- close_candev(dev);
- can_led_event(dev, CAN_LED_EVENT_STOP);
-
- return 0;
-}
-
-static int m_can_next_echo_skb_occupied(struct net_device *dev, int putidx)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- /*get wrap around for loopback skb index */
- unsigned int wrap = priv->can.echo_skb_max;
- int next_idx;
-
- /* calculate next index */
- next_idx = (++putidx >= wrap ? 0 : putidx);
-
- /* check if occupied */
- return !!priv->can.echo_skb[next_idx];
-}
-
-static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,
- struct net_device *dev)
-{
- struct m_can_priv *priv = netdev_priv(dev);
- struct canfd_frame *cf = (struct canfd_frame *)skb->data;
- u32 id, cccr, fdflags;
- int i;
- int putidx;
-
- if (can_dropped_invalid_skb(dev, skb))
- return NETDEV_TX_OK;
-
- /* Generate ID field for TX buffer Element */
- /* Common to all supported M_CAN versions */
- if (cf->can_id & CAN_EFF_FLAG) {
- id = cf->can_id & CAN_EFF_MASK;
- id |= TX_BUF_XTD;
- } else {
- id = ((cf->can_id & CAN_SFF_MASK) << 18);
- }
-
- if (cf->can_id & CAN_RTR_FLAG)
- id |= TX_BUF_RTR;
-
- if (priv->version == 30) {
- netif_stop_queue(dev);
-
- /* message ram configuration */
- m_can_fifo_write(priv, 0, M_CAN_FIFO_ID, id);
- m_can_fifo_write(priv, 0, M_CAN_FIFO_DLC,
- can_len2dlc(cf->len) << 16);
-
- for (i = 0; i < cf->len; i += 4)
- m_can_fifo_write(priv, 0,
- M_CAN_FIFO_DATA(i / 4),
- *(u32 *)(cf->data + i));
-
- can_put_echo_skb(skb, dev, 0);
-
- if (priv->can.ctrlmode & CAN_CTRLMODE_FD) {
- cccr = m_can_read(priv, M_CAN_CCCR);
- cccr &= ~(CCCR_CMR_MASK << CCCR_CMR_SHIFT);
- if (can_is_canfd_skb(skb)) {
- if (cf->flags & CANFD_BRS)
- cccr |= CCCR_CMR_CANFD_BRS <<
- CCCR_CMR_SHIFT;
- else
- cccr |= CCCR_CMR_CANFD <<
- CCCR_CMR_SHIFT;
- } else {
- cccr |= CCCR_CMR_CAN << CCCR_CMR_SHIFT;
- }
- m_can_write(priv, M_CAN_CCCR, cccr);
- }
- m_can_write(priv, M_CAN_TXBTIE, 0x1);
- m_can_write(priv, M_CAN_TXBAR, 0x1);
- /* End of xmit function for version 3.0.x */
- } else {
- /* Transmit routine for version >= v3.1.x */
-
- /* Check if FIFO full */
- if (m_can_tx_fifo_full(priv)) {
- /* This shouldn't happen */
- netif_stop_queue(dev);
- netdev_warn(dev,
- "TX queue active although FIFO is full.");
- return NETDEV_TX_BUSY;
- }
-
- /* get put index for frame */
- putidx = ((m_can_read(priv, M_CAN_TXFQS) & TXFQS_TFQPI_MASK)
- >> TXFQS_TFQPI_SHIFT);
- /* Write ID Field to FIFO Element */
- m_can_fifo_write(priv, putidx, M_CAN_FIFO_ID, id);
-
- /* get CAN FD configuration of frame */
- fdflags = 0;
- if (can_is_canfd_skb(skb)) {
- fdflags |= TX_BUF_FDF;
- if (cf->flags & CANFD_BRS)
- fdflags |= TX_BUF_BRS;
- }
-
- /* Construct DLC Field. Also contains CAN-FD configuration
- * use put index of fifo as message marker
- * it is used in TX interrupt for
- * sending the correct echo frame
- */
- m_can_fifo_write(priv, putidx, M_CAN_FIFO_DLC,
- ((putidx << TX_BUF_MM_SHIFT) &
- TX_BUF_MM_MASK) |
- (can_len2dlc(cf->len) << 16) |
- fdflags | TX_BUF_EFC);
-
- for (i = 0; i < cf->len; i += 4)
- m_can_fifo_write(priv, putidx, M_CAN_FIFO_DATA(i / 4),
- *(u32 *)(cf->data + i));
-
- /* Push loopback echo.
- * Will be looped back on TX interrupt based on message marker
- */
- can_put_echo_skb(skb, dev, putidx);
-
- /* Enable TX FIFO element to start transfer */
- m_can_write(priv, M_CAN_TXBAR, (1 << putidx));
-
- /* stop network queue if fifo full */
- if (m_can_tx_fifo_full(priv) ||
- m_can_next_echo_skb_occupied(dev, putidx))
- netif_stop_queue(dev);
- }
-
- return NETDEV_TX_OK;
-}
-
-static const struct net_device_ops m_can_netdev_ops = {
- .ndo_open = m_can_open,
- .ndo_stop = m_can_close,
- .ndo_start_xmit = m_can_start_xmit,
- .ndo_change_mtu = can_change_mtu,
-};
-
-static int register_m_can_dev(struct net_device *dev)
-{
- dev->flags |= IFF_ECHO; /* we support local echo */
- dev->netdev_ops = &m_can_netdev_ops;
-
- return register_candev(dev);
-}
-
-static void m_can_init_ram(struct m_can_priv *priv)
-{
- int end, i, start;
-
- /* initialize the entire Message RAM in use to avoid possible
- * ECC/parity checksum errors when reading an uninitialized buffer
- */
- start = priv->mcfg[MRAM_SIDF].off;
- end = priv->mcfg[MRAM_TXB].off +
- priv->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;
- for (i = start; i < end; i += 4)
- writel(0x0, priv->mram_base + i);
-}
-
-static void m_can_of_parse_mram(struct m_can_priv *priv,
- const u32 *mram_config_vals)
-{
- priv->mcfg[MRAM_SIDF].off = mram_config_vals[0];
- priv->mcfg[MRAM_SIDF].num = mram_config_vals[1];
- priv->mcfg[MRAM_XIDF].off = priv->mcfg[MRAM_SIDF].off +
- priv->mcfg[MRAM_SIDF].num * SIDF_ELEMENT_SIZE;
- priv->mcfg[MRAM_XIDF].num = mram_config_vals[2];
- priv->mcfg[MRAM_RXF0].off = priv->mcfg[MRAM_XIDF].off +
- priv->mcfg[MRAM_XIDF].num * XIDF_ELEMENT_SIZE;
- priv->mcfg[MRAM_RXF0].num = mram_config_vals[3] &
- (RXFC_FS_MASK >> RXFC_FS_SHIFT);
- priv->mcfg[MRAM_RXF1].off = priv->mcfg[MRAM_RXF0].off +
- priv->mcfg[MRAM_RXF0].num * RXF0_ELEMENT_SIZE;
- priv->mcfg[MRAM_RXF1].num = mram_config_vals[4] &
- (RXFC_FS_MASK >> RXFC_FS_SHIFT);
- priv->mcfg[MRAM_RXB].off = priv->mcfg[MRAM_RXF1].off +
- priv->mcfg[MRAM_RXF1].num * RXF1_ELEMENT_SIZE;
- priv->mcfg[MRAM_RXB].num = mram_config_vals[5];
- priv->mcfg[MRAM_TXE].off = priv->mcfg[MRAM_RXB].off +
- priv->mcfg[MRAM_RXB].num * RXB_ELEMENT_SIZE;
- priv->mcfg[MRAM_TXE].num = mram_config_vals[6];
- priv->mcfg[MRAM_TXB].off = priv->mcfg[MRAM_TXE].off +
- priv->mcfg[MRAM_TXE].num * TXE_ELEMENT_SIZE;
- priv->mcfg[MRAM_TXB].num = mram_config_vals[7] &
- (TXBC_NDTB_MASK >> TXBC_NDTB_SHIFT);
-
- dev_dbg(priv->device,
- "mram_base %p sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",
- priv->mram_base,
- priv->mcfg[MRAM_SIDF].off, priv->mcfg[MRAM_SIDF].num,
- priv->mcfg[MRAM_XIDF].off, priv->mcfg[MRAM_XIDF].num,
- priv->mcfg[MRAM_RXF0].off, priv->mcfg[MRAM_RXF0].num,
- priv->mcfg[MRAM_RXF1].off, priv->mcfg[MRAM_RXF1].num,
- priv->mcfg[MRAM_RXB].off, priv->mcfg[MRAM_RXB].num,
- priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num,
- priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num);
-
- m_can_init_ram(priv);
-}
+#include "m_can_core.h"
static int m_can_plat_probe(struct platform_device *pdev)
{
+ struct m_can_classdev *mcan_class;
struct net_device *dev;
struct m_can_priv *priv;
struct resource *res;
void __iomem *addr;
void __iomem *mram_addr;
- struct clk *hclk, *cclk;
- int irq, ret;
- struct device_node *np;
- u32 mram_config_vals[MRAM_CFG_LEN];
- u32 tx_fifo_size;
-
- np = pdev->dev.of_node;
+ int irq, ret = 0;
- hclk = devm_clk_get(&pdev->dev, "hclk");
- cclk = devm_clk_get(&pdev->dev, "cclk");
-
- if (IS_ERR(hclk) || IS_ERR(cclk)) {
- dev_err(&pdev->dev, "no clock found\n");
- ret = -ENODEV;
- goto failed_ret;
- }
+ mcan_class = m_can_core_allocate_dev(&pdev->dev);
+ m_can_core_get_clocks(mcan_class);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");
addr = devm_ioremap_resource(&pdev->dev, res);
irq = platform_get_irq_byname(pdev, "int0");
-
if (IS_ERR(addr) || irq < 0) {
ret = -EINVAL;
goto failed_ret;
@@ -1616,122 +60,35 @@ static int m_can_plat_probe(struct platform_device *pdev)
goto failed_ret;
}
- /* get message ram configuration */
- ret = of_property_read_u32_array(np, "bosch,mram-cfg",
- mram_config_vals,
- sizeof(mram_config_vals) / 4);
- if (ret) {
- dev_err(&pdev->dev, "Could not get Message RAM configuration.");
- goto failed_ret;
- }
-
- /* Get TX FIFO size
- * Defines the total amount of echo buffers for loopback
- */
- tx_fifo_size = mram_config_vals[7];
-
- /* allocate the m_can device */
- dev = alloc_candev(sizeof(*priv), tx_fifo_size);
- if (!dev) {
- ret = -ENOMEM;
- goto failed_ret;
- }
-
- priv = netdev_priv(dev);
- dev->irq = irq;
- priv->device = &pdev->dev;
- priv->hclk = hclk;
- priv->cclk = cclk;
- priv->can.clock.freq = clk_get_rate(cclk);
- priv->mram_base = mram_addr;
-
- platform_set_drvdata(pdev, dev);
- SET_NETDEV_DEV(dev, &pdev->dev);
-
- /* Enable clocks. Necessary to read Core Release in order to determine
- * M_CAN version
- */
- pm_runtime_enable(&pdev->dev);
- ret = m_can_clk_start(priv);
- if (ret)
- goto pm_runtime_fail;
-
- ret = m_can_dev_setup(pdev, dev, addr);
- if (ret)
- goto clk_disable;
-
- ret = register_m_can_dev(dev);
- if (ret) {
- dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
- KBUILD_MODNAME, ret);
- goto clk_disable;
- }
+ mcan_class->net->irq = irq;
+ mcan_class->pm_clock_support = 1;
+ mcan_class->mram_base = mram_addr;
+ mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk);
+ mcan_class->dev = &pdev->dev;
- m_can_of_parse_mram(priv, mram_config_vals);
+ platform_set_drvdata(pdev, mcan_class->dev);
- devm_can_led_init(dev);
+ m_can_init_ram(mcan_class);
- of_can_transceiver(dev);
+ m_can_core_register(mcan_class);
- dev_info(&pdev->dev, "%s device registered (irq=%d, version=%d)\n",
- KBUILD_MODNAME, dev->irq, priv->version);
-
- /* Probe finished
- * Stop clocks. They will be reactivated once the M_CAN device is opened
- */
-clk_disable:
- m_can_clk_stop(priv);
-pm_runtime_fail:
+failed_ret:
+/* m_can_clk_stop(mcan_class);*/
if (ret) {
pm_runtime_disable(&pdev->dev);
- free_candev(dev);
+ free_candev(mcan_class->net);
}
-failed_ret:
return ret;
}
static __maybe_unused int m_can_suspend(struct device *dev)
{
- struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
-
- if (netif_running(ndev)) {
- netif_stop_queue(ndev);
- netif_device_detach(ndev);
- m_can_stop(ndev);
- m_can_clk_stop(priv);
- }
-
- pinctrl_pm_select_sleep_state(dev);
-
- priv->can.state = CAN_STATE_SLEEPING;
-
- return 0;
+ return m_can_core_suspend(dev);
}
static __maybe_unused int m_can_resume(struct device *dev)
{
- struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
-
- pinctrl_pm_select_default_state(dev);
-
- priv->can.state = CAN_STATE_ERROR_ACTIVE;
-
- if (netif_running(ndev)) {
- int ret;
-
- ret = m_can_clk_start(priv);
- if (ret)
- return ret;
-
- m_can_init_ram(priv);
- m_can_start(ndev);
- netif_device_attach(ndev);
- netif_start_queue(ndev);
- }
-
- return 0;
+ return m_can_core_resume(dev);
}
static void unregister_m_can_dev(struct net_device *dev)
@@ -1757,7 +114,7 @@ static int m_can_plat_remove(struct platform_device *pdev)
static int __maybe_unused m_can_runtime_suspend(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
clk_disable_unprepare(priv->cclk);
clk_disable_unprepare(priv->hclk);
@@ -1768,7 +125,7 @@ static int __maybe_unused m_can_runtime_suspend(struct device *dev)
static int __maybe_unused m_can_runtime_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
int err;
err = clk_prepare_enable(priv->hclk);
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can_core.c
similarity index 83%
copy from drivers/net/can/m_can/m_can.c
copy to drivers/net/can/m_can/m_can_core.c
index 9b449400376b..5af5d259180e 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can_core.c
@@ -28,6 +28,8 @@
#include <linux/can/dev.h>
#include <linux/pinctrl/consumer.h>
+#include "m_can_core.h"
+
/* napi related */
#define M_CAN_NAPI_WEIGHT 64
@@ -86,28 +88,6 @@ enum m_can_reg {
M_CAN_TXEFA = 0xf8,
};
-/* m_can lec values */
-enum m_can_lec_type {
- LEC_NO_ERROR = 0,
- LEC_STUFF_ERROR,
- LEC_FORM_ERROR,
- LEC_ACK_ERROR,
- LEC_BIT1_ERROR,
- LEC_BIT0_ERROR,
- LEC_CRC_ERROR,
- LEC_UNUSED,
-};
-
-enum m_can_mram_cfg {
- MRAM_SIDF = 0,
- MRAM_XIDF,
- MRAM_RXF0,
- MRAM_RXF1,
- MRAM_RXB,
- MRAM_TXE,
- MRAM_TXB,
- MRAM_CFG_NUM,
-};
/* Core Release Register (CREL) */
#define CREL_REL_SHIFT 28
@@ -347,68 +327,100 @@ enum m_can_mram_cfg {
#define TX_EVENT_MM_SHIFT TX_BUF_MM_SHIFT
#define TX_EVENT_MM_MASK (0xff << TX_EVENT_MM_SHIFT)
-/* address offset and element number for each FIFO/Buffer in the Message RAM */
-struct mram_cfg {
- u16 off;
- u8 num;
-};
+static inline u32 m_can_read(const struct m_can_classdev *priv, enum m_can_reg reg)
+{
+ u32 ret;
-/* m_can private data structure */
-struct m_can_priv {
- struct can_priv can; /* must be the first member */
- struct napi_struct napi;
- struct net_device *dev;
- struct device *device;
- struct clk *hclk;
- struct clk *cclk;
- void __iomem *base;
- u32 irqstatus;
- int version;
-
- /* message ram configuration */
- void __iomem *mram_base;
- struct mram_cfg mcfg[MRAM_CFG_NUM];
-};
+ if (priv->m_can_write)
+ ret = priv->m_can_read(priv, priv->reg_offset + reg);
+ else
+ ret = readl(priv->base + reg);
-static inline u32 m_can_read(const struct m_can_priv *priv, enum m_can_reg reg)
-{
- return readl(priv->base + reg);
+ return ret;
}
-static inline void m_can_write(const struct m_can_priv *priv,
+static inline int m_can_write(const struct m_can_classdev *priv,
enum m_can_reg reg, u32 val)
{
- writel(val, priv->base + reg);
+ int ret = 0;
+
+ if (priv->m_can_write)
+ ret = priv->m_can_write(priv, priv->reg_offset + reg, val);
+ else
+ writel(val, priv->base + reg);
+
+ return ret;
}
-static inline u32 m_can_fifo_read(const struct m_can_priv *priv,
+static inline u32 m_can_fifo_read(const struct m_can_classdev *priv,
u32 fgi, unsigned int offset)
{
- return readl(priv->mram_base + priv->mcfg[MRAM_RXF0].off +
- fgi * RXF0_ELEMENT_SIZE + offset);
+ u32 addr_offset = priv->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + offset;
+ u32 read_fifo_addr; /* need to take into account iomem cases */
+ u32 ret = 0;
+
+ if (priv->mram_start)
+ read_fifo_addr = priv->mram_start + addr_offset;
+ else
+ read_fifo_addr = priv->mram_base + addr_offset;
+
+ if (priv->m_can_fifo_read)
+ ret = priv->m_can_read(priv, read_fifo_addr);
+ else
+ ret = readl(read_fifo_addr);
+
+ return ret;
}
-static inline void m_can_fifo_write(const struct m_can_priv *priv,
+static inline void m_can_fifo_write(const struct m_can_classdev *priv,
u32 fpi, unsigned int offset, u32 val)
{
- writel(val, priv->mram_base + priv->mcfg[MRAM_TXB].off +
- fpi * TXB_ELEMENT_SIZE + offset);
+ u32 addr_offset = priv->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + offset;
+ u32 write_fifo_addr;
+ u32 ret;
+
+ if (priv->mram_start)
+ write_fifo_addr = priv->mram_start + addr_offset;
+ else
+ write_fifo_addr = priv->mram_base + addr_offset;
+
+ if (priv->m_can_write)
+ ret = priv->m_can_write(priv, write_fifo_addr, val);
+ else
+ writel(val, write_fifo_addr);
+
+ return ret;
}
-static inline u32 m_can_txe_fifo_read(const struct m_can_priv *priv,
+static inline u32 m_can_txe_fifo_read(const struct m_can_classdev *priv,
u32 fgi,
- u32 offset) {
- return readl(priv->mram_base + priv->mcfg[MRAM_TXE].off +
- fgi * TXE_ELEMENT_SIZE + offset);
+ u32 offset)
+{
+ u32 addr_offset = priv->mcfg[MRAM_TXE].off + fgi * TXE_ELEMENT_SIZE + offset;
+ u32 read_fifo_addr;
+ u32 ret = 0;
+
+printk("%s: Here\n", __func__);
+ if (priv->mram_start)
+ read_fifo_addr = priv->mram_start + addr_offset;
+ else
+ read_fifo_addr = priv->mram_base + addr_offset;
+
+ if (priv->m_can_fifo_read)
+ ret = priv->m_can_read(priv, read_fifo_addr);
+ else
+ ret = readl(read_fifo_addr);
+
+ return ret;
}
-static inline bool m_can_tx_fifo_full(const struct m_can_priv *priv)
+static inline bool m_can_tx_fifo_full(const struct m_can_classdev *priv)
{
+printk("%s: Here\n", __func__);
return !!(m_can_read(priv, M_CAN_TXFQS) & TXFQS_TFQF);
}
-static inline void m_can_config_endisable(const struct m_can_priv *priv,
- bool enable)
+void m_can_config_endisable(const struct m_can_classdev *priv, bool enable)
{
u32 cccr = m_can_read(priv, M_CAN_CCCR);
u32 timeout = 10;
@@ -430,7 +442,7 @@ static inline void m_can_config_endisable(const struct m_can_priv *priv,
while ((m_can_read(priv, M_CAN_CCCR) & (CCCR_INIT | CCCR_CCE)) != val) {
if (timeout == 0) {
- netdev_warn(priv->dev, "Failed to init module\n");
+ netdev_warn(priv->net, "Failed to init module\n");
return;
}
timeout--;
@@ -438,13 +450,13 @@ static inline void m_can_config_endisable(const struct m_can_priv *priv,
}
}
-static inline void m_can_enable_all_interrupts(const struct m_can_priv *priv)
+static inline void m_can_enable_all_interrupts(const struct m_can_classdev *priv)
{
/* Only interrupt line 0 is used in this driver */
m_can_write(priv, M_CAN_ILE, ILE_EINT0);
}
-static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv)
+static inline void m_can_disable_all_interrupts(const struct m_can_classdev *priv)
{
m_can_write(priv, M_CAN_ILE, 0x0);
}
@@ -452,12 +464,12 @@ static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv)
static void m_can_read_fifo(struct net_device *dev, u32 rxfs)
{
struct net_device_stats *stats = &dev->stats;
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct canfd_frame *cf;
struct sk_buff *skb;
u32 id, fgi, dlc;
int i;
-
+printk("%s: Here\n", __func__);
/* calculate the fifo get index for where to read data */
fgi = (rxfs & RXFS_FGI_MASK) >> RXFS_FGI_SHIFT;
dlc = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC);
@@ -509,10 +521,10 @@ static void m_can_read_fifo(struct net_device *dev, u32 rxfs)
static int m_can_do_rx_poll(struct net_device *dev, int quota)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
u32 pkts = 0;
u32 rxfs;
-
+printk("%s: Here\n", __func__);
rxfs = m_can_read(priv, M_CAN_RXF0S);
if (!(rxfs & RXFS_FFL_MASK)) {
netdev_dbg(dev, "no messages in fifo0\n");
@@ -541,7 +553,7 @@ static int m_can_handle_lost_msg(struct net_device *dev)
struct net_device_stats *stats = &dev->stats;
struct sk_buff *skb;
struct can_frame *frame;
-
+printk("%s: Here\n", __func__);
netdev_err(dev, "msg lost in rxf0\n");
stats->rx_errors++;
@@ -562,11 +574,11 @@ static int m_can_handle_lost_msg(struct net_device *dev)
static int m_can_handle_lec_err(struct net_device *dev,
enum m_can_lec_type lec_type)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct net_device_stats *stats = &dev->stats;
struct can_frame *cf;
struct sk_buff *skb;
-
+printk("%s: Here\n", __func__);
priv->can.can_stats.bus_error++;
stats->rx_errors++;
@@ -619,7 +631,7 @@ static int m_can_handle_lec_err(struct net_device *dev,
static int __m_can_get_berr_counter(const struct net_device *dev,
struct can_berr_counter *bec)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
unsigned int ecr;
ecr = m_can_read(priv, M_CAN_ECR);
@@ -629,28 +641,32 @@ static int __m_can_get_berr_counter(const struct net_device *dev,
return 0;
}
-static int m_can_clk_start(struct m_can_priv *priv)
+static int m_can_clk_start(struct m_can_classdev *priv)
{
int err;
- err = pm_runtime_get_sync(priv->device);
+ if (priv->pm_clock_support == 0)
+ return 0;
+
+ err = pm_runtime_get_sync(priv->dev);
if (err < 0) {
- pm_runtime_put_noidle(priv->device);
+ pm_runtime_put_noidle(priv->dev);
return err;
}
return 0;
}
-static void m_can_clk_stop(struct m_can_priv *priv)
+static void m_can_clk_stop(struct m_can_classdev *priv)
{
- pm_runtime_put_sync(priv->device);
+ if (priv->pm_clock_support)
+ pm_runtime_put_sync(priv->dev);
}
static int m_can_get_berr_counter(const struct net_device *dev,
struct can_berr_counter *bec)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
int err;
err = m_can_clk_start(priv);
@@ -667,7 +683,7 @@ static int m_can_get_berr_counter(const struct net_device *dev,
static int m_can_handle_state_change(struct net_device *dev,
enum can_state new_state)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct net_device_stats *stats = &dev->stats;
struct can_frame *cf;
struct sk_buff *skb;
@@ -741,7 +757,7 @@ static int m_can_handle_state_change(struct net_device *dev,
static int m_can_handle_state_errors(struct net_device *dev, u32 psr)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
int work_done = 0;
if ((psr & PSR_EW) &&
@@ -794,7 +810,7 @@ static inline bool is_lec_err(u32 psr)
static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,
u32 psr)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
int work_done = 0;
if (irqstatus & IR_RF0L)
@@ -814,7 +830,7 @@ static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,
static int m_can_poll(struct napi_struct *napi, int quota)
{
struct net_device *dev = napi->dev;
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
int work_done = 0;
u32 irqstatus, psr;
@@ -849,7 +865,7 @@ static void m_can_echo_tx_event(struct net_device *dev)
int i = 0;
unsigned int msg_mark;
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct net_device_stats *stats = &dev->stats;
/* read tx event fifo status */
@@ -882,7 +898,7 @@ static void m_can_echo_tx_event(struct net_device *dev)
static irqreturn_t m_can_isr(int irq, void *dev_id)
{
struct net_device *dev = (struct net_device *)dev_id;
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct net_device_stats *stats = &dev->stats;
u32 ir;
@@ -977,7 +993,7 @@ static const struct can_bittiming_const m_can_data_bittiming_const_31X = {
static int m_can_set_bittiming(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
const struct can_bittiming *bt = &priv->can.bittiming;
const struct can_bittiming *dbt = &priv->can.data_bittiming;
u16 brp, sjw, tseg1, tseg2;
@@ -1050,7 +1066,7 @@ static int m_can_set_bittiming(struct net_device *dev)
*/
static void m_can_chip_config(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
u32 cccr, test;
m_can_config_endisable(priv, true);
@@ -1150,17 +1166,17 @@ static void m_can_chip_config(struct net_device *dev)
/* route all interrupts to INT0 */
m_can_write(priv, M_CAN_ILS, ILS_ALL_INT0);
-
+printk("%s: Bit timing\n", __func__);
/* set bittiming params */
m_can_set_bittiming(dev);
-
+printk("%s: out\n", __func__);
m_can_config_endisable(priv, false);
}
static void m_can_start(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
-
+ struct m_can_classdev *priv = netdev_priv(dev);
+printk("%s: Hear\n", __func__);
/* basic m_can configuration */
m_can_chip_config(dev);
@@ -1171,6 +1187,7 @@ static void m_can_start(struct net_device *dev)
static int m_can_set_mode(struct net_device *dev, enum can_mode mode)
{
+printk("%s: Hear\n", __func__);
switch (mode) {
case CAN_MODE_START:
m_can_start(dev);
@@ -1188,20 +1205,17 @@ static int m_can_set_mode(struct net_device *dev, enum can_mode mode)
* else it returns the release and step coded as:
* return value = 10 * <release> + 1 * <step>
*/
-static int m_can_check_core_release(void __iomem *m_can_base)
+static int m_can_check_core_release(struct m_can_classdev *priv)
{
u32 crel_reg;
u8 rel;
u8 step;
int res;
- struct m_can_priv temp_priv = {
- .base = m_can_base
- };
/* Read Core Release Version and split into version number
* Example: Version 3.2.1 => rel = 3; step = 2; substep = 1;
*/
- crel_reg = m_can_read(&temp_priv, M_CAN_CREL);
+ crel_reg = m_can_read(priv, M_CAN_CREL);
rel = (u8)((crel_reg & CREL_REL_MASK) >> CREL_REL_SHIFT);
step = (u8)((crel_reg & CREL_STEP_MASK) >> CREL_STEP_SHIFT);
@@ -1219,86 +1233,84 @@ static int m_can_check_core_release(void __iomem *m_can_base)
/* Selectable Non ISO support only in version 3.2.x
* This function checks if the bit is writable.
*/
-static bool m_can_niso_supported(const struct m_can_priv *priv)
+static bool m_can_niso_supported(const struct m_can_classdev *priv)
{
u32 cccr_reg, cccr_poll;
- int niso_timeout;
+ int niso_timeout = 0;
m_can_config_endisable(priv, true);
cccr_reg = m_can_read(priv, M_CAN_CCCR);
cccr_reg |= CCCR_NISO;
m_can_write(priv, M_CAN_CCCR, cccr_reg);
-
- niso_timeout = readl_poll_timeout((priv->base + M_CAN_CCCR), cccr_poll,
- (cccr_poll == cccr_reg), 0, 10);
+printk("%s: Fix readl poll timeout\n", __func__);
+/* niso_timeout = readl_poll_timeout((priv->base + M_CAN_CCCR), cccr_poll,
+ (cccr_poll == cccr_reg), 0, 10);*/
/* Clear NISO */
cccr_reg &= ~(CCCR_NISO);
m_can_write(priv, M_CAN_CCCR, cccr_reg);
m_can_config_endisable(priv, false);
-
+printk("%s: out\n", __func__);
/* return false if time out (-ETIMEDOUT), else return true */
return !niso_timeout;
}
-static int m_can_dev_setup(struct platform_device *pdev, struct net_device *dev,
- void __iomem *addr)
+static int m_can_dev_setup(struct net_device *dev)
{
- struct m_can_priv *priv;
+ struct m_can_classdev *m_can_dev;
int m_can_version;
- m_can_version = m_can_check_core_release(addr);
+ m_can_dev = netdev_priv(dev);
+
+ m_can_version = m_can_check_core_release(m_can_dev);
/* return if unsupported version */
if (!m_can_version) {
- dev_err(&pdev->dev, "Unsupported version number: %2d",
+ dev_err(m_can_dev->dev, "Unsupported version number: %2d",
m_can_version);
return -EINVAL;
}
- priv = netdev_priv(dev);
- netif_napi_add(dev, &priv->napi, m_can_poll, M_CAN_NAPI_WEIGHT);
+ netif_napi_add(dev, &m_can_dev->napi, m_can_poll, M_CAN_NAPI_WEIGHT);
/* Shared properties of all M_CAN versions */
- priv->version = m_can_version;
- priv->dev = dev;
- priv->base = addr;
- priv->can.do_set_mode = m_can_set_mode;
- priv->can.do_get_berr_counter = m_can_get_berr_counter;
+ m_can_dev->version = m_can_version;
+ m_can_dev->can.do_set_mode = m_can_set_mode;
+ m_can_dev->can.do_get_berr_counter = m_can_get_berr_counter;
/* Set M_CAN supported operations */
- priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
+ m_can_dev->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
CAN_CTRLMODE_LISTENONLY |
CAN_CTRLMODE_BERR_REPORTING |
CAN_CTRLMODE_FD;
/* Set properties depending on M_CAN version */
- switch (priv->version) {
+ switch (m_can_dev->version) {
case 30:
/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.0.x */
can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);
- priv->can.bittiming_const = &m_can_bittiming_const_30X;
- priv->can.data_bittiming_const =
+ m_can_dev->can.bittiming_const = &m_can_bittiming_const_30X;
+ m_can_dev->can.data_bittiming_const =
&m_can_data_bittiming_const_30X;
break;
case 31:
/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.1.x */
can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);
- priv->can.bittiming_const = &m_can_bittiming_const_31X;
- priv->can.data_bittiming_const =
+ m_can_dev->can.bittiming_const = &m_can_bittiming_const_31X;
+ m_can_dev->can.data_bittiming_const =
&m_can_data_bittiming_const_31X;
break;
case 32:
- priv->can.bittiming_const = &m_can_bittiming_const_31X;
- priv->can.data_bittiming_const =
+ m_can_dev->can.bittiming_const = &m_can_bittiming_const_31X;
+ m_can_dev->can.data_bittiming_const =
&m_can_data_bittiming_const_31X;
- priv->can.ctrlmode_supported |= (m_can_niso_supported(priv)
+ m_can_dev->can.ctrlmode_supported |= (m_can_niso_supported(m_can_dev)
? CAN_CTRLMODE_FD_NON_ISO
: 0);
break;
default:
- dev_err(&pdev->dev, "Unsupported version number: %2d",
- priv->version);
+ dev_err(m_can_dev->dev, "Unsupported version number: %2d",
+ m_can_dev->version);
return -EINVAL;
}
@@ -1307,7 +1319,7 @@ static int m_can_dev_setup(struct platform_device *pdev, struct net_device *dev,
static int m_can_open(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
int err;
err = m_can_clk_start(priv);
@@ -1347,7 +1359,7 @@ static int m_can_open(struct net_device *dev)
static void m_can_stop(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
/* disable all interrupts */
m_can_disable_all_interrupts(priv);
@@ -1358,7 +1370,7 @@ static void m_can_stop(struct net_device *dev)
static int m_can_close(struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
netif_stop_queue(dev);
napi_disable(&priv->napi);
@@ -1373,7 +1385,7 @@ static int m_can_close(struct net_device *dev)
static int m_can_next_echo_skb_occupied(struct net_device *dev, int putidx)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
/*get wrap around for loopback skb index */
unsigned int wrap = priv->can.echo_skb_max;
int next_idx;
@@ -1388,7 +1400,7 @@ static int m_can_next_echo_skb_occupied(struct net_device *dev, int putidx)
static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,
struct net_device *dev)
{
- struct m_can_priv *priv = netdev_priv(dev);
+ struct m_can_classdev *priv = netdev_priv(dev);
struct canfd_frame *cf = (struct canfd_frame *)skb->data;
u32 id, cccr, fdflags;
int i;
@@ -1515,21 +1527,7 @@ static int register_m_can_dev(struct net_device *dev)
return register_candev(dev);
}
-static void m_can_init_ram(struct m_can_priv *priv)
-{
- int end, i, start;
-
- /* initialize the entire Message RAM in use to avoid possible
- * ECC/parity checksum errors when reading an uninitialized buffer
- */
- start = priv->mcfg[MRAM_SIDF].off;
- end = priv->mcfg[MRAM_TXB].off +
- priv->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;
- for (i = start; i < end; i += 4)
- writel(0x0, priv->mram_base + i);
-}
-
-static void m_can_of_parse_mram(struct m_can_priv *priv,
+static void m_can_of_parse_mram(struct m_can_classdev *priv,
const u32 *mram_config_vals)
{
priv->mcfg[MRAM_SIDF].off = mram_config_vals[0];
@@ -1556,7 +1554,7 @@ static void m_can_of_parse_mram(struct m_can_priv *priv,
priv->mcfg[MRAM_TXB].num = mram_config_vals[7] &
(TXBC_NDTB_MASK >> TXBC_NDTB_SHIFT);
- dev_dbg(priv->device,
+ dev_dbg(priv->dev,
"mram_base %p sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",
priv->mram_base,
priv->mcfg[MRAM_SIDF].off, priv->mcfg[MRAM_SIDF].num,
@@ -1566,63 +1564,57 @@ static void m_can_of_parse_mram(struct m_can_priv *priv,
priv->mcfg[MRAM_RXB].off, priv->mcfg[MRAM_RXB].num,
priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num,
priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num);
-
- m_can_init_ram(priv);
}
-static int m_can_plat_probe(struct platform_device *pdev)
+void m_can_init_ram(struct m_can_classdev *priv)
{
- struct net_device *dev;
- struct m_can_priv *priv;
- struct resource *res;
- void __iomem *addr;
- void __iomem *mram_addr;
- struct clk *hclk, *cclk;
- int irq, ret;
- struct device_node *np;
- u32 mram_config_vals[MRAM_CFG_LEN];
- u32 tx_fifo_size;
-
- np = pdev->dev.of_node;
+ int end, i, start;
- hclk = devm_clk_get(&pdev->dev, "hclk");
- cclk = devm_clk_get(&pdev->dev, "cclk");
+ /* initialize the entire Message RAM in use to avoid possible
+ * ECC/parity checksum errors when reading an uninitialized buffer
+ */
+ start = priv->mcfg[MRAM_SIDF].off;
+ end = priv->mcfg[MRAM_TXB].off +
+ priv->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;
- if (IS_ERR(hclk) || IS_ERR(cclk)) {
- dev_err(&pdev->dev, "no clock found\n");
- ret = -ENODEV;
- goto failed_ret;
+ for (i = start; i < end; i += 4) {
+ if (priv->mram_start)
+ m_can_write(priv, priv->mram_start + i, 0x0);
+ else
+ writel(0x0, priv->mram_base + i);
}
+}
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");
- addr = devm_ioremap_resource(&pdev->dev, res);
- irq = platform_get_irq_byname(pdev, "int0");
+int m_can_core_get_clocks(struct m_can_classdev *m_can_dev)
+{
+ int ret = 0;
- if (IS_ERR(addr) || irq < 0) {
- ret = -EINVAL;
- goto failed_ret;
- }
+ m_can_dev->hclk = devm_clk_get(m_can_dev->dev, "hclk");
+ m_can_dev->cclk = devm_clk_get(m_can_dev->dev, "cclk");
- /* message ram could be shared */
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");
- if (!res) {
+ if (IS_ERR(m_can_dev->cclk)) {
+ dev_err(m_can_dev->dev, "no clock found\n");
ret = -ENODEV;
- goto failed_ret;
}
- mram_addr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
- if (!mram_addr) {
- ret = -ENOMEM;
- goto failed_ret;
- }
+ return ret;
+}
+
+struct m_can_classdev *m_can_core_allocate_dev(struct device *dev)
+{
+ struct m_can_classdev *class_dev = NULL;
+ u32 mram_config_vals[MRAM_CFG_LEN];
+ struct net_device *net_dev;
+ u32 tx_fifo_size;
+ int ret;
- /* get message ram configuration */
- ret = of_property_read_u32_array(np, "bosch,mram-cfg",
- mram_config_vals,
- sizeof(mram_config_vals) / 4);
+ ret = fwnode_property_read_u32_array(dev_fwnode(dev),
+ "bosch,mram-cfg",
+ mram_config_vals,
+ sizeof(mram_config_vals) / 4);
if (ret) {
- dev_err(&pdev->dev, "Could not get Message RAM configuration.");
- goto failed_ret;
+ dev_err(dev, "Could not get Message RAM configuration.");
+ goto out;
}
/* Get TX FIFO size
@@ -1631,69 +1623,76 @@ static int m_can_plat_probe(struct platform_device *pdev)
tx_fifo_size = mram_config_vals[7];
/* allocate the m_can device */
- dev = alloc_candev(sizeof(*priv), tx_fifo_size);
- if (!dev) {
- ret = -ENOMEM;
- goto failed_ret;
+ net_dev = alloc_candev(sizeof(*class_dev), tx_fifo_size);
+ if (!net_dev) {
+ dev_err(dev, "Failed to allocate CAN device");
+ goto out;
}
- priv = netdev_priv(dev);
- dev->irq = irq;
- priv->device = &pdev->dev;
- priv->hclk = hclk;
- priv->cclk = cclk;
- priv->can.clock.freq = clk_get_rate(cclk);
- priv->mram_base = mram_addr;
+ class_dev = netdev_priv(net_dev);
+ if (!class_dev) {
+ dev_err(dev, "Failed to init netdev private");
+ goto out;
+ }
- platform_set_drvdata(pdev, dev);
- SET_NETDEV_DEV(dev, &pdev->dev);
+ class_dev->net = net_dev;
+ class_dev->dev = dev;
+ SET_NETDEV_DEV(net_dev, dev);
- /* Enable clocks. Necessary to read Core Release in order to determine
- * M_CAN version
- */
- pm_runtime_enable(&pdev->dev);
- ret = m_can_clk_start(priv);
- if (ret)
- goto pm_runtime_fail;
+ m_can_of_parse_mram(class_dev, mram_config_vals);
+out:
+ return class_dev;
+}
+
+int m_can_core_register(struct m_can_classdev *m_can_dev)
+{
+ int ret;
- ret = m_can_dev_setup(pdev, dev, addr);
+ if (m_can_dev->pm_clock_support) {
+ pm_runtime_enable(m_can_dev->dev);
+ ret = m_can_clk_start(m_can_dev);
+ if (ret)
+ goto pm_runtime_fail;
+ }
+
+ ret = m_can_dev_setup(m_can_dev->net);
if (ret)
goto clk_disable;
- ret = register_m_can_dev(dev);
+ ret = register_m_can_dev(m_can_dev->net);
if (ret) {
- dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
- KBUILD_MODNAME, ret);
+ dev_err(m_can_dev->dev, "registering %s failed (err=%d)\n",
+ m_can_dev->net->name, ret);
goto clk_disable;
}
- m_can_of_parse_mram(priv, mram_config_vals);
+ devm_can_led_init(m_can_dev->net);
- devm_can_led_init(dev);
+ of_can_transceiver(m_can_dev->net);
- of_can_transceiver(dev);
+ dev_info(m_can_dev->dev, "%s device registered (irq=%d, version=%d)\n",
+ KBUILD_MODNAME, m_can_dev->net->irq, m_can_dev->version);
- dev_info(&pdev->dev, "%s device registered (irq=%d, version=%d)\n",
- KBUILD_MODNAME, dev->irq, priv->version);
+ m_can_set_bittiming(m_can_dev->net);
/* Probe finished
* Stop clocks. They will be reactivated once the M_CAN device is opened
*/
clk_disable:
- m_can_clk_stop(priv);
+ m_can_clk_stop(m_can_dev);
pm_runtime_fail:
if (ret) {
- pm_runtime_disable(&pdev->dev);
- free_candev(dev);
+ pm_runtime_disable(m_can_dev->dev);
+ free_candev(m_can_dev->net);
}
-failed_ret:
+
return ret;
}
-static __maybe_unused int m_can_suspend(struct device *dev)
+int m_can_core_suspend(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
if (netif_running(ndev)) {
netif_stop_queue(ndev);
@@ -1709,10 +1708,10 @@ static __maybe_unused int m_can_suspend(struct device *dev)
return 0;
}
-static __maybe_unused int m_can_resume(struct device *dev)
+int m_can_core_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
pinctrl_pm_select_default_state(dev);
@@ -1747,8 +1746,6 @@ static int m_can_plat_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
- platform_set_drvdata(pdev, NULL);
-
free_candev(dev);
return 0;
@@ -1757,7 +1754,7 @@ static int m_can_plat_remove(struct platform_device *pdev)
static int __maybe_unused m_can_runtime_suspend(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
clk_disable_unprepare(priv->cclk);
clk_disable_unprepare(priv->hclk);
@@ -1768,7 +1765,7 @@ static int __maybe_unused m_can_runtime_suspend(struct device *dev)
static int __maybe_unused m_can_runtime_resume(struct device *dev)
{
struct net_device *ndev = dev_get_drvdata(dev);
- struct m_can_priv *priv = netdev_priv(ndev);
+ struct m_can_classdev *priv = netdev_priv(ndev);
int err;
err = clk_prepare_enable(priv->hclk);
@@ -1782,30 +1779,6 @@ static int __maybe_unused m_can_runtime_resume(struct device *dev)
return err;
}
-static const struct dev_pm_ops m_can_pmops = {
- SET_RUNTIME_PM_OPS(m_can_runtime_suspend,
- m_can_runtime_resume, NULL)
- SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)
-};
-
-static const struct of_device_id m_can_of_table[] = {
- { .compatible = "bosch,m_can", .data = NULL },
- { /* sentinel */ },
-};
-MODULE_DEVICE_TABLE(of, m_can_of_table);
-
-static struct platform_driver m_can_plat_driver = {
- .driver = {
- .name = KBUILD_MODNAME,
- .of_match_table = m_can_of_table,
- .pm = &m_can_pmops,
- },
- .probe = m_can_plat_probe,
- .remove = m_can_plat_remove,
-};
-
-module_platform_driver(m_can_plat_driver);
-
MODULE_AUTHOR("Dong Aisheng <b29396@freescale.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("CAN bus driver for Bosch M_CAN controller");
diff --git a/drivers/net/can/m_can/m_can_core.h b/drivers/net/can/m_can/m_can_core.h
new file mode 100644
index 000000000000..2a83aff323e9
--- /dev/null
+++ b/drivers/net/can/m_can/m_can_core.h
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+
+#ifndef _CAN_M_CAN_CORE_H_
+#define _CAN_M_CAN_CORE_H_
+
+#include <linux/can/core.h>
+#include <linux/can/led.h>
+#include <linux/completion.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/freezer.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/iopoll.h>
+#include <linux/can/dev.h>
+#include <linux/pinctrl/consumer.h>
+
+/* m_can lec values */
+enum m_can_lec_type {
+ LEC_NO_ERROR = 0,
+ LEC_STUFF_ERROR,
+ LEC_FORM_ERROR,
+ LEC_ACK_ERROR,
+ LEC_BIT1_ERROR,
+ LEC_BIT0_ERROR,
+ LEC_CRC_ERROR,
+ LEC_UNUSED,
+};
+
+enum m_can_mram_cfg {
+ MRAM_SIDF = 0,
+ MRAM_XIDF,
+ MRAM_RXF0,
+ MRAM_RXF1,
+ MRAM_RXB,
+ MRAM_TXE,
+ MRAM_TXB,
+ MRAM_CFG_NUM,
+};
+
+/* address offset and element number for each FIFO/Buffer in the Message RAM */
+struct mram_cfg {
+ u16 off;
+ u8 num;
+};
+
+struct m_can_classdev {
+ struct can_priv can;
+ struct napi_struct napi;
+ struct net_device *net;
+ struct device *dev;
+ struct clk *hclk;
+ struct clk *cclk;
+
+ void *device_data;
+
+ int version;
+ int freq;
+ u32 irqstatus;
+
+ u32 (*m_can_read) (const struct m_can_classdev *m_can_class, int reg);
+ int (*m_can_write) (const struct m_can_classdev *m_can_class, int reg, int val);
+ u32 (*m_can_fifo_read) (const struct m_can_classdev *m_can_class, int reg);
+ int (*m_can_fifo_write) (const struct m_can_classdev *m_can_class, int reg, int val);
+ u32 (*m_can_txe_fifo_read) (const struct m_can_classdev *m_can_class);
+
+ /* Memory mapped ip */
+ void __iomem *base;
+ void __iomem *mram_addr;
+ void __iomem *mram_base;
+
+ /* Register based ip */
+ int reg_offset;
+ int mram_start;
+ int pm_clock_support;
+
+ struct mram_cfg mcfg[MRAM_CFG_NUM];
+};
+
+struct m_can_classdev *m_can_core_allocate_dev(struct device *dev);
+int m_can_core_register(struct m_can_classdev *m_can_dev);
+int m_can_core_get_clocks(struct m_can_classdev *m_can_dev);
+void m_can_init_ram(struct m_can_classdev *priv);
+void m_can_config_endisable(const struct m_can_classdev *priv, bool enable);
+
+int m_can_core_suspend(struct device *dev);
+int m_can_core_resume(struct device *dev);
+
+#endif /* _CAN_M_CAN_CORE_H_ */
--
2.19.0
^ permalink raw reply related
* [RFC PATCH 0/3] M_CAN Framework rework
From: Dan Murphy @ 2018-10-10 14:20 UTC (permalink / raw)
To: wg, mkl, davem; +Cc: linux-can, netdev, linux-kernel, Dan Murphy
All
This patch series creates a m_can core framework that devices can register
to. The m_can core manages the Bosch IP and CAN frames. Each device that
is registered is responsible for managing device specific functions.
This rewrite was suggested in a device driver submission for the TCAN4x5x
device
Reference upstream post:
https://lore.kernel.org/patchwork/patch/984163/
For instance the TCAN device is a SPI device that uses a specific data payload to
determine writes and reads. In addition the device has a reset input as well
as a wakeup pin. The register offset of the m_can registers differs and must
be set by the device attached to the core.
The m_can core will use iomapped writes and reads as the default mechanism for
writing and reading. The device driver can provide over rides for this.
This patch series is not complete as it does not handle the CAN interrupts
nor can perform a CAN write. If this patch series is deemed acceptable I will
finish debugging the driver and post a non RFC series.
Finally I did attempt to reduce the first patch with various git format patch
directives but none seemed to reduce the patch.
Dan
Dan Murphy (3):
can: m_can: Create m_can core to leverage common code
dt-bindings: can: tcan4x5x: Add DT bindings for TCAN4x5X driver
can: tcan4x5x: Add tcan4x5x driver to the kernel
.../devicetree/bindings/net/can/tcan4x5x.txt | 34 +
drivers/net/can/m_can/Kconfig | 18 +
drivers/net/can/m_can/Makefile | 4 +-
drivers/net/can/m_can/m_can.c | 1683 +----------------
.../net/can/m_can/{m_can.c => m_can_core.c} | 479 +++--
drivers/net/can/m_can/m_can_core.h | 100 +
drivers/net/can/m_can/tcan4x5x.c | 321 ++++
7 files changed, 722 insertions(+), 1917 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/can/tcan4x5x.txt
copy drivers/net/can/m_can/{m_can.c => m_can_core.c} (83%)
create mode 100644 drivers/net/can/m_can/m_can_core.h
create mode 100644 drivers/net/can/m_can/tcan4x5x.c
--
2.19.0
^ permalink raw reply
* [PATCH rdma-next] IB/mlx5: Add support for extended atomic operations
From: Leon Romanovsky @ 2018-10-10 6:25 UTC (permalink / raw)
To: Doug Ledford, Jason Gunthorpe
Cc: Yonatan Cohen, RDMA mailing list, Guy Levi, Saeed Mahameed,
linux-netdev, Leon Romanovsky
From: Yonatan Cohen <yonatanc@mellanox.com>
Extended atomic operations cmp&swp and fetch&add is a Mellanox
feature extending the standard atomic operation to use, varied
operand sizes, as apposed to normal atomic operation that use
an 8 byte operand only.
Extended atomics allows masking the results and arguments.
This patch configures QP to support extended atomic operation
with the maximum size possible, as exposed by HCA capabilities.
Signed-off-by: Yonatan Cohen <yonatanc@mellanox.com>
Reviewed-by: Guy Levi <guyle@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
---
drivers/infiniband/hw/mlx5/qp.c | 96 +++++++++++++++++++++++++++++++++++------
include/linux/mlx5/driver.h | 23 +++++-----
2 files changed, 95 insertions(+), 24 deletions(-)
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index 1a6f34ea2f5d..027697c5b75b 100644
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -1733,6 +1733,53 @@ static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,
MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE);
}
+static int atomic_size_to_mode(int size_mask)
+{
+ /* driver does not support atomic_size > 256B
+ * and does not know how to translate bigger sizes
+ */
+ int supported_size_mask = size_mask & 0x1ff;
+ int log_max_size;
+
+ if (!supported_size_mask)
+ return -EOPNOTSUPP;
+
+ log_max_size = __fls(supported_size_mask);
+
+ if (log_max_size > 3)
+ return log_max_size;
+
+ return MLX5_ATOMIC_MODE_8B;
+}
+
+static int get_atomic_mode(struct mlx5_ib_dev *dev,
+ enum ib_qp_type qp_type)
+{
+ u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
+ u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
+ int atomic_mode = -EOPNOTSUPP;
+ int atomic_size_mask;
+
+ if (!atomic)
+ return -EOPNOTSUPP;
+
+ if (qp_type == MLX5_IB_QPT_DCT)
+ atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
+ else
+ atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
+
+ if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) ||
+ (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD))
+ atomic_mode = atomic_size_to_mode(atomic_size_mask);
+
+ if (atomic_mode <= 0 &&
+ (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP &&
+ atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD))
+ atomic_mode = MLX5_ATOMIC_MODE_IB_COMP;
+
+ return atomic_mode;
+}
+
static inline bool check_flags_mask(uint64_t input, uint64_t supported)
{
return (input & ~supported) == 0;
@@ -2562,13 +2609,15 @@ int mlx5_ib_destroy_qp(struct ib_qp *qp)
return 0;
}
-static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_attr *attr,
- int attr_mask)
+static int to_mlx5_access_flags(struct mlx5_ib_qp *qp,
+ const struct ib_qp_attr *attr,
+ int attr_mask, __be32 *hw_access_flags)
{
- u32 hw_access_flags = 0;
u8 dest_rd_atomic;
u32 access_flags;
+ struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device);
+
if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
dest_rd_atomic = attr->max_dest_rd_atomic;
else
@@ -2583,13 +2632,25 @@ static __be32 to_mlx5_access_flags(struct mlx5_ib_qp *qp, const struct ib_qp_att
access_flags &= IB_ACCESS_REMOTE_WRITE;
if (access_flags & IB_ACCESS_REMOTE_READ)
- hw_access_flags |= MLX5_QP_BIT_RRE;
- if (access_flags & IB_ACCESS_REMOTE_ATOMIC)
- hw_access_flags |= (MLX5_QP_BIT_RAE | MLX5_ATOMIC_MODE_CX);
+ *hw_access_flags |= MLX5_QP_BIT_RRE;
+ if ((access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
+ qp->ibqp.qp_type == IB_QPT_RC) {
+ int atomic_mode;
+
+ atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type);
+ if (atomic_mode < 0)
+ return -EOPNOTSUPP;
+
+ *hw_access_flags |= MLX5_QP_BIT_RAE;
+ *hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET;
+ }
+
if (access_flags & IB_ACCESS_REMOTE_WRITE)
- hw_access_flags |= MLX5_QP_BIT_RWE;
+ *hw_access_flags |= MLX5_QP_BIT_RWE;
+
+ *hw_access_flags = cpu_to_be32(*hw_access_flags);
- return cpu_to_be32(hw_access_flags);
+ return 0;
}
enum {
@@ -3287,8 +3348,15 @@ static int __mlx5_ib_modify_qp(struct ib_qp *ibqp,
cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21);
}
- if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC))
- context->params2 |= to_mlx5_access_flags(qp, attr, attr_mask);
+ if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) {
+ __be32 access_flags = 0;
+
+ err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags);
+ if (err)
+ goto out;
+
+ context->params2 |= access_flags;
+ }
if (attr_mask & IB_QP_MIN_RNR_TIMER)
context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24);
@@ -3504,10 +3572,14 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
MLX5_SET(dctc, dctc, rwe, 1);
if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
- if (!mlx5_ib_dc_atomic_is_supported(dev))
+ int atomic_mode;
+
+ atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT);
+ if (atomic_mode < 0)
return -EOPNOTSUPP;
+
+ MLX5_SET(dctc, dctc, atomic_mode, atomic_mode);
MLX5_SET(dctc, dctc, rae, 1);
- MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX);
}
MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index);
MLX5_SET(dctc, dctc, port, attr->port_num);
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index e2fa59f98ff8..024668c993f2 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -97,14 +97,15 @@ enum {
};
enum {
- MLX5_ATOMIC_MODE_IB_COMP = 1 << 16,
- MLX5_ATOMIC_MODE_CX = 2 << 16,
- MLX5_ATOMIC_MODE_8B = 3 << 16,
- MLX5_ATOMIC_MODE_16B = 4 << 16,
- MLX5_ATOMIC_MODE_32B = 5 << 16,
- MLX5_ATOMIC_MODE_64B = 6 << 16,
- MLX5_ATOMIC_MODE_128B = 7 << 16,
- MLX5_ATOMIC_MODE_256B = 8 << 16,
+ MLX5_ATOMIC_MODE_OFFSET = 16,
+ MLX5_ATOMIC_MODE_IB_COMP = 1,
+ MLX5_ATOMIC_MODE_CX = 2,
+ MLX5_ATOMIC_MODE_8B = 3,
+ MLX5_ATOMIC_MODE_16B = 4,
+ MLX5_ATOMIC_MODE_32B = 5,
+ MLX5_ATOMIC_MODE_64B = 6,
+ MLX5_ATOMIC_MODE_128B = 7,
+ MLX5_ATOMIC_MODE_256B = 8,
};
enum {
@@ -162,13 +163,11 @@ enum mlx5_dcbx_oper_mode {
MLX5E_DCBX_PARAM_VER_OPER_AUTO = 0x3,
};
-enum mlx5_dct_atomic_mode {
- MLX5_ATOMIC_MODE_DCT_CX = 2,
-};
-
enum {
MLX5_ATOMIC_OPS_CMP_SWAP = 1 << 0,
MLX5_ATOMIC_OPS_FETCH_ADD = 1 << 1,
+ MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP = 1 << 2,
+ MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD = 1 << 3,
};
enum mlx5_page_fault_resume_flags {
^ permalink raw reply related
* [PATCH net 3/3] devlink: Add helper function for safely copy string param
From: Moshe Shemesh @ 2018-10-10 13:09 UTC (permalink / raw)
To: David S. Miller; +Cc: Jiri Pirko, netdev, linux-kernel, Moshe Shemesh
In-Reply-To: <1539176967-22172-1-git-send-email-moshe@mellanox.com>
Devlink string param buffer is allocated at the size of
DEVLINK_PARAM_MAX_STRING_VALUE. Add helper function which makes sure
this size is not exceeded.
Renamed DEVLINK_PARAM_MAX_STRING_VALUE to
__DEVLINK_PARAM_MAX_STRING_VALUE to emphasize that it should be used by
devlink only. The driver should use the helper function instead to
verify it doesn't exceed the allowed length.
Signed-off-by: Moshe Shemesh <moshe@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
---
include/net/devlink.h | 12 ++++++++++--
net/core/devlink.c | 19 ++++++++++++++++++-
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index b0e17c0..99efc15 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -298,7 +298,7 @@ struct devlink_resource {
#define DEVLINK_RESOURCE_ID_PARENT_TOP 0
-#define DEVLINK_PARAM_MAX_STRING_VALUE 32
+#define __DEVLINK_PARAM_MAX_STRING_VALUE 32
enum devlink_param_type {
DEVLINK_PARAM_TYPE_U8,
DEVLINK_PARAM_TYPE_U16,
@@ -311,7 +311,7 @@ enum devlink_param_type {
u8 vu8;
u16 vu16;
u32 vu32;
- char vstr[DEVLINK_PARAM_MAX_STRING_VALUE];
+ char vstr[__DEVLINK_PARAM_MAX_STRING_VALUE];
bool vbool;
};
@@ -553,6 +553,8 @@ int devlink_param_driverinit_value_get(struct devlink *devlink, u32 param_id,
int devlink_param_driverinit_value_set(struct devlink *devlink, u32 param_id,
union devlink_param_value init_val);
void devlink_param_value_changed(struct devlink *devlink, u32 param_id);
+void devlink_param_value_str_fill(union devlink_param_value *dst_val,
+ const char *src);
struct devlink_region *devlink_region_create(struct devlink *devlink,
const char *region_name,
u32 region_max_snapshots,
@@ -789,6 +791,12 @@ static inline bool devlink_dpipe_table_counter_enabled(struct devlink *devlink,
{
}
+static inline void
+devlink_param_value_str_fill(union devlink_param_value *dst_val,
+ const char *src)
+{
+}
+
static inline struct devlink_region *
devlink_region_create(struct devlink *devlink,
const char *region_name,
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 1a0de16..6bc4293 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -3015,7 +3015,7 @@ static int devlink_nl_cmd_param_get_dumpit(struct sk_buff *msg,
len = strnlen(nla_data(info->attrs[DEVLINK_ATTR_PARAM_VALUE_DATA]),
nla_len(info->attrs[DEVLINK_ATTR_PARAM_VALUE_DATA]));
if (len == nla_len(info->attrs[DEVLINK_ATTR_PARAM_VALUE_DATA]) ||
- len >= DEVLINK_PARAM_MAX_STRING_VALUE)
+ len >= __DEVLINK_PARAM_MAX_STRING_VALUE)
return -EINVAL;
strcpy(value->vstr,
nla_data(info->attrs[DEVLINK_ATTR_PARAM_VALUE_DATA]));
@@ -4618,6 +4618,23 @@ void devlink_param_value_changed(struct devlink *devlink, u32 param_id)
EXPORT_SYMBOL_GPL(devlink_param_value_changed);
/**
+ * devlink_param_value_str_fill - Safely fill-up the string preventing
+ * from overflow of the preallocated buffer
+ *
+ * @dst_val: destination devlink_param_value
+ * @src: source buffer
+ */
+void devlink_param_value_str_fill(union devlink_param_value *dst_val,
+ const char *src)
+{
+ size_t len;
+
+ len = strlcpy(dst_val->vstr, src, __DEVLINK_PARAM_MAX_STRING_VALUE);
+ WARN_ON(len >= __DEVLINK_PARAM_MAX_STRING_VALUE);
+}
+EXPORT_SYMBOL_GPL(devlink_param_value_str_fill);
+
+/**
* devlink_region_create - create a new address region
*
* @devlink: devlink
--
1.8.3.1
^ permalink raw reply related
* [PATCH net 2/3] devlink: Fix param cmode driverinit for string type
From: Moshe Shemesh @ 2018-10-10 13:09 UTC (permalink / raw)
To: David S. Miller; +Cc: Jiri Pirko, netdev, linux-kernel, Moshe Shemesh
In-Reply-To: <1539176967-22172-1-git-send-email-moshe@mellanox.com>
Driverinit configuration mode value is held by devlink to enable the
driver fetch the value after reload command. In case the param type is
string devlink should copy the value from driver string buffer to
devlink string buffer on devlink_param_driverinit_value_set() and
vice-versa on devlink_param_driverinit_value_get().
Fixes: ec01aeb1803e ("devlink: Add support for get/set driverinit value")
Signed-off-by: Moshe Shemesh <moshe@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
---
net/core/devlink.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/net/core/devlink.c b/net/core/devlink.c
index d808af7..1a0de16 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -3105,7 +3105,10 @@ static int devlink_nl_cmd_param_set_doit(struct sk_buff *skb,
return -EOPNOTSUPP;
if (cmode == DEVLINK_PARAM_CMODE_DRIVERINIT) {
- param_item->driverinit_value = value;
+ if (param->type == DEVLINK_PARAM_TYPE_STRING)
+ strcpy(param_item->driverinit_value.vstr, value.vstr);
+ else
+ param_item->driverinit_value = value;
param_item->driverinit_value_valid = true;
} else {
if (!param->set)
@@ -4545,7 +4548,10 @@ int devlink_param_driverinit_value_get(struct devlink *devlink, u32 param_id,
DEVLINK_PARAM_CMODE_DRIVERINIT))
return -EOPNOTSUPP;
- *init_val = param_item->driverinit_value;
+ if (param_item->param->type == DEVLINK_PARAM_TYPE_STRING)
+ strcpy(init_val->vstr, param_item->driverinit_value.vstr);
+ else
+ *init_val = param_item->driverinit_value;
return 0;
}
@@ -4576,7 +4582,10 @@ int devlink_param_driverinit_value_set(struct devlink *devlink, u32 param_id,
DEVLINK_PARAM_CMODE_DRIVERINIT))
return -EOPNOTSUPP;
- param_item->driverinit_value = init_val;
+ if (param_item->param->type == DEVLINK_PARAM_TYPE_STRING)
+ strcpy(param_item->driverinit_value.vstr, init_val.vstr);
+ else
+ param_item->driverinit_value = init_val;
param_item->driverinit_value_valid = true;
devlink_param_notify(devlink, param_item, DEVLINK_CMD_PARAM_NEW);
--
1.8.3.1
^ permalink raw reply related
* [PATCH net 0/3] devlink param type string fixes
From: Moshe Shemesh @ 2018-10-10 13:09 UTC (permalink / raw)
To: David S. Miller; +Cc: Jiri Pirko, netdev, linux-kernel, Moshe Shemesh
This patchset fixes devlink param infrastructure for string param type.
The devlink param infrastructure doesn't handle copying the string data
correctly. The first two patches fix it and the third patch adds helper
function to safely copy string value without exceeding
DEVLINK_PARAM_MAX_STRING_VALUE.
Moshe Shemesh (3):
devlink: Fix param set handling for string type
devlink: Fix param cmode driverinit for string type
devlink: Add helper function for safely copy string param
include/net/devlink.h | 12 ++++++++++--
net/core/devlink.c | 43 +++++++++++++++++++++++++++++++++++++------
2 files changed, 47 insertions(+), 8 deletions(-)
--
1.8.3.1
^ permalink raw reply
* Inquiry 09-10-2018
From: Daniel Murray @ 2018-10-09 12:05 UTC (permalink / raw)
To: netdev
Hi,friend,
This is Daniel Murray and i am from Sinara Group Co.Ltd Group Co.,LTD in Russia.
We are glad to know about your company from the web and we are interested in your products.
Could you kindly send us your Latest catalog and price list for our trial order.
Best Regards,
Daniel Murray
Purchasing Manager
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox