[PATCH v2] gpu: nova-core: clarify FSP ordering in the chipset table

[John Hubbard <jhubbard@nvidia.com>]

The Chipset enum lists GPUs in chip-ID order, but FSP capability does
not follow that order. Hopper and Blackwell boot the GSP via FSP, while
Ada, whose chip IDs fall numerically between Hopper and Blackwell, uses
the older SEC2 booter path instead. Add a comment so the table ordering
does not suggest that everything past Hopper uses FSP.

Suggested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
---

Changes since v1 [1]:

* Keep the existing "Hopper and later" wording in uses_fsp() rather than
  changing it, and put the clarification entirely in the chipset table
  comment (Timur Tabi).

* Reword that comment to describe the Hopper/Ada chip-ID inversion and to
  say "Hopper and later" excludes Ada and means Hopper, Blackwell, Rubin,
  and everything after that, so it stays correct once Rubin is added
  (Timur Tabi).

[1] https://lore.kernel.org/all/20260610234128.547952-1-jhubbard@nvidia.com/


 drivers/gpu/nova-core/gpu.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index b3c91731db45..20b59bb6b7d9 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -91,6 +91,10 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
     GA104 = 0x174,
     GA106 = 0x176,
     GA107 = 0x177,
+    // Chip IDs are in numerical order, which does not match FSP capability. Hopper (GH100) has a
+    // lower chip ID than Ada (AD10x), yet Hopper boots the GSP via FSP while Ada uses the older
+    // SEC2 booter. We therefore consider Hopper to be after Ada, so "Hopper and later" excludes
+    // Ada and means Hopper, Blackwell, Rubin, and everything after that.
     // Hopper
     GH100 = 0x180,
     // Ada

base-commit: 550dc7536644db2d67c6f8cf525bba682fba08d9
-- 
2.54.0