[PATCH 3/5] gpu: nova-core: read GSP heap variables from TLV

[Timur Tabi <ttabi@nvidia.com>]

Update Nova-core to read and store the new heap size variables from
gsp.tlv.  This change adds code that reads and stores the values and
also provides a constructor that uses them.

GSP-RM firmware TLVs (specifically gsp.tlv) that are based on r615 and
later contain an additional six variables that contain values used
to specify various heap sizes that GSP-RM needs in order to boot.
These values are specific to each GPU and RM version, and are obtained
by scraping them from the OpenRM source tree, just like every other
TLV variable.

Signed-off-by: Timur Tabi <ttabi@nvidia.com>
---
 drivers/gpu/nova-core/firmware/tlv.rs |  1 -
 drivers/gpu/nova-core/gsp/fw.rs       | 56 ++++++++++++++++++++++++++-
 2 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/nova-core/firmware/tlv.rs b/drivers/gpu/nova-core/firmware/tlv.rs
index 75d8f907421b..0b79268c6dfb 100644
--- a/drivers/gpu/nova-core/firmware/tlv.rs
+++ b/drivers/gpu/nova-core/firmware/tlv.rs
@@ -258,7 +258,6 @@ pub(crate) fn load_file(
     }
 
     /// Return a u64, from either a 32-bit or 64-bit little-endian tag.
-    #[expect(unused)]
     pub(crate) fn get_u64(&self, tag: &[u8; 4]) -> Result<u64> {
         let value = self.get_bytes(tag)?;
 
diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
index f30819fd89c2..f0edae9656d8 100644
--- a/drivers/gpu/nova-core/gsp/fw.rs
+++ b/drivers/gpu/nova-core/gsp/fw.rs
@@ -37,7 +37,8 @@
     },
     firmware::{
         bindata::UcodesImage,
-        gsp::GspFirmware, //
+        gsp::GspFirmware,
+        tlv::Tlv, //
     },
     gpu::{
         Architecture,
@@ -74,6 +75,19 @@ pub(crate) struct GspFwHeapParams {
     carveout_size: u64,
     /// The minimum and maximum sizes allowed for the GSP FW heap, in bytes.
     allowed_heap_size: Range<u64>,
+
+    #[expect(unused)]
+    tlv_gsp_fw_heap_base_size: u64,
+    #[expect(unused)]
+    tlv_gsp_hw_heap_size_per_gb: u64,
+    #[expect(unused)]
+    tlv_gsp_fw_heap_base_size_vgpu: u64,
+    #[expect(unused)]
+    tlv_gsp_fw_heap_size_per_vm: u64,
+    #[expect(unused)]
+    tlv_pmu_reserved_size: u32,
+    #[expect(unused)]
+    tlv_non_wpr_heap_size: u64,
 }
 
 /// Minimum required alignment for the GSP heap.
@@ -88,6 +102,13 @@ fn libos2() -> Self {
             allowed_heap_size: cv!(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_MIN_MB => u64)
                 * u64::SZ_1M
                 ..cv!(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_MAX_MB => u64) * u64::SZ_1M,
+
+            tlv_gsp_fw_heap_base_size: 0,
+            tlv_gsp_hw_heap_size_per_gb: 0,
+            tlv_gsp_fw_heap_base_size_vgpu: 0,
+            tlv_gsp_fw_heap_size_per_vm: 0,
+            tlv_pmu_reserved_size: 0,
+            tlv_non_wpr_heap_size: 0,
         }
     }
 
@@ -101,6 +122,13 @@ fn libos3() -> Self {
                 * u64::SZ_1M
                 ..cv!(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_BAREMETAL_MAX_MB => u64)
                     * u64::SZ_1M,
+
+            tlv_gsp_fw_heap_base_size: 0,
+            tlv_gsp_hw_heap_size_per_gb: 0,
+            tlv_gsp_fw_heap_base_size_vgpu: 0,
+            tlv_gsp_fw_heap_size_per_vm: 0,
+            tlv_pmu_reserved_size: 0,
+            tlv_non_wpr_heap_size: 0,
         }
     }
 
@@ -112,6 +140,13 @@ fn libos3_gh100() -> Self {
             base_rm_size: cv!(bindings::GSP_FW_HEAP_PARAM_BASE_RM_SIZE_GH100),
             carveout_size: base.carveout_size,
             allowed_heap_size: base.allowed_heap_size,
+
+            tlv_gsp_fw_heap_base_size: 0,
+            tlv_gsp_hw_heap_size_per_gb: 0,
+            tlv_gsp_fw_heap_base_size_vgpu: 0,
+            tlv_gsp_fw_heap_size_per_vm: 0,
+            tlv_pmu_reserved_size: 0,
+            tlv_non_wpr_heap_size: 0,
         }
     }
 
@@ -127,6 +162,25 @@ pub(crate) fn from_chipset(chipset: Chipset) -> Self {
         }
     }
 
+    /// Returns the heap parameters from the TLV
+    #[expect(unused)]
+    pub(crate) fn from_tlv(tlv: &Tlv<'_>) -> Result<Self> {
+        Ok(Self {
+            // These three fields are not used for TLV-based implementations,
+            // so assign dummy values to them for now.
+            base_rm_size: 0,
+            carveout_size: 0,
+            allowed_heap_size: u64::MIN..u64::MAX,
+
+            tlv_gsp_fw_heap_base_size: tlv.get_u64(b"HBSZ")?,
+            tlv_gsp_hw_heap_size_per_gb: tlv.get_u64(b"HSPG")?,
+            tlv_gsp_fw_heap_base_size_vgpu: tlv.get_u64(b"HBSV")?,
+            tlv_gsp_fw_heap_size_per_vm: tlv.get_u64(b"HSPV")?,
+            tlv_pmu_reserved_size: tlv.get_u32(b"PRSZ")?,
+            tlv_non_wpr_heap_size: tlv.get_u64(b"GNWH")?,
+        })
+    }
+
     /// Returns the WPR heap size to reserve when vGPU is enabled.
     pub(crate) fn vgpu_wpr_heap_size(&self) -> u64 {
         u64::from(bindings::GSP_FW_HEAP_SIZE_VGPU_DEFAULT)
-- 
2.54.0