NVDIMM Device and Persistent Memory development
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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, Robert Richter <rrichter@amd.com>,
	<alison.schofield@intel.com>, <terry.bowman@amd.com>,
	<bhelgaas@google.com>, <dave.jiang@intel.com>,
	<nvdimm@lists.linux.dev>
Subject: Re: [PATCH v6 01/12] cxl/acpi: Simplify cxl_nvdimm_bridge probing
Date: Fri, 2 Dec 2022 15:02:33 +0000	[thread overview]
Message-ID: <20221202150233.00003aa4@Huawei.com> (raw)
In-Reply-To: <166993040668.1882361.7450361097265836752.stgit@dwillia2-xfh.jf.intel.com>

On Thu, 01 Dec 2022 13:33:26 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> The 'struct cxl_nvdimm_bridge' object advertises platform CXL PMEM
> resources. It coordinates with libnvdimm to attach nvdimm devices and
> regions for each corresponding CXL object. That coordination is
> complicated, i.e. difficult to reason about, and it turns out redundant.
> It is already the case that the CXL core knows how to tear down a
> cxl_region when a cxl_memdev goes through ->remove(), so that pathway
> can be extended to directly cleanup cxl_nvdimm and cxl_pmem_region
> objects.
> 
> Towards the goal of ripping out the cxl_nvdimm_bridge state machine,
> arrange for cxl_acpi to optionally pre-load the cxl_pmem driver so that
> the nvdimm bridge is active synchronously with
> devm_cxl_add_nvdimm_bridge(), and remove all the bind attributes for the
> cxl_nvdimm* objects since the cxl root device and cxl_memdev bind
> attributes are sufficient.
> 
> Tested-by: Robert Richter <rrichter@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Seems reasonable and I can't see a disadvantage in doing this...
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


> ---
>  drivers/cxl/acpi.c |    1 +
>  drivers/cxl/pmem.c |    9 +++++++++
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index fb9f72813067..c540da0cbf1e 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -539,3 +539,4 @@ module_platform_driver(cxl_acpi_driver);
>  MODULE_LICENSE("GPL v2");
>  MODULE_IMPORT_NS(CXL);
>  MODULE_IMPORT_NS(ACPI);
> +MODULE_SOFTDEP("pre: cxl_pmem");
> diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c
> index 4c627d67281a..946e171e7d4a 100644
> --- a/drivers/cxl/pmem.c
> +++ b/drivers/cxl/pmem.c
> @@ -99,6 +99,9 @@ static struct cxl_driver cxl_nvdimm_driver = {
>  	.name = "cxl_nvdimm",
>  	.probe = cxl_nvdimm_probe,
>  	.id = CXL_DEVICE_NVDIMM,
> +	.drv = {
> +		.suppress_bind_attrs = true,
> +	},
>  };
>  
>  static int cxl_pmem_get_config_size(struct cxl_dev_state *cxlds,
> @@ -360,6 +363,9 @@ static struct cxl_driver cxl_nvdimm_bridge_driver = {
>  	.probe = cxl_nvdimm_bridge_probe,
>  	.remove = cxl_nvdimm_bridge_remove,
>  	.id = CXL_DEVICE_NVDIMM_BRIDGE,
> +	.drv = {
> +		.suppress_bind_attrs = true,
> +	},
>  };
>  
>  static int match_cxl_nvdimm(struct device *dev, void *data)
> @@ -583,6 +589,9 @@ static struct cxl_driver cxl_pmem_region_driver = {
>  	.name = "cxl_pmem_region",
>  	.probe = cxl_pmem_region_probe,
>  	.id = CXL_DEVICE_PMEM_REGION,
> +	.drv = {
> +		.suppress_bind_attrs = true,
> +	},
>  };
>  
>  /*
> 


  reply	other threads:[~2022-12-02 15:02 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 21:33 [PATCH v6 00/12] cxl: Add support for Restricted CXL hosts (RCD mode) Dan Williams
2022-12-01 21:33 ` [PATCH v6 01/12] cxl/acpi: Simplify cxl_nvdimm_bridge probing Dan Williams
2022-12-02 15:02   ` Jonathan Cameron [this message]
2022-12-01 21:33 ` [PATCH v6 02/12] cxl/region: Drop redundant pmem region release handling Dan Williams
2022-12-02 15:43   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 03/12] cxl/pmem: Refactor nvdimm device registration, delete the workqueue Dan Williams
2022-12-02 15:42   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 04/12] cxl/pmem: Remove the cxl_pmem_wq and related infrastructure Dan Williams
2022-12-02 15:44   ` Jonathan Cameron
2022-12-01 21:33 ` [PATCH v6 05/12] cxl/acpi: Move rescan to the workqueue Dan Williams
2022-12-02 15:50   ` Jonathan Cameron
2022-12-03  7:14     ` Dan Williams
2022-12-01 21:33 ` [PATCH v6 06/12] tools/testing/cxl: Make mock CEDT parsing more robust Dan Williams
2022-12-01 21:57   ` Dave Jiang
2022-12-02 15:58   ` Jonathan Cameron
2022-12-03  7:22     ` Dan Williams
2022-12-01 21:33 ` [PATCH v6 07/12] cxl/ACPI: Register CXL host ports by bridge device Dan Williams
2022-12-01 22:00   ` Dave Jiang
2022-12-02 16:11   ` Jonathan Cameron
2022-12-03  7:28     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 08/12] cxl/acpi: Extract component registers of restricted hosts from RCRB Dan Williams
2022-12-01 23:55   ` Dave Jiang
2022-12-02  8:16   ` Robert Richter
2022-12-03  7:04     ` Dan Williams
2022-12-03  8:41       ` Dan Williams
2022-12-03 16:03       ` Robert Richter
2022-12-03 17:06         ` Dan Williams
2022-12-02 16:38   ` Jonathan Cameron
2022-12-03  7:39     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 09/12] cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem Dan Williams
2022-12-02 16:40   ` Jonathan Cameron
2022-12-01 21:34 ` [PATCH v6 10/12] cxl/port: Add RCD endpoint port enumeration Dan Williams
2022-12-02  8:21   ` Robert Richter
2022-12-03  7:05     ` Dan Williams
2022-12-02 16:45   ` Jonathan Cameron
2022-12-01 21:34 ` [PATCH v6 11/12] tools/testing/cxl: Add an RCH topology Dan Williams
2022-12-02  8:05   ` Robert Richter
2022-12-02 17:04   ` Jonathan Cameron
2022-12-03  7:50     ` Dan Williams
2022-12-01 21:34 ` [PATCH v6 12/12] cxl/acpi: Set ACPI's CXL _OSC to indicate RCD mode support Dan Williams
2022-12-02 17:05   ` Jonathan Cameron

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