* Re: [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support @ 2026-08-25 20:55 ` kernel test robot 2026-09-09 10:38 ` Dan Carpenter 2026-09-09 17:37 ` Priyank Rathod 0 siblings, 2 replies; 3+ messages in thread From: kernel test robot @ 2026-08-25 20:55 UTC (permalink / raw) To: oe-kbuild; +Cc: lkp, Dan Carpenter BCC: lkp@intel.com CC: oe-kbuild-all@lists.linux.dev In-Reply-To: <20260824-pcie-lmt-v6-1-bab4ce233fa5@google.com> References: <20260824-pcie-lmt-v6-1-bab4ce233fa5@google.com> TO: Priyank Rathod <rathodpriyank@google.com> TO: Bjorn Helgaas <helgaas@kernel.org> TO: Priyank Rathod <rathodpriyank@google.com> TO: Shuah Khan <skhan@linuxfoundation.org> TO: Kees Cook <kees@kernel.org> TO: "Gustavo A. R. Silva" <gustavoars@kernel.org> TO: Jonathan Corbet <corbet@lwn.net> CC: linux-kernel@vger.kernel.org CC: linux-pci@vger.kernel.org CC: linux-kselftest@vger.kernel.org CC: linux-hardening@vger.kernel.org CC: linux-doc@vger.kernel.org CC: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com> Hi Priyank, kernel test robot noticed the following build warnings: [auto build test WARNING on 0f23d56f17fdfc7db69d51f64c8b91bbab947aa9] url: https://github.com/intel-lab-lkp/linux/commits/Priyank-Rathod/PCI-pcie-Add-PCIe-Lane-Margining-at-Receiver-LMR-support/20260824-223812 base: 0f23d56f17fdfc7db69d51f64c8b91bbab947aa9 patch link: https://lore.kernel.org/r/20260824-pcie-lmt-v6-1-bab4ce233fa5%40google.com patch subject: [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support :::::: branch date: 20 hours ago :::::: commit date: 20 hours ago config: powerpc64-randconfig-r073-20260826 (https://download.01.org/0day-ci/archive/20260826/202608260405.gHL6gOJf-lkp@intel.com/config) compiler: powerpc64-linux-gcc (GCC) 15.2.0 smatch: v0.5.0-9187-g5189e3fb If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Reported-by: Dan Carpenter <error27@gmail.com> | Closes: https://lore.kernel.org/r/202608260405.gHL6gOJf-lkp@intel.com/ smatch warnings: drivers/pci/pcie/margin.c:1005 pci_lmr_exit() warn: variable dereferenced before check 'dev' (see line 1003) drivers/pci/pcie/margin.c:1020 pci_suspend_lmr() warn: variable dereferenced before check 'dev' (see line 1018) drivers/pci/pcie/margin.c:1056 pci_reset_lmr() warn: variable dereferenced before check 'dev' (see line 1054) vim +/dev +1005 drivers/pci/pcie/margin.c ecb76f560cf217 Priyank Rathod 2026-08-24 1000 ecb76f560cf217 Priyank Rathod 2026-08-24 1001 void pci_lmr_exit(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1002 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1003 struct pci_margin_dev *mdev = dev->lmr; ecb76f560cf217 Priyank Rathod 2026-08-24 1004 ecb76f560cf217 Priyank Rathod 2026-08-24 @1005 if (!dev || !mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1006 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1007 ecb76f560cf217 Priyank Rathod 2026-08-24 1008 pci_suspend_lmr(dev); ecb76f560cf217 Priyank Rathod 2026-08-24 1009 ecb76f560cf217 Priyank Rathod 2026-08-24 1010 pci_margin_debugfs_remove(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1011 mutex_destroy(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1012 kfree(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1013 dev->lmr = NULL; ecb76f560cf217 Priyank Rathod 2026-08-24 1014 } ecb76f560cf217 Priyank Rathod 2026-08-24 1015 ecb76f560cf217 Priyank Rathod 2026-08-24 1016 void pci_suspend_lmr(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1017 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1018 struct pci_margin_dev *mdev = dev->lmr; ecb76f560cf217 Priyank Rathod 2026-08-24 1019 ecb76f560cf217 Priyank Rathod 2026-08-24 @1020 if (!dev || !mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1021 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1022 ecb76f560cf217 Priyank Rathod 2026-08-24 1023 guard(mutex)(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1024 pci_lmr_disable_locked(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1025 } ecb76f560cf217 Priyank Rathod 2026-08-24 1026 ecb76f560cf217 Priyank Rathod 2026-08-24 1027 static void pci_lmr_reset_software_state_locked(struct pci_margin_dev *mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1028 { ecb76f560cf217 Priyank Rathod 2026-08-24 1029 struct pci_dev *dev; ecb76f560cf217 Priyank Rathod 2026-08-24 1030 int i; ecb76f560cf217 Priyank Rathod 2026-08-24 1031 ecb76f560cf217 Priyank Rathod 2026-08-24 1032 if (!mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1033 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1034 ecb76f560cf217 Priyank Rathod 2026-08-24 1035 lockdep_assert_held(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1036 ecb76f560cf217 Priyank Rathod 2026-08-24 1037 if (!mdev->enabled) ecb76f560cf217 Priyank Rathod 2026-08-24 1038 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1039 ecb76f560cf217 Priyank Rathod 2026-08-24 1040 dev = mdev->dev; ecb76f560cf217 Priyank Rathod 2026-08-24 1041 ecb76f560cf217 Priyank Rathod 2026-08-24 1042 for (i = 0; i < mdev->num_lanes; i++) { ecb76f560cf217 Priyank Rathod 2026-08-24 1043 mdev->lanes[i].timing_val = 0; ecb76f560cf217 Priyank Rathod 2026-08-24 1044 mdev->lanes[i].voltage_val = 0; ecb76f560cf217 Priyank Rathod 2026-08-24 1045 } ecb76f560cf217 Priyank Rathod 2026-08-24 1046 ecb76f560cf217 Priyank Rathod 2026-08-24 1047 pci_lmr_restore_aspm(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1048 pm_runtime_put_sync(&dev->dev); ecb76f560cf217 Priyank Rathod 2026-08-24 1049 mdev->enabled = false; ecb76f560cf217 Priyank Rathod 2026-08-24 1050 } ecb76f560cf217 Priyank Rathod 2026-08-24 1051 ecb76f560cf217 Priyank Rathod 2026-08-24 1052 void pci_reset_lmr(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1053 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1054 struct pci_margin_dev *mdev = dev->lmr; ecb76f560cf217 Priyank Rathod 2026-08-24 1055 ecb76f560cf217 Priyank Rathod 2026-08-24 @1056 if (!dev || !mdev) -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support 2026-08-25 20:55 ` [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support kernel test robot @ 2026-09-09 10:38 ` Dan Carpenter 2026-09-09 17:37 ` Priyank Rathod 1 sibling, 0 replies; 3+ messages in thread From: Dan Carpenter @ 2026-09-09 10:38 UTC (permalink / raw) To: oe-kbuild, Priyank Rathod, Bjorn Helgaas, Shuah Khan, Kees Cook, Gustavo A. R. Silva, Jonathan Corbet Cc: lkp, oe-kbuild-all, linux-kernel, linux-pci, linux-kselftest, linux-hardening, linux-doc, Ilpo Järvinen Hi Priyank, kernel test robot noticed the following build warnings: url: https://github.com/intel-lab-lkp/linux/commits/Priyank-Rathod/PCI-pcie-Add-PCIe-Lane-Margining-at-Receiver-LMR-support/20260824-223812 base: 0f23d56f17fdfc7db69d51f64c8b91bbab947aa9 patch link: https://lore.kernel.org/r/20260824-pcie-lmt-v6-1-bab4ce233fa5%40google.com patch subject: [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support config: powerpc64-randconfig-r073-20260826 (https://download.01.org/0day-ci/archive/20260826/202608260405.gHL6gOJf-lkp@intel.com/config) compiler: powerpc64-linux-gcc (GCC) 15.2.0 smatch: v0.5.0-9187-g5189e3fb If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Reported-by: Dan Carpenter <error27@gmail.com> | Closes: https://lore.kernel.org/r/202608260405.gHL6gOJf-lkp@intel.com/ smatch warnings: drivers/pci/pcie/margin.c:1005 pci_lmr_exit() warn: variable dereferenced before check 'dev' (see line 1003) drivers/pci/pcie/margin.c:1020 pci_suspend_lmr() warn: variable dereferenced before check 'dev' (see line 1018) drivers/pci/pcie/margin.c:1056 pci_reset_lmr() warn: variable dereferenced before check 'dev' (see line 1054) vim +/dev +1005 drivers/pci/pcie/margin.c ecb76f560cf217 Priyank Rathod 2026-08-24 1001 void pci_lmr_exit(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1002 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1003 struct pci_margin_dev *mdev = dev->lmr; ^^^^^ Dereference ecb76f560cf217 Priyank Rathod 2026-08-24 1004 ecb76f560cf217 Priyank Rathod 2026-08-24 @1005 if (!dev || !mdev) ^^^^ This check is too late. It can likely be removed. The other warnings are the same. ecb76f560cf217 Priyank Rathod 2026-08-24 1006 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1007 ecb76f560cf217 Priyank Rathod 2026-08-24 1008 pci_suspend_lmr(dev); ecb76f560cf217 Priyank Rathod 2026-08-24 1009 ecb76f560cf217 Priyank Rathod 2026-08-24 1010 pci_margin_debugfs_remove(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1011 mutex_destroy(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1012 kfree(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1013 dev->lmr = NULL; ecb76f560cf217 Priyank Rathod 2026-08-24 1014 } ecb76f560cf217 Priyank Rathod 2026-08-24 1015 ecb76f560cf217 Priyank Rathod 2026-08-24 1016 void pci_suspend_lmr(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1017 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1018 struct pci_margin_dev *mdev = dev->lmr; ecb76f560cf217 Priyank Rathod 2026-08-24 1019 ecb76f560cf217 Priyank Rathod 2026-08-24 @1020 if (!dev || !mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1021 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1022 ecb76f560cf217 Priyank Rathod 2026-08-24 1023 guard(mutex)(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1024 pci_lmr_disable_locked(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1025 } ecb76f560cf217 Priyank Rathod 2026-08-24 1026 ecb76f560cf217 Priyank Rathod 2026-08-24 1027 static void pci_lmr_reset_software_state_locked(struct pci_margin_dev *mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1028 { ecb76f560cf217 Priyank Rathod 2026-08-24 1029 struct pci_dev *dev; ecb76f560cf217 Priyank Rathod 2026-08-24 1030 int i; ecb76f560cf217 Priyank Rathod 2026-08-24 1031 ecb76f560cf217 Priyank Rathod 2026-08-24 1032 if (!mdev) ecb76f560cf217 Priyank Rathod 2026-08-24 1033 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1034 ecb76f560cf217 Priyank Rathod 2026-08-24 1035 lockdep_assert_held(&mdev->lock); ecb76f560cf217 Priyank Rathod 2026-08-24 1036 ecb76f560cf217 Priyank Rathod 2026-08-24 1037 if (!mdev->enabled) ecb76f560cf217 Priyank Rathod 2026-08-24 1038 return; ecb76f560cf217 Priyank Rathod 2026-08-24 1039 ecb76f560cf217 Priyank Rathod 2026-08-24 1040 dev = mdev->dev; ecb76f560cf217 Priyank Rathod 2026-08-24 1041 ecb76f560cf217 Priyank Rathod 2026-08-24 1042 for (i = 0; i < mdev->num_lanes; i++) { ecb76f560cf217 Priyank Rathod 2026-08-24 1043 mdev->lanes[i].timing_val = 0; ecb76f560cf217 Priyank Rathod 2026-08-24 1044 mdev->lanes[i].voltage_val = 0; ecb76f560cf217 Priyank Rathod 2026-08-24 1045 } ecb76f560cf217 Priyank Rathod 2026-08-24 1046 ecb76f560cf217 Priyank Rathod 2026-08-24 1047 pci_lmr_restore_aspm(mdev); ecb76f560cf217 Priyank Rathod 2026-08-24 1048 pm_runtime_put_sync(&dev->dev); ecb76f560cf217 Priyank Rathod 2026-08-24 1049 mdev->enabled = false; ecb76f560cf217 Priyank Rathod 2026-08-24 1050 } ecb76f560cf217 Priyank Rathod 2026-08-24 1051 ecb76f560cf217 Priyank Rathod 2026-08-24 1052 void pci_reset_lmr(struct pci_dev *dev) ecb76f560cf217 Priyank Rathod 2026-08-24 1053 { ecb76f560cf217 Priyank Rathod 2026-08-24 @1054 struct pci_margin_dev *mdev = dev->lmr; ecb76f560cf217 Priyank Rathod 2026-08-24 1055 ecb76f560cf217 Priyank Rathod 2026-08-24 @1056 if (!dev || !mdev) -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support 2026-08-25 20:55 ` [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support kernel test robot 2026-09-09 10:38 ` Dan Carpenter @ 2026-09-09 17:37 ` Priyank Rathod 1 sibling, 0 replies; 3+ messages in thread From: Priyank Rathod @ 2026-09-09 17:37 UTC (permalink / raw) To: Dan Carpenter Cc: linux-pci, linux-kernel, Bjorn Helgaas, Ilpo Järvinen, lkp, oe-kbuild-all, oe-kbuild, Shuah Khan, Kees Cook, Gustavo A. R. Silva, Jonathan Corbet, linux-kselftest, linux-hardening, linux-doc Hi Dan, Thanks for the report! This series has since been decomposed and restructured into a 3-patch stack, and this issue was already resolved in the v3 submission: https://lore.kernel.org/r/20260904-pcie-link-endpoints-v3-0-4b9a91bd4b35@google.com Thanks, Priyank ^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-08-25 20:55 ` [PATCH v6] PCI/pcie: Add PCIe Lane Margining at Receiver (LMR) support kernel test robot
2026-09-09 10:38 ` Dan Carpenter
2026-09-09 17:37 ` Priyank Rathod
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