[OpenRISC] [PATCH 04/22] target/openrisc: Fix exception handling status registers

[OpenRISC] [PATCH 04/22] target/openrisc: Fix exception handling status registers

[Richard Henderson]

From: Stafford Horne <shorne@gmail.com>

I am working on testing instruction emulation patches for the linux
kernel. During testing I found these 2 issues:

 - sets DSX (delay slot exception) but never clears it
 - EEAR for illegal insns should point to the bad exception (as per
   openrisc spec) but its not

This patch fixes these two issues by clearing the DSX flag when not in a
delay slot and by setting EEAR to exception PC when handling illegal
instruction exceptions.

After this patch the openrisc kernel with latest patches boots great on
qemu and instruction emulation works.

Cc: qemu-trivial at nongnu.org
Cc: openrisc at lists.librecores.org
Signed-off-by: Stafford Horne <shorne@gmail.com>
Message-Id: <20170113220028.29687-1-shorne@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/openrisc/interrupt.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c
index e43fc84..a243eb2 100644
--- a/target/openrisc/interrupt.c
+++ b/target/openrisc/interrupt.c
@@ -38,10 +38,17 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
         env->flags &= ~D_FLAG;
         env->sr |= SR_DSX;
         env->epcr -= 4;
+    } else {
+        env->sr &= ~SR_DSX;
     }
     if (cs->exception_index == EXCP_SYSCALL) {
         env->epcr += 4;
     }
+    /* When we have an illegal instruction the error effective address
+       shall be set to the illegal instruction address.  */
+    if (cs->exception_index == EXCP_ILLEGAL) {
+        env->eear = env->pc;
+    }
 
     /* For machine-state changed between user-mode and supervisor mode,
        we need flush TLB when we enter&exit EXCP.  */
-- 
2.9.3

[OpenRISC] [PATCH 23/22] linux-user: Honor CLONE_SETTLS for openrisc

[Stafford Horne]

23/22 ?

:)

On Fri, Feb 10, 2017 at 10:01:22AM +1000, Richard Henderson wrote:
> Threads work much better when you set the TLS register.
> This was fixed in the upstream kernel for Linux 4.9.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  linux-user/openrisc/target_cpu.h | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h
> index a21ed1a..f283d96 100644
> --- a/linux-user/openrisc/target_cpu.h
> +++ b/linux-user/openrisc/target_cpu.h
> @@ -30,9 +30,7 @@ static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
>  
>  static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls)
>  {
> -    /* Linux kernel 3.10 does not pay any attention to CLONE_SETTLS
> -     * in copy_thread(), so QEMU need not do so either.
> -     */
> +    env->gpr[10] = newtls;
>  }
>  
>  #endif
> -- 
> 2.9.3
> 

Reviewed-by: Stafford Horne <shorne@gmail.com>