Linux OpenRISC platform development
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 messages from 2017-01-13 15:36:43 to 2017-02-24 04:32:26 UTC [more...]

[OpenRISC] [PATCH v4 00/24] OpenRISC patches for 4.11
 2017-02-24  4:32 UTC  (7+ messages)
` [OpenRISC] [PATCH v4 01/24] openrisc: use SPARSE_IRQ
` [OpenRISC] [PATCH v4 02/24] openrisc: add cache way information to cpuinfo
` [OpenRISC] [PATCH v4 03/24] openrisc: tlb miss handler optimizations
` [OpenRISC] [PATCH v4 04/24] openrisc: head: use THREAD_SIZE instead of magic constant
` [OpenRISC] [PATCH v4 05/24] openrisc: head: refactor out tlb flush into it's own function
` [OpenRISC] [PATCH v4 06/24] openrisc: add l.lwa/l.swa emulation

[OpenRISC] gcc7 port and improvements
 2017-02-24  4:09 UTC  (4+ messages)

[OpenRISC] [Qemu-devel] [PATCH 00/22] target/openrisc updates
 2017-02-23 22:41 UTC  (8+ messages)

[OpenRISC] Crosstool/kbuild-all toolchain updates
 2017-02-23 13:35 UTC  (6+ messages)

[OpenRISC] [PATCH v3 00/25] OpenRISC patches for 4.11 final call
 2017-02-22 22:43 UTC  (43+ messages)
` [OpenRISC] [PATCH v3 01/25] openrisc: use SPARSE_IRQ
` [OpenRISC] [PATCH v3 02/25] openrisc: add cache way information to cpuinfo
` [OpenRISC] [PATCH v3 03/25] openrisc: tlb miss handler optimizations
` [OpenRISC] [PATCH v3 04/25] openrisc: head: use THREAD_SIZE instead of magic constant
` [OpenRISC] [PATCH v3 05/25] openrisc: head: refactor out tlb flush into it's own function
` [OpenRISC] [PATCH v3 06/25] openrisc: add l.lwa/l.swa emulation
` [OpenRISC] [PATCH v3 07/25] openrisc: add atomic bitops
` [OpenRISC] [PATCH v3 08/25] openrisc: add cmpxchg and xchg implementations
` [OpenRISC] [PATCH v3 09/25] openrisc: add optimized atomic operations
` [OpenRISC] [PATCH v3 10/25] openrisc: add spinlock implementation
` [OpenRISC] [PATCH v3 11/25] openrisc: add futex_atomic_* implementations
` [OpenRISC] [PATCH v3 12/25] openrisc: remove unnecessary stddef.h include
` [OpenRISC] [PATCH v3 13/25] openrisc: Fix the bitmask for the unit present register
` [OpenRISC] [PATCH v3 14/25] openrisc: Initial support for the idle state
` [OpenRISC] [PATCH v3 15/25] openrisc: Add optimized memset
` [OpenRISC] [PATCH v3 16/25] openrisc: Add optimized memcpy routine
` [OpenRISC] [PATCH v3 17/25] openrisc: Add .gitignore
` [OpenRISC] [PATCH v3 18/25] MAINTAINERS: Add the openrisc official repository
` [OpenRISC] [PATCH v3 19/25] scripts/checkstack.pl: Add openrisc support
` [OpenRISC] [PATCH v3 20/25] openrisc: entry: Whitespace and comment cleanups
` [OpenRISC] [PATCH v3 21/25] openrisc: entry: Fix delay slot detection
` [OpenRISC] [PATCH v3 22/25] openrisc: head: Move init strings to rodata section
` [OpenRISC] [PATCH v3 23/25] arch/openrisc/lib/memcpy.c: use correct OR1200 option
` [OpenRISC] [PATCH v3 24/25] openrisc: Export ioremap symbols used by modules
` [OpenRISC] [PATCH v3 25/25] openrisc: head: Init r0 to 0 on start

[OpenRISC] GCC 5.4.0 Release and Binaries
 2017-02-19  7:21 UTC 

[OpenRISC] [PATCH v2 0/6] sim: Port for OpenRISC
 2017-02-15 15:42 UTC  (10+ messages)
` [OpenRISC] [PATCH v2 1/6] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd])
` [OpenRISC] [PATCH v2 2/6] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN
` [OpenRISC] [PATCH v2 3/6] sim: cgen: allow suffix on generated arch.[ch] and cpuall.h
` [OpenRISC] [PATCH v2 4/6] sim: or1k: add or1k target to sim
` [OpenRISC] [PATCH v2 5/6] sim: or1k: Add generated files
` [OpenRISC] [PATCH v2 6/6] sim: testsuite: add testsuite for or1k sim

[OpenRISC] [PULL 05/24] target/openrisc: Fix exception handling status registers
 2017-02-13 21:25 UTC 

[OpenRISC] [PATCH 0/2] Update cpu definition to handle ppc
 2017-02-12 12:33 UTC  (3+ messages)
` [OpenRISC] [PATCH 1/2] cpu: or1k: Set ppc on pc change
` [OpenRISC] [PATCH 2/2] sim: or1k: Regenerate sim files

[OpenRISC] [PATCH 04/22] target/openrisc: Fix exception handling status registers
 2017-02-10  0:44 UTC  (2+ messages)
  ` [OpenRISC] [PATCH 23/22] linux-user: Honor CLONE_SETTLS for openrisc

[OpenRISC] [PATCH] target-openrisc: Fix exception handling status registers
 2017-02-08 20:38 UTC  (25+ messages)
        ` [OpenRISC] [Qemu-devel] "

[OpenRISC] Linux openrisc init code
 2017-02-07  2:32 UTC  (7+ messages)

[OpenRISC] mor1kx
 2017-02-06 23:11 UTC  (2+ messages)

[OpenRISC] [PATCH 0/3] openrisc: various fixes
 2017-02-06 14:38 UTC  (4+ messages)
` [OpenRISC] [PATCH 1/3] or1k: Make open reentrant
` [OpenRISC] [PATCH 2/3] libgloss: or1k: If available call the init for init_array
` [OpenRISC] [PATCH 3/3] libgloss: Remove duplicate definition of environ

[OpenRISC] [PATCH v2 00/23] OpenRISC patches from backlog for 4.11
 2017-02-03 15:48 UTC  (24+ messages)
` [OpenRISC] [PATCH v2 01/23] openrisc: use SPARSE_IRQ
` [OpenRISC] [PATCH v2 02/23] openrisc: add cache way information to cpuinfo
` [OpenRISC] [PATCH v2 03/23] openrisc: tlb miss handler optimizations
` [OpenRISC] [PATCH v2 04/23] openrisc: head: use THREAD_SIZE instead of magic constant
` [OpenRISC] [PATCH v2 05/23] openrisc: head: refactor out tlb flush into it's own function
` [OpenRISC] [PATCH v2 06/23] openrisc: add l.lwa/l.swa emulation
` [OpenRISC] [PATCH v2 07/23] openrisc: add atomic bitops
` [OpenRISC] [PATCH v2 08/23] openrisc: add cmpxchg and xchg implementations
` [OpenRISC] [PATCH v2 09/23] openrisc: add optimized atomic operations
` [OpenRISC] [PATCH v2 10/23] openrisc: add spinlock implementation
` [OpenRISC] [PATCH v2 11/23] openrisc: add futex_atomic_* implementations
` [OpenRISC] [PATCH v2 12/23] openrisc: remove unnecessary stddef.h include
` [OpenRISC] [PATCH v2 13/23] openrisc: Fix the bitmask for the unit present register
` [OpenRISC] [PATCH v2 14/23] openrisc: Initial support for the idle state
` [OpenRISC] [PATCH v2 15/23] openrisc: Add optimized memset
` [OpenRISC] [PATCH v2 16/23] openrisc: Add optimized memcpy routine
` [OpenRISC] [PATCH v2 17/23] openrisc: Add .gitignore
` [OpenRISC] [PATCH v2 18/23] MAINTAINERS: Add the openrisc official repository
` [OpenRISC] [PATCH v2 19/23] scripts/checkstack.pl: Add openrisc support
` [OpenRISC] [PATCH v2 20/23] openrisc: entry: Whitespace and comment cleanups
` [OpenRISC] [PATCH v2 21/23] openrisc: entry: Fix delay slot detection
` [OpenRISC] [PATCH v2 22/23] openrisc: head: Move init strings to rodata section
` [OpenRISC] [PATCH v2 23/23] arch/openrisc/lib/memcpy.c: use correct OR1200 option

[OpenRISC] [linux-next:master 3724/5750] drivers/block/drbd/drbd_req.c:955:3: error: implicit declaration of function 'test_and_change_bit'
 2017-01-29 13:05 UTC 

[OpenRISC] OpenRISC toolchain updates for crosstool
 2017-01-26 15:20 UTC 

[OpenRISC] [PATCH v3 00/20] Finalize separation of extable.h from module.h
 2017-01-26  5:53 UTC  (3+ messages)
` [OpenRISC] [PATCH 10/20] openrisc: migrate exception table users off module.h and onto extable.h
    ` [OpenRISC] [PATCH v2] "

[OpenRISC] Bad block Management Patch
 2017-01-24  4:56 UTC 

[OpenRISC] U-Boot and OpenRISC
 2017-01-21 15:58 UTC 

[OpenRISC] [PATCH v4 0/3] OpenRISC gdb port
 2017-01-21  3:05 UTC  (4+ messages)
` [OpenRISC] [PATCH v4 1/3] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v4 2/3] or1k: gdb: Add xml tdesc
` [OpenRISC] [PATCH v4 3/3] gdb: testsuite: Add or1k l.nop inscruction

[OpenRISC] [PATCH] arch/openrisc/lib/memcpy.c: use correct OR1200 option
 2017-01-17 10:40 UTC  (2+ messages)

[OpenRISC] Clang does not understand .word directive in crt0.S in newlib source
 2017-01-16 15:50 UTC  (4+ messages)

[OpenRISC] [PATCH 00/22] Openrisc patchees from backlog for 4.11
 2017-01-16 11:58 UTC  (28+ messages)
` [OpenRISC] [PATCH 01/22] openrisc: use SPARSE_IRQ
` [OpenRISC] [PATCH 02/22] openrisc: add cache way information to cpuinfo
` [OpenRISC] [PATCH 03/22] openrisc: tlb miss handler optimizations
` [OpenRISC] [PATCH 04/22] openrisc: head: use THREAD_SIZE instead of magic constant
` [OpenRISC] [PATCH 05/22] openrisc: head: refactor out tlb flush into it's own function
` [OpenRISC] [PATCH 06/22] openrisc: add l.lwa/l.swa emulation
` [OpenRISC] [PATCH 07/22] openrisc: add atomic bitops
` [OpenRISC] [PATCH 08/22] openrisc: add cmpxchg and xchg implementations
` [OpenRISC] [PATCH 09/22] openrisc: add optimized atomic operations
` [OpenRISC] [PATCH 10/22] openrisc: add spinlock implementation
` [OpenRISC] [PATCH 11/22] openrisc: add futex_atomic_* implementations
` [OpenRISC] [PATCH 12/22] openrisc: remove unnecessary stddef.h include
` [OpenRISC] [PATCH 13/22] openrisc: Fix the bitmask for the unit present register
` [OpenRISC] [PATCH 14/22] openrisc: Initial support for the idle state
` [OpenRISC] [PATCH 15/22] openrisc: Add optimized memset
` [OpenRISC] [PATCH 16/22] openrisc: Add optimized memcpy routine
` [OpenRISC] [PATCH 17/22] openrisc: Add .gitignore
` [OpenRISC] [PATCH 18/22] MAINTAINERS: Add the openrisc official repository
` [OpenRISC] [PATCH 19/22] scripts/checkstack.pl: Add openrisc support
` [OpenRISC] [PATCH 20/22] openrisc: entry: Whitespace and comment cleanups
` [OpenRISC] [PATCH 21/22] openrisc: entry: Fix delay slot detection
` [OpenRISC] [PATCH 22/22] openrisc: head: Move init strings to rodata section

[OpenRISC] [PATCH] target-openrisc: Fix exception handling status registers
 2017-01-13 22:00 UTC 

[OpenRISC] [PATCH v2 0/7] uapi: export all headers under uapi directories
 2017-01-13 17:06 UTC  (11+ messages)
` [OpenRISC] [PATCH v3 0/8] "
  ` [OpenRISC] [PATCH v3 1/8] arm: put types.h in uapi
    ` [OpenRISC] (no subject)
  ` [OpenRISC] [PATCH v3 4/8] x86: stop exporting msr-index.h to userland


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