[OpenRISC] [PATCH 0/2] Update cpu definition to handle ppc

[OpenRISC] [PATCH 0/2] Update cpu definition to handle ppc

[Stafford Horne]

Recently when testing qemu I found that the native gdb sim did not properly
set the ppc.  After some time of investigation I figured the best place to
fix this is by udating the pc set sematics in the cgen definition.

The patch is pretty simple, but maybe too much so?

I am sending this patch to see if anyone has a better idea of how to
support ppc updating in the gdb native sim.

-Stafford 

Stafford Horne (2):
  cpu: or1k: Set ppc on pc change
  sim: or1k: Regenerate sim files

 cpu/or1kcommon.cpu | 5 +++++
 sim/or1k/cpu32.c   | 4 ++--
 sim/or1k/cpu32.h   | 8 +++++++-
 3 files changed, 14 insertions(+), 3 deletions(-)

-- 
2.9.3

[OpenRISC] [PATCH 1/2] cpu: or1k: Set ppc on pc change

[Stafford Horne]

Currently the openrisc previous program counter (ppc) is never updated
when running the cgen based simulator.  This causes issues when running
the single step delay detection code in gdb.

cpu/ChangeLog:

2017-02-12  Stafford Horne  <shorne@gmail.com>

	* or1kcommon.cpu: Add pc set semantics to also update ppc.
---
 cpu/or1kcommon.cpu | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/cpu/or1kcommon.cpu b/cpu/or1kcommon.cpu
index 1119f98..ced70c3 100644
--- a/cpu/or1kcommon.cpu
+++ b/cpu/or1kcommon.cpu
@@ -26,6 +26,11 @@
   (comment "program counter")
   (attrs PC (MACH ORBIS-MACHS))
   (type pc UWI)
+  (get () (raw-reg h-pc))
+  (set (newval) (sequence ()
+                 (set (reg h-sys-ppc) (raw-reg h-pc))
+                 (set (raw-reg h-pc) newval)
+                ))
   )
 
 (define-pmacro REG-INDICES
-- 
2.9.3

[OpenRISC] [PATCH 2/2] sim: or1k: Regenerate sim files

[Stafford Horne]

After updating the cpu ppc setting logic regenarate the cpu files.

sim/ChangeLog:

2017-02-12  Stafford Horne  <shorne@gmail.com>

	* or1k/cpu32.c: Regenerate.
	* or1k/cpu32.h: Regenerate.
---
 sim/or1k/cpu32.c | 4 ++--
 sim/or1k/cpu32.h | 8 +++++++-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/sim/or1k/cpu32.c b/sim/or1k/cpu32.c
index 14e11ec..d8c0526 100644
--- a/sim/or1k/cpu32.c
+++ b/sim/or1k/cpu32.c
@@ -33,7 +33,7 @@ This file is part of the GNU simulators.
 USI
 or1k32bf_h_pc_get (SIM_CPU *current_cpu)
 {
-  return CPU (h_pc);
+  return GET_H_PC ();
 }
 
 /* Set a value for h-pc.  */
@@ -41,7 +41,7 @@ or1k32bf_h_pc_get (SIM_CPU *current_cpu)
 void
 or1k32bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
 {
-  CPU (h_pc) = newval;
+  SET_H_PC (newval);
 }
 
 /* Get the value of h-fsr.  */
diff --git a/sim/or1k/cpu32.h b/sim/or1k/cpu32.h
index 771fcdc..20c9ac6 100644
--- a/sim/or1k/cpu32.h
+++ b/sim/or1k/cpu32.h
@@ -45,7 +45,13 @@ typedef struct {
   /* program counter */
   USI h_pc;
 #define GET_H_PC() CPU (h_pc)
-#define SET_H_PC(x) (CPU (h_pc) = (x))
+#define SET_H_PC(x) \
+do { \
+{\
+SET_H_SYS_PPC (CPU (h_pc));\
+CPU (h_pc) = (x);\
+}\
+;} while (0)
   /* general registers */
   USI h_gpr[32];
 #define GET_H_GPR(index) GET_H_SPR (((index) + (ORSI (SLLSI (SPR_GROUP_SYS, 11), SPR_INDEX_SYS_GPR0))))
-- 
2.9.3