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From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: opensbi@lists.infradead.org
Subject: [PATCH 1/8] lib: sbi: add 64 bit csr macros
Date: Tue, 15 Apr 2025 15:19:02 +0200	[thread overview]
Message-ID: <20250415131908.2699782-3-rkrcmar@ventanamicro.com> (raw)
In-Reply-To: <20250415131908.2699782-2-rkrcmar@ventanamicro.com>

Most CSRs are XLEN bits wide, but some are 64 bit, so rv32 needs two
accesses, plaguing the code with ifdefs.

Add new helpers that split 64 bit operation into two operations on rv32.

The helpers don't use "csr + 0x10", but append "H" at the end of the csr
name to get a compile-time error when accessing a non 64 bit register.
This has the downside that you have to use the name when accessing them.
e.g. csr_read64(0x1234) or csr_read64(CSR_SATP) won't compile and the
error messages you get for these bugs are not straightforward.

Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
 include/sbi/riscv_asm.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 4605db20bd7a..d19281ac1961 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -156,6 +156,27 @@
 				     : "memory");                  \
 	})
 
+
+#if __riscv_xlen == 64
+#define __csrrw64(op, csr, csrh, val) (true ? op(csr, val) : (uint64_t)csrh)
+#define __csrr64( op, csr, csrh)      (true ? op(csr)      : (uint64_t)csrh)
+#define __csrw64( op, csr, csrh, val) (true ? op(csr, val) : (uint64_t)csrh)
+#elif __riscv_xlen == 32
+#define __csrrw64(op, csr, csrh, val) (  op(csr, val) | (uint64_t)op(csrh, val >> 32) << 32)
+#define __csrr64( op, csr, csrh)      (  op(csr)      | (uint64_t)op(csrh)            << 32)
+#define __csrw64( op, csr, csrh, val) ({ op(csr, val);            op(csrh, val >> 32);    })
+#endif
+
+#define csr_swap64(        csr, val) __csrrw64(csr_swap,         csr, csr ## H, val)
+#define csr_read64(        csr)      __csrr64 (csr_read,         csr, csr ## H)
+#define csr_read_relaxed64(csr)      __csrr64 (csr_read_relaxed, csr, csr ## H)
+#define csr_write64(       csr, val) __csrw64 (csr_write,        csr, csr ## H, val)
+#define csr_read_set64(    csr, val) __csrrw64(csr_read_set,     csr, csr ## H, val)
+#define csr_set64(         csr, val) __csrw64 (csr_set,          csr, csr ## H, val)
+#define csr_clear64(       csr, val) __csrw64 (csr_clear,        csr, csr ## H, val)
+#define csr_read_clear64(  csr, val) __csrrw64(csr_read_clear,   csr, csr ## H, val)
+#define csr_clear64(       csr, val) __csrw64 (csr_clear,        csr, csr ## H, val)
+
 unsigned long csr_read_num(int csr_num);
 
 void csr_write_num(int csr_num, unsigned long val);
-- 
2.48.1


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  reply	other threads:[~2025-04-15 14:43 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-15 13:19 [PATCH 0/8] Reset more security-related CSRs Radim Krčmář
2025-04-15 13:19 ` Radim Krčmář [this message]
2025-04-28 12:28   ` [PATCH 1/8] lib: sbi: add 64 bit csr macros Anup Patel
2025-04-28 13:48     ` Radim Krčmář
2025-04-15 13:19 ` [PATCH 2/8] lib: sbi: use " Radim Krčmář
2025-04-28 12:29   ` Anup Patel
2025-04-15 13:19 ` [PATCH 3/8] lib: sbi_hart: reset hstatus Radim Krčmář
2025-04-28 12:27   ` Anup Patel
2025-04-15 13:19 ` [PATCH 4/8] lib: sbi_hart: reset sstateen and hstateen Radim Krčmář
2025-04-28 12:29   ` Anup Patel
2025-04-15 13:19 ` [PATCH 5/8] lib: sbi_hart: fix sstateen emulation Radim Krčmář
2025-04-28 12:34   ` Anup Patel
2025-04-15 13:19 ` [PATCH 6/8] lib: sbi_hart: reset mstateen0 Radim Krčmář
2025-04-28 12:35   ` Anup Patel
2025-04-15 13:19 ` [PATCH 7/8] lib: sbi_hart: add Ssstateen extension Radim Krčmář
2025-04-28 12:38   ` Anup Patel
2025-04-28 13:47     ` Radim Krčmář
2025-04-29  5:30       ` Anup Patel
2025-04-15 13:19 ` [PATCH 8/8] lib: sbi_hart: properly reset Ssstateen Radim Krčmář
2025-04-28 12:39   ` Anup Patel
2025-04-28 13:44     ` Radim Krčmář
2025-04-28 12:41 ` [PATCH 0/8] Reset more security-related CSRs Anup Patel

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