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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yu-Chien Peter Lin <peter.lin@sifive.com>, opensbi@lists.infradead.org
Cc: zong.li@sifive.com, greentime.hu@sifive.com, anup@brainfault.org,
	scott@riscstar.com, conor@kernel.org, dave.patel@riscstar.com,
	raymond.mao@riscstar.com, robin.randhawa@sifive.com,
	samuel.holland@sifive.com, pawandeep.oza@oss.qualcomm.com
Subject: Re: [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI
Date: Mon, 28 Sep 2026 13:33:17 +0200	[thread overview]
Message-ID: <43ee673a-8df0-4b6f-9e8d-eeda05eb32b9@kernel.org> (raw)
In-Reply-To: <20260817090503.2104998-1-peter.lin@sifive.com>

On 17/08/2026 11:04, Yu-Chien Peter Lin wrote:
> This patch series adds support for RISC-V Worlds ISA extensions,
> enabling hardware-enforced isolation boundaries based on World IDs
> by extending the OpenSBI domain framework.
> 
> Trust Model and Boot-time Roles
> --------------------------------
> 
> The implementation follows the two-phase M-mode trust model:
> 
> - RoT M-mode phase: Prior boot stage (ROM/SPL) that may program mwid and
>   mlwidlist and lock mwid before handing off to OpenSBI.
> 
> - Regular M-mode phase (OpenSBI): Treats pmwid/pmwidlist/pmlwidlist as
>   input policy from hardware/RoT. Locks mwid to prevent later M-mode code
>   from changing its own WID. Programs per-domain mlwid/mwiddeleg based on
>   DT configuration.
> 
> Device Tree Bindings
> ---------------------
> 
> Per-hart properties defined in linux kernel DT bindings v3 [1]:
> - riscv,pmwid: M-mode World ID
> - riscv,pmwidlist: M-mode permitted WID bitmap
> - riscv,pmlwidlist: S/U-mode permitted WID bitmap>
> Per-domain properties (see domain_support.md):
> - wid: S-mode WID for this domain
> - widdeleg: WID delegation bitmap for this domain


I don't understand why I am cc-ed here, why DT is described here but not
in the bindings and why do you reference some RFC (which means: not
READY for review) patchset in a different patchset which is ready for
review.

Best regards,
Krzysztof

-- 
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opensbi@lists.infradead.org
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  parent reply	other threads:[~2026-09-28 11:33 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-17  9:04 [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Yu-Chien Peter Lin
2026-08-17  9:04 ` [PATCH v2 1/9] lib: sbi_hart: detect RISC-V Worlds ISA extensions Yu-Chien Peter Lin
2026-09-03 16:50   ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties Yu-Chien Peter Lin
2026-09-03 21:15   ` Pawandeep Oza
2026-09-24  7:33     ` Yu-Chien Peter Lin
2026-09-25 18:26       ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 3/9] lib: fdt_domain: parse domain " Yu-Chien Peter Lin
2026-09-03 21:18   ` Pawandeep Oza
2026-09-24  7:55     ` Yu-Chien Peter Lin
2026-08-17  9:04 ` [PATCH v2 4/9] lib: sbi_hart: lock mwid CSR for RoT immutability Yu-Chien Peter Lin
2026-09-03 21:20   ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 5/9] lib: sbi_hart: add WID protection mechanism Yu-Chien Peter Lin
2026-08-18  2:39   ` Yu-Chien Peter Lin
2026-09-03 21:52   ` Pawandeep Oza
2026-09-24  8:24     ` Yu-Chien Peter Lin
2026-08-17  9:05 ` [PATCH v2 6/9] lib: sbi_domain_context: add slwid to per-domain S-mode context Yu-Chien Peter Lin
2026-09-03 21:59   ` Pawandeep Oza
2026-08-17  9:05 ` [PATCH v2 7/9] include: sbi_types: add PRIx64 format macro Yu-Chien Peter Lin
2026-09-03 21:59   ` Pawandeep Oza
2026-08-17  9:05 ` [PATCH v2 8/9] lib: sbi: display World ID configuration at boot Yu-Chien Peter Lin
2026-09-03 22:00   ` Pawandeep Oza
2026-08-17  9:05 ` [PATCH v2 9/9] docs: document WID DT properties Yu-Chien Peter Lin
2026-09-03 22:01   ` Pawandeep Oza
2026-09-28  8:35   ` Anup Patel
2026-09-29 13:33     ` Yu-Chien Peter Lin
2026-09-28 11:30   ` Krzysztof Kozlowski
2026-09-29 14:19     ` Yu-Chien Peter Lin
2026-09-28 11:33 ` Krzysztof Kozlowski [this message]
2026-09-29 14:29   ` [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Yu-Chien Peter Lin

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