From: Yu-Chien Peter Lin <peter.lin@sifive.com>
To: Pawandeep Oza <pawandeep.oza@oss.qualcomm.com>
Cc: opensbi@lists.infradead.org, zong.li@sifive.com,
greentime.hu@sifive.com, anup@brainfault.org, scott@riscstar.com,
conor@kernel.org, dave.patel@riscstar.com,
raymond.mao@riscstar.com, robin.randhawa@sifive.com,
samuel.holland@sifive.com, krzk@kernel.org
Subject: Re: [PATCH v2 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties
Date: Thu, 24 Sep 2026 15:33:27 +0800 [thread overview]
Message-ID: <arTSR83onqjV23CV@plin-1878> (raw)
In-Reply-To: <CAAVgOk+t1aF6AQHSRkseKEBNc_UGhvjxPJ5KwbSQPJwdD-Cnrw@mail.gmail.com>
Hi Oza,
On Thu, Sep 03, 2026 at 02:15:16PM -0700, Pawandeep Oza wrote:
> On Mon, Aug 17, 2026 at 2:05 AM Yu-Chien Peter Lin <peter.lin@sifive.com> wrote:
> >
> > Add fdt_parse_worlds_all_harts() to parse platform-defined DT
> > properties in the /cpus/cpu@X:
> > - riscv,pmwid: M-mode World ID
> > - riscv,pmwidlist: bitmap of permitted M-mode WIDs
> > - riscv,pmlwidlist: bitmap of permitted lower-privilege WIDs
> > Initialize parsed values in sbi_hart_features with has_* presence
> > flags.
> >
> > These platform-defined values serve as the root-of-trust constraints
> > for per-domain WID assignment during domain creation and context
> > switching.
> >
> > Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
> > ---
> > include/sbi/sbi_hart.h | 6 ++
> > include/sbi_utils/fdt/fdt_helper.h | 2 +
> > lib/utils/fdt/fdt_helper.c | 92 ++++++++++++++++++++++++++++++
> > platform/generic/platform.c | 13 ++++-
> > 4 files changed, 112 insertions(+), 1 deletion(-)
> >
> > diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
> > index 2941809e..4fcf5372 100644
> > --- a/include/sbi/sbi_hart.h
> > +++ b/include/sbi/sbi_hart.h
> > @@ -135,6 +135,12 @@ struct sbi_hart_features {
> > unsigned int pmp_log2gran;
> > unsigned int mhpm_mask;
> > unsigned int mhpm_bits;
> > + u32 pmwid;
> > + u64 pmwidlist;
> > + u64 pmlwidlist;
> > + bool has_pmwid;
> > + bool has_pmwidlist;
> > + bool has_pmlwidlist;
>
> Oza: do you need these 3 booleans ?
>
> you can find out from the value itslef ?
> pmwidlist == 0 means not rpesent
> pmlwidlist = 0 means not rpesent
> and may be pmwid == UINT_MAX then not present ?
I'd like to keep has_pmwid. pmwid = 0 is a valid WID, as
sbi_hart_features is zero-initialized, using a sentinel
like UINT_MAX to mean "not set" would require adding an
explicit init step at sbi_hart_feature allocation time.
I'd like to keep has_pmlwidlist too. Per the spec,
pmlwidlist = 0 is a legal configuration meaning
"no WID is authorized for mlwid" which is the opposite
of unrestricted.
I agree we can drop has_pmwidlist, as pmwidlist can never
be 0.
Thanks,
Peter Lin
>
> > };
> >
> > extern unsigned long hart_features_offset;
> > diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
> > index 75a564d1..3f3d091b 100644
> > --- a/include/sbi_utils/fdt/fdt_helper.h
> > +++ b/include/sbi_utils/fdt/fdt_helper.h
> > @@ -56,6 +56,8 @@ int fdt_parse_timebase_frequency(const void *fdt, unsigned long *freq);
> >
> > int fdt_parse_isa_extensions_all_harts(const void *fdt);
> >
> > +int fdt_parse_worlds_all_harts(const void *fdt);
> > +
> > int fdt_parse_gaisler_uart_node(const void *fdt, int nodeoffset,
> > struct platform_uart_data *uart);
> >
> > diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c
> > index 747ba028..d6025705 100644
> > --- a/lib/utils/fdt/fdt_helper.c
> > +++ b/lib/utils/fdt/fdt_helper.c
> > @@ -457,6 +457,98 @@ int fdt_parse_isa_extensions_all_harts(const void *fdt)
> > return 0;
> > }
> >
> > +int fdt_parse_worlds_all_harts(const void *fdt)
> > +{
> > + u32 hartid;
> > + const fdt32_t *val;
> > + struct sbi_scratch *scratch;
> > + struct sbi_hart_features *hfeatures;
> > + int err, cpu_offset, cpus_offset, len;
> > +
> > + if (!fdt)
> > + return SBI_EINVAL;
> > +
> > + cpus_offset = fdt_path_offset(fdt, "/cpus");
> > + if (cpus_offset < 0)
> > + return cpus_offset;
> > +
> > + fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
> > + err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
> > + if (err)
> > + continue;
> > +
> > + if (!fdt_node_is_enabled(fdt, cpu_offset))
> > + continue;
> > +
> > + scratch = sbi_hartid_to_scratch(hartid);
> > + if (!scratch)
> > + return SBI_ENOENT;
> > +
> > + hfeatures = sbi_hart_features_ptr(scratch);
> > + if (!hfeatures)
> > + return SBI_ENOENT;
> > +
> > + val = fdt_getprop(fdt, cpu_offset, "riscv,pmwid", &len);
> > + if (val && len == sizeof(fdt32_t)) {
> > + hfeatures->pmwid = fdt32_to_cpu(*val);
> > + hfeatures->has_pmwid = true;
> > + }
> > +
> > + val = fdt_getprop(fdt, cpu_offset, "riscv,pmwidlist", &len);
> > + if (val && len == 2 * sizeof(fdt32_t)) {
> > + hfeatures->pmwidlist = ((u64)fdt32_to_cpu(val[0]) << 32) |
> > + fdt32_to_cpu(val[1]);
> > + hfeatures->has_pmwidlist = true;
> > + }
> > +
> > + val = fdt_getprop(fdt, cpu_offset, "riscv,pmlwidlist", &len);
> > + if (val && len == 2 * sizeof(fdt32_t)) {
> > + hfeatures->pmlwidlist = ((u64)fdt32_to_cpu(val[0]) << 32) |
> > + fdt32_to_cpu(val[1]);
> > + hfeatures->has_pmlwidlist = true;
> > + }
> > +
> > + /* Sanity checks */
> > + if (hfeatures->has_pmwidlist && !hfeatures->pmwidlist) {
> > + sbi_printf("%s: hart%u riscv,pmwidlist is empty\n",
> > + __func__, hartid);
> > + return SBI_EINVAL;
> > + }
> > +
> > +#if __riscv_xlen == 32
> > + if (hfeatures->has_pmwidlist &&
> > + (hfeatures->pmwidlist >> 32)) {
> > + sbi_printf("%s: hart%u riscv,pmwidlist has bits beyond XLEN\n",
> > + __func__, hartid);
> > + return SBI_EINVAL;
> > + }
> > +
> > + if (hfeatures->has_pmlwidlist &&
> > + (hfeatures->pmlwidlist >> 32)) {
> > + sbi_printf("%s: hart%u riscv,pmlwidlist has bits beyond XLEN\n",
> > + __func__, hartid);
> > + return SBI_EINVAL;
> > + }
> > +#endif
> > +
> > + if (hfeatures->has_pmwid &&
> > + hfeatures->pmwid >= __riscv_xlen) {
> > + sbi_printf("%s: hart%u riscv,pmwid (%u) exceeds max WID\n",
> > + __func__, hartid, hfeatures->pmwid);
> > + return SBI_EINVAL;
> > + }
> > +
> > + if (hfeatures->has_pmwidlist && hfeatures->has_pmwid &&
> > + !(hfeatures->pmwidlist & BIT_ULL(hfeatures->pmwid))) {
> > + sbi_printf("%s: hart%u riscv,pmwid (%u) not in pmwidlist\n",
> > + __func__, hartid, hfeatures->pmwid);
> > + return SBI_EINVAL;
> > + }
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int fdt_parse_uart_node_common(const void *fdt, int nodeoffset,
> > struct platform_uart_data *uart,
> > unsigned long default_freq,
> > diff --git a/platform/generic/platform.c b/platform/generic/platform.c
> > index 1df0280d..51e9f342 100644
> > --- a/platform/generic/platform.c
> > +++ b/platform/generic/platform.c
> > @@ -255,11 +255,22 @@ int generic_final_init(bool cold_boot)
> >
> > int generic_extensions_init(bool cold_boot)
> > {
> > + int rc;
> > +
> > if (!cold_boot)
> > return 0;
> >
> > /* Parse the ISA string from FDT and enable the listed extensions */
> > - return fdt_parse_isa_extensions_all_harts(fdt_get_address());
> > + rc = fdt_parse_isa_extensions_all_harts(fdt_get_address());
> > + if (rc)
> > + return rc;
> > +
> > + /* Parse RISC-V Worlds CPU properties from FDT */
> > + rc = fdt_parse_worlds_all_harts(fdt_get_address());
> > + if (rc)
> > + return rc;
> > +
> > + return 0;
> > }
> >
> > int generic_domains_init(void)
> > --
> > 2.43.7
> >
--
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next prev parent reply other threads:[~2026-09-24 7:33 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 9:04 [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Yu-Chien Peter Lin
2026-08-17 9:04 ` [PATCH v2 1/9] lib: sbi_hart: detect RISC-V Worlds ISA extensions Yu-Chien Peter Lin
2026-09-03 16:50 ` Pawandeep Oza
2026-08-17 9:04 ` [PATCH v2 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties Yu-Chien Peter Lin
2026-09-03 21:15 ` Pawandeep Oza
2026-09-24 7:33 ` Yu-Chien Peter Lin [this message]
2026-09-25 18:26 ` Pawandeep Oza
2026-08-17 9:04 ` [PATCH v2 3/9] lib: fdt_domain: parse domain " Yu-Chien Peter Lin
2026-09-03 21:18 ` Pawandeep Oza
2026-09-24 7:55 ` Yu-Chien Peter Lin
2026-08-17 9:04 ` [PATCH v2 4/9] lib: sbi_hart: lock mwid CSR for RoT immutability Yu-Chien Peter Lin
2026-09-03 21:20 ` Pawandeep Oza
2026-08-17 9:04 ` [PATCH v2 5/9] lib: sbi_hart: add WID protection mechanism Yu-Chien Peter Lin
2026-08-18 2:39 ` Yu-Chien Peter Lin
2026-09-03 21:52 ` Pawandeep Oza
2026-09-24 8:24 ` Yu-Chien Peter Lin
2026-08-17 9:05 ` [PATCH v2 6/9] lib: sbi_domain_context: add slwid to per-domain S-mode context Yu-Chien Peter Lin
2026-09-03 21:59 ` Pawandeep Oza
2026-08-17 9:05 ` [PATCH v2 7/9] include: sbi_types: add PRIx64 format macro Yu-Chien Peter Lin
2026-09-03 21:59 ` Pawandeep Oza
2026-08-17 9:05 ` [PATCH v2 8/9] lib: sbi: display World ID configuration at boot Yu-Chien Peter Lin
2026-09-03 22:00 ` Pawandeep Oza
2026-08-17 9:05 ` [PATCH v2 9/9] docs: document WID DT properties Yu-Chien Peter Lin
2026-09-03 22:01 ` Pawandeep Oza
2026-09-28 8:35 ` Anup Patel
2026-09-29 13:33 ` Yu-Chien Peter Lin
2026-09-28 11:30 ` Krzysztof Kozlowski
2026-09-29 14:19 ` Yu-Chien Peter Lin
2026-09-28 11:33 ` [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Krzysztof Kozlowski
2026-09-29 14:29 ` Yu-Chien Peter Lin
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