Re: The weird re-ordering issue of the Alpha arch'

["Paul E. McKenney" <paulmck@linux.vnet.ibm.com>]

On Tue, May 09, 2017 at 07:08:01PM +0800, Yubin Ruan wrote:
> On Mon, May 08, 2017 at 08:50:52AM -0700, Paul E. McKenney wrote:
> > On Mon, May 08, 2017 at 09:25:28PM +0800, Yubin Ruan wrote:
> > > On Mon, May 01, 2017 at 08:58:16AM -0700, Paul E. McKenney wrote:
> > > > On Sat, Apr 29, 2017 at 10:26:05PM +0800, Yubin Ruan wrote:
> > 
> > [ . . . ]
> > 
> > > Hmm...that reminds me of some words in the perfbook. In the answer of quick quiz 4.17,
> > > you state that:
> > > 
> > >     Memory barrier only enforce ordering among multiple memory references: They do
> > >     absolutely nothing to expedite the propogation of data from one part of the system
> > >     to another. This leads to a quick rule of thumb:  You do not need memory barriers
> > >     unless you are using more than one variable to communicate between multiple threads.
> > > 
> > > Is that only true for the Alpha processor? I mean, on platforms other than
> > > Alpha (e.g x86), memory barrier *do* expedite the propogation of data from one
> > > processor/core to other processor/core, even though that is not officially documented.
> > 
> > Can you point me at any unofficial documentation of this, for example,
> > any performance measurements indicating that (for example) the mfence
> > instruction speeds up the propagation of previous writes to other CPUs?
> 
> Hmm...I might had had too much drug at that moment. What I mean is that, on platform
> like x86, memory barrier instructions(e.g sfence) enforce that the order of some memory
> references are preserved as the same as in the origin processor by another processors.
> However, any speedup is not guaranteed.

Hey, I was hoping!  ;-)

							Thanx, Paul

> Regards,
> Yubin
> 
> > In the absence of such documentation, all I can really do is change
> > "They do absolutely nothing to expedite..." to something like "They are
> > not guaranteed to do anything to expedite..."
> > 
> > 							Thanx, Paul
> > 
> > > ---
> > > Yubin
> > > 
> > > > > 
> > > > > [1]: https://www.cs.umd.edu/~pugh/java/memoryModel/AlphaReordering.html
> > > > > 
> > > > 
> > > 
> > 
>