* [PATCH] cpu: Fix typos
@ 2018-11-10 12:49 Junchang Wang
2018-11-10 23:51 ` Akira Yokosawa
2018-11-11 16:39 ` Paul E. McKenney
0 siblings, 2 replies; 6+ messages in thread
From: Junchang Wang @ 2018-11-10 12:49 UTC (permalink / raw)
To: paulmck; +Cc: perfbook, Junchang Wang
Signed-off-by: Junchang Wang <junchangwang@gmail.com>
---
Hi Paul,
This is the only patch for Chapter CPU. Please take a look.
Thanks,
--Junchang
--
cpu/overheads.tex | 4 ++--
cpu/overview.tex | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cpu/overheads.tex b/cpu/overheads.tex
index 2474cfe..17b120b 100644
--- a/cpu/overheads.tex
+++ b/cpu/overheads.tex
@@ -155,7 +155,7 @@ displayed in
Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
This system's clock period rounds to 0.6\,ns.
Although it is not unusual for modern microprocessors to be able to
-retire multiple instructions per clock period, the operations's costs are
+retire multiple instructions per clock period, the operations' costs are
nevertheless normalized to a clock period in the third column, labeled
``Ratio''.
The first thing to note about this table is the large values of many of
@@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
computing needs more than a bit of rework!
A fifth hardware optimization is large caches, allowing individual
-CPUs to operate on larger datasets without incuring expensive cache
+CPUs to operate on larger datasets without incurring expensive cache
misses.
Although large caches can degrade energy efficiency and cache-miss
latency, the ever-growing cache sizes on production microprocessors
diff --git a/cpu/overview.tex b/cpu/overview.tex
index 071cf7c..9e91a7b 100644
--- a/cpu/overview.tex
+++ b/cpu/overview.tex
@@ -15,7 +15,7 @@ where the race always goes to the swiftest.
\ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
\end{figure}
-Although there are a few CPU-bound benchmarks that approach the ideal
+Although there are a few CPU-bound benchmarks that approach the ideal case
shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
the typical program more closely resembles an obstacle course than
a race track.
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] cpu: Fix typos
2018-11-10 12:49 [PATCH] cpu: Fix typos Junchang Wang
@ 2018-11-10 23:51 ` Akira Yokosawa
2018-11-11 15:59 ` Paul E. McKenney
2018-11-11 16:39 ` Paul E. McKenney
1 sibling, 1 reply; 6+ messages in thread
From: Akira Yokosawa @ 2018-11-10 23:51 UTC (permalink / raw)
To: Junchang Wang, Paul E. McKenney; +Cc: perfbook, Akira Yokosawa
On 2018/11/10 20:49:21 +0800, Junchang Wang wrote:
> Signed-off-by: Junchang Wang <junchangwang@gmail.com>
> ---
> Hi Paul,
>
> This is the only patch for Chapter CPU. Please take a look.
>
>
> Thanks,
> --Junchang
>
> --
> cpu/overheads.tex | 4 ++--
> cpu/overview.tex | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/cpu/overheads.tex b/cpu/overheads.tex
> index 2474cfe..17b120b 100644
> --- a/cpu/overheads.tex
> +++ b/cpu/overheads.tex
> @@ -155,7 +155,7 @@ displayed in
> Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
> This system's clock period rounds to 0.6\,ns.
> Although it is not unusual for modern microprocessors to be able to
> -retire multiple instructions per clock period, the operations's costs are
> +retire multiple instructions per clock period, the operations' costs are
> nevertheless normalized to a clock period in the third column, labeled
> ``Ratio''.
> The first thing to note about this table is the large values of many of
> @@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
> computing needs more than a bit of rework!
>
> A fifth hardware optimization is large caches, allowing individual
> -CPUs to operate on larger datasets without incuring expensive cache
> +CPUs to operate on larger datasets without incurring expensive cache
> misses.
Nice catches!
> Although large caches can degrade energy efficiency and cache-miss
> latency, the ever-growing cache sizes on production microprocessors
> diff --git a/cpu/overview.tex b/cpu/overview.tex
> index 071cf7c..9e91a7b 100644
> --- a/cpu/overview.tex
> +++ b/cpu/overview.tex
> @@ -15,7 +15,7 @@ where the race always goes to the swiftest.
> \ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
> \end{figure}
>
> -Although there are a few CPU-bound benchmarks that approach the ideal
> +Although there are a few CPU-bound benchmarks that approach the ideal case
> shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
"ideal" can be used as a noun. I don't think this hunk is necessary.
Thanks, Akira
> the typical program more closely resembles an obstacle course than
> a race track.
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] cpu: Fix typos
2018-11-10 23:51 ` Akira Yokosawa
@ 2018-11-11 15:59 ` Paul E. McKenney
2018-11-12 2:25 ` Junchang Wang
0 siblings, 1 reply; 6+ messages in thread
From: Paul E. McKenney @ 2018-11-11 15:59 UTC (permalink / raw)
To: Akira Yokosawa; +Cc: Junchang Wang, perfbook
On Sun, Nov 11, 2018 at 08:51:33AM +0900, Akira Yokosawa wrote:
> On 2018/11/10 20:49:21 +0800, Junchang Wang wrote:
> > Signed-off-by: Junchang Wang <junchangwang@gmail.com>
> > ---
> > Hi Paul,
> >
> > This is the only patch for Chapter CPU. Please take a look.
> >
> >
> > Thanks,
> > --Junchang
> >
> > --
> > cpu/overheads.tex | 4 ++--
> > cpu/overview.tex | 2 +-
> > 2 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/cpu/overheads.tex b/cpu/overheads.tex
> > index 2474cfe..17b120b 100644
> > --- a/cpu/overheads.tex
> > +++ b/cpu/overheads.tex
> > @@ -155,7 +155,7 @@ displayed in
> > Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
> > This system's clock period rounds to 0.6\,ns.
> > Although it is not unusual for modern microprocessors to be able to
> > -retire multiple instructions per clock period, the operations's costs are
> > +retire multiple instructions per clock period, the operations' costs are
> > nevertheless normalized to a clock period in the third column, labeled
> > ``Ratio''.
> > The first thing to note about this table is the large values of many of
> > @@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
> > computing needs more than a bit of rework!
> >
> > A fifth hardware optimization is large caches, allowing individual
> > -CPUs to operate on larger datasets without incuring expensive cache
> > +CPUs to operate on larger datasets without incurring expensive cache
> > misses.
>
> Nice catches!
Indeed!!! ;-)
> > Although large caches can degrade energy efficiency and cache-miss
> > latency, the ever-growing cache sizes on production microprocessors
> > diff --git a/cpu/overview.tex b/cpu/overview.tex
> > index 071cf7c..9e91a7b 100644
> > --- a/cpu/overview.tex
> > +++ b/cpu/overview.tex
> > @@ -15,7 +15,7 @@ where the race always goes to the swiftest.
> > \ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
> > \end{figure}
> >
> > -Although there are a few CPU-bound benchmarks that approach the ideal
> > +Although there are a few CPU-bound benchmarks that approach the ideal case
> > shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
>
> "ideal" can be used as a noun. I don't think this hunk is necessary.
This is quite true, but making it a bit less confusing to non-native
English speakers is worth something. Not that I am volunteering to
confine myself to the 850-word vocabulary of Basic English, mind you! ;-)
So Akira has a good point, but I will take Junchang's patch.
Thanx, Paul
> Thanks, Akira
>
> > the typical program more closely resembles an obstacle course than
> > a race track.
> >
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] cpu: Fix typos
2018-11-10 12:49 [PATCH] cpu: Fix typos Junchang Wang
2018-11-10 23:51 ` Akira Yokosawa
@ 2018-11-11 16:39 ` Paul E. McKenney
1 sibling, 0 replies; 6+ messages in thread
From: Paul E. McKenney @ 2018-11-11 16:39 UTC (permalink / raw)
To: Junchang Wang; +Cc: perfbook
On Sat, Nov 10, 2018 at 08:49:21PM +0800, Junchang Wang wrote:
>
> Signed-off-by: Junchang Wang <junchangwang@gmail.com>
Applied and soon to be pushed, thank you!
Thanx, Paul
> ---
> Hi Paul,
>
> This is the only patch for Chapter CPU. Please take a look.
>
>
> Thanks,
> --Junchang
>
> --
> cpu/overheads.tex | 4 ++--
> cpu/overview.tex | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/cpu/overheads.tex b/cpu/overheads.tex
> index 2474cfe..17b120b 100644
> --- a/cpu/overheads.tex
> +++ b/cpu/overheads.tex
> @@ -155,7 +155,7 @@ displayed in
> Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
> This system's clock period rounds to 0.6\,ns.
> Although it is not unusual for modern microprocessors to be able to
> -retire multiple instructions per clock period, the operations's costs are
> +retire multiple instructions per clock period, the operations' costs are
> nevertheless normalized to a clock period in the third column, labeled
> ``Ratio''.
> The first thing to note about this table is the large values of many of
> @@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
> computing needs more than a bit of rework!
>
> A fifth hardware optimization is large caches, allowing individual
> -CPUs to operate on larger datasets without incuring expensive cache
> +CPUs to operate on larger datasets without incurring expensive cache
> misses.
> Although large caches can degrade energy efficiency and cache-miss
> latency, the ever-growing cache sizes on production microprocessors
> diff --git a/cpu/overview.tex b/cpu/overview.tex
> index 071cf7c..9e91a7b 100644
> --- a/cpu/overview.tex
> +++ b/cpu/overview.tex
> @@ -15,7 +15,7 @@ where the race always goes to the swiftest.
> \ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
> \end{figure}
>
> -Although there are a few CPU-bound benchmarks that approach the ideal
> +Although there are a few CPU-bound benchmarks that approach the ideal case
> shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
> the typical program more closely resembles an obstacle course than
> a race track.
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] cpu: Fix typos
2018-11-11 15:59 ` Paul E. McKenney
@ 2018-11-12 2:25 ` Junchang Wang
2018-11-12 18:08 ` Paul E. McKenney
0 siblings, 1 reply; 6+ messages in thread
From: Junchang Wang @ 2018-11-12 2:25 UTC (permalink / raw)
To: Paul McKenney, Akira Yokosawa; +Cc: perfbook
On Sun, Nov 11, 2018 at 11:59 PM Paul E. McKenney <paulmck@linux.ibm.com> wrote:
>
> On Sun, Nov 11, 2018 at 08:51:33AM +0900, Akira Yokosawa wrote:
> > On 2018/11/10 20:49:21 +0800, Junchang Wang wrote:
> > > Signed-off-by: Junchang Wang <junchangwang@gmail.com>
> > > ---
> > > Hi Paul,
> > >
> > > This is the only patch for Chapter CPU. Please take a look.
> > >
> > >
> > > Thanks,
> > > --Junchang
> > >
> > > --
> > > cpu/overheads.tex | 4 ++--
> > > cpu/overview.tex | 2 +-
> > > 2 files changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/cpu/overheads.tex b/cpu/overheads.tex
> > > index 2474cfe..17b120b 100644
> > > --- a/cpu/overheads.tex
> > > +++ b/cpu/overheads.tex
> > > @@ -155,7 +155,7 @@ displayed in
> > > Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
> > > This system's clock period rounds to 0.6\,ns.
> > > Although it is not unusual for modern microprocessors to be able to
> > > -retire multiple instructions per clock period, the operations's costs are
> > > +retire multiple instructions per clock period, the operations' costs are
> > > nevertheless normalized to a clock period in the third column, labeled
> > > ``Ratio''.
> > > The first thing to note about this table is the large values of many of
> > > @@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
> > > computing needs more than a bit of rework!
> > >
> > > A fifth hardware optimization is large caches, allowing individual
> > > -CPUs to operate on larger datasets without incuring expensive cache
> > > +CPUs to operate on larger datasets without incurring expensive cache
> > > misses.
> >
> > Nice catches!
>
> Indeed!!! ;-)
>
> > > Although large caches can degrade energy efficiency and cache-miss
> > > latency, the ever-growing cache sizes on production microprocessors
> > > diff --git a/cpu/overview.tex b/cpu/overview.tex
> > > index 071cf7c..9e91a7b 100644
> > > --- a/cpu/overview.tex
> > > +++ b/cpu/overview.tex
> > > @@ -15,7 +15,7 @@ where the race always goes to the swiftest.
> > > \ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
> > > \end{figure}
> > >
> > > -Although there are a few CPU-bound benchmarks that approach the ideal
> > > +Although there are a few CPU-bound benchmarks that approach the ideal case
> > > shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
> >
> > "ideal" can be used as a noun. I don't think this hunk is necessary.
>
Hi Akira,
You are right. I never realized this until you helped point this out.
I checked my dictionary which says that ideal can be used as a noun
and means 'a perfect example of what something should be like'; in
this respect, word 'case' is unnecessary. Thank you so much. Happy
learning :-)
> This is quite true, but making it a bit less confusing to non-native
> English speakers is worth something. Not that I am volunteering to
> confine myself to the 850-word vocabulary of Basic English, mind you! ;-)
>
> So Akira has a good point, but I will take Junchang's patch.
Hi Paul,
Thanks. Then I will explicitly mark this type of patches as
suggestions if there are any in the future. It is a great pleasure to
help improve the book.
Best Regards,
--Junchang
>
> Thanx, Paul
>
> > Thanks, Akira
> >
> > > the typical program more closely resembles an obstacle course than
> > > a race track.
> > >
> >
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] cpu: Fix typos
2018-11-12 2:25 ` Junchang Wang
@ 2018-11-12 18:08 ` Paul E. McKenney
0 siblings, 0 replies; 6+ messages in thread
From: Paul E. McKenney @ 2018-11-12 18:08 UTC (permalink / raw)
To: Junchang Wang; +Cc: Akira Yokosawa, perfbook
On Mon, Nov 12, 2018 at 10:25:45AM +0800, Junchang Wang wrote:
> On Sun, Nov 11, 2018 at 11:59 PM Paul E. McKenney <paulmck@linux.ibm.com> wrote:
> >
> > On Sun, Nov 11, 2018 at 08:51:33AM +0900, Akira Yokosawa wrote:
> > > On 2018/11/10 20:49:21 +0800, Junchang Wang wrote:
> > > > Signed-off-by: Junchang Wang <junchangwang@gmail.com>
> > > > ---
> > > > Hi Paul,
> > > >
> > > > This is the only patch for Chapter CPU. Please take a look.
> > > >
> > > >
> > > > Thanks,
> > > > --Junchang
> > > >
> > > > --
> > > > cpu/overheads.tex | 4 ++--
> > > > cpu/overview.tex | 2 +-
> > > > 2 files changed, 3 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/cpu/overheads.tex b/cpu/overheads.tex
> > > > index 2474cfe..17b120b 100644
> > > > --- a/cpu/overheads.tex
> > > > +++ b/cpu/overheads.tex
> > > > @@ -155,7 +155,7 @@ displayed in
> > > > Table~\ref{tab:cpu:Performance of Synchronization Mechanisms on 4-CPU 1.8GHz AMD Opteron 844 System}.
> > > > This system's clock period rounds to 0.6\,ns.
> > > > Although it is not unusual for modern microprocessors to be able to
> > > > -retire multiple instructions per clock period, the operations's costs are
> > > > +retire multiple instructions per clock period, the operations' costs are
> > > > nevertheless normalized to a clock period in the third column, labeled
> > > > ``Ratio''.
> > > > The first thing to note about this table is the large values of many of
> > > > @@ -360,7 +360,7 @@ It is clear that the combination of speculative execution and cloud
> > > > computing needs more than a bit of rework!
> > > >
> > > > A fifth hardware optimization is large caches, allowing individual
> > > > -CPUs to operate on larger datasets without incuring expensive cache
> > > > +CPUs to operate on larger datasets without incurring expensive cache
> > > > misses.
> > >
> > > Nice catches!
> >
> > Indeed!!! ;-)
> >
> > > > Although large caches can degrade energy efficiency and cache-miss
> > > > latency, the ever-growing cache sizes on production microprocessors
> > > > diff --git a/cpu/overview.tex b/cpu/overview.tex
> > > > index 071cf7c..9e91a7b 100644
> > > > --- a/cpu/overview.tex
> > > > +++ b/cpu/overview.tex
> > > > @@ -15,7 +15,7 @@ where the race always goes to the swiftest.
> > > > \ContributedBy{Figure}{fig:cpu:CPU Performance at its Best}{Melissa Broussard}
> > > > \end{figure}
> > > >
> > > > -Although there are a few CPU-bound benchmarks that approach the ideal
> > > > +Although there are a few CPU-bound benchmarks that approach the ideal case
> > > > shown in Figure~\ref{fig:cpu:CPU Performance at its Best},
> > >
> > > "ideal" can be used as a noun. I don't think this hunk is necessary.
> >
>
> Hi Akira,
>
> You are right. I never realized this until you helped point this out.
> I checked my dictionary which says that ideal can be used as a noun
> and means 'a perfect example of what something should be like'; in
> this respect, word 'case' is unnecessary. Thank you so much. Happy
> learning :-)
>
> > This is quite true, but making it a bit less confusing to non-native
> > English speakers is worth something. Not that I am volunteering to
> > confine myself to the 850-word vocabulary of Basic English, mind you! ;-)
> >
> > So Akira has a good point, but I will take Junchang's patch.
>
> Hi Paul,
>
> Thanks. Then I will explicitly mark this type of patches as
> suggestions if there are any in the future. It is a great pleasure to
> help improve the book.
For my part, I am looking forward to more feedback and patches!
Thanx, Paul
> Best Regards,
> --Junchang
>
>
> >
> > Thanx, Paul
> >
> > > Thanks, Akira
> > >
> > > > the typical program more closely resembles an obstacle course than
> > > > a race track.
> > > >
> > >
> >
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-11-13 7:05 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-11-10 12:49 [PATCH] cpu: Fix typos Junchang Wang
2018-11-10 23:51 ` Akira Yokosawa
2018-11-11 15:59 ` Paul E. McKenney
2018-11-12 2:25 ` Junchang Wang
2018-11-12 18:08 ` Paul E. McKenney
2018-11-11 16:39 ` Paul E. McKenney
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox