From: Vadim Pasternak <vadimp@nvidia.com>
To: <hdegoede@redhat.com>
Cc: <platform-driver-x86@vger.kernel.org>,
Vadim Pasternak <vadimp@nvidia.com>
Subject: [PATCH platform-next 11/13] platform: mellanox: mlx-platform: Add mux selection register to regmap
Date: Wed, 8 Feb 2023 08:33:28 +0200 [thread overview]
Message-ID: <20230208063331.15560-12-vadimp@nvidia.com> (raw)
In-Reply-To: <20230208063331.15560-1-vadimp@nvidia.com>
Extend writeable, readable, volatile registers of the 'regmap' object
with for I2C mux selector registers.
The motivation is to pass this object extended with selector registers
to I2C mux driver working over ‘regmap’.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index d00fe9f3f1dc..482c62988a6f 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -139,6 +139,10 @@
#define MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET 0xd2
#define MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET 0xd3
#define MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET 0xd9
+#define MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET 0xdb
+#define MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET 0xda
+#define MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET 0xdc
+#define MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET 0xdd
#define MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET 0xde
#define MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET 0xdf
#define MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET 0xe0
@@ -172,23 +176,19 @@
#define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc
#define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd
#define MLXPLAT_CPLD_LPC_IO_RANGE 0x100
-#define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb
-#define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda
-#define MLXPLAT_CPLD_LPC_I2C_CH3_OFF 0xdc
-#define MLXPLAT_CPLD_LPC_I2C_CH4_OFF 0xdd
#define MLXPLAT_CPLD_LPC_PIO_OFFSET 0x10000UL
#define MLXPLAT_CPLD_LPC_REG1 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \
- MLXPLAT_CPLD_LPC_I2C_CH1_OFF) | \
+ MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET) | \
MLXPLAT_CPLD_LPC_PIO_OFFSET)
#define MLXPLAT_CPLD_LPC_REG2 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \
- MLXPLAT_CPLD_LPC_I2C_CH2_OFF) | \
+ MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET) | \
MLXPLAT_CPLD_LPC_PIO_OFFSET)
#define MLXPLAT_CPLD_LPC_REG3 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \
- MLXPLAT_CPLD_LPC_I2C_CH3_OFF) | \
+ MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET) | \
MLXPLAT_CPLD_LPC_PIO_OFFSET)
#define MLXPLAT_CPLD_LPC_REG4 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \
- MLXPLAT_CPLD_LPC_I2C_CH4_OFF) | \
+ MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET) | \
MLXPLAT_CPLD_LPC_PIO_OFFSET)
/* Masks for aggregation, psu, pwr and fan event in CPLD related registers. */
@@ -4980,6 +4980,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET:
@@ -5107,6 +5111,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET:
@@ -5254,6 +5262,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET:
--
2.20.1
next prev parent reply other threads:[~2023-02-08 6:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-08 6:33 [PATCH platform-next 00/13] platform/x86: Add new systems and features for Nvidia systems Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 01/13] platform: mellanox: Introduce support for rack manager switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 02/13] platform: mellanox: Change "reset_pwr_converter_fail" attribute Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 03/13] platform: mellanox: Cosmetic changes - rename to more common name Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 04/13] platform: mellanox: Introduce support for next-generation 800GB/s switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 05/13] platform: mellanox: Introduce support of new Nvidia L1 switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 06/13] platform: mellanox: Split initialization procedure Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 07/13] platform: mellanox: Split logic in init and exit flow Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 08/13] platform: mellanox: Extend all systems with I2C notification callback Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 09/13] platform/mellanox: mlxreg-hotplug: Allow more flexible hotplug events configuration Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 10/13] platform_data/mlxreg: Add field with mapped resource address Vadim Pasternak
2023-02-08 6:33 ` Vadim Pasternak [this message]
2023-02-08 6:33 ` [PATCH platform-next 12/13] platform: mellanox: mlx-platform: Move bus shift assignment out of the loop Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 13/13] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Vadim Pasternak
2023-02-10 17:46 ` [PATCH platform-next 00/13] platform/x86: Add new systems and features for Nvidia systems Hans de Goede
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