From: Vadim Pasternak <vadimp@nvidia.com>
To: <hdegoede@redhat.com>
Cc: <platform-driver-x86@vger.kernel.org>,
Vadim Pasternak <vadimp@nvidia.com>
Subject: [PATCH platform-next 03/13] platform: mellanox: Cosmetic changes - rename to more common name
Date: Wed, 8 Feb 2023 08:33:20 +0200 [thread overview]
Message-ID: <20230208063331.15560-4-vadimp@nvidia.com> (raw)
In-Reply-To: <20230208063331.15560-1-vadimp@nvidia.com>
Rename 'nvlink_blade' in several declaration to more common name
"chassis_blade", since these names are going to be used for different
kinds of blades.
Fix 'swicth' to 'switch' in comment.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index c53eca49c47f..e629ec8a2a2f 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -473,7 +473,7 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
},
};
-/* Platform channels for rack swicth system family */
+/* Platform channels for rack switch system family */
static const int mlxplat_rack_switch_channels[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
};
@@ -2085,7 +2085,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_global_wp_items_data[] = {
},
};
-static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = {
+static struct mlxreg_core_item mlxplat_mlxcpld_chassis_blade_items[] = {
{
.data = mlxplat_mlxcpld_global_wp_items_data,
.aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
@@ -2098,9 +2098,9 @@ static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = {
};
static
-struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = {
- .items = mlxplat_mlxcpld_nvlink_blade_items,
- .counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_items),
+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = {
+ .items = mlxplat_mlxcpld_chassis_blade_items,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items),
.cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
.mask = MLXPLAT_CPLD_AGGR_MASK_COMEX,
.cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
@@ -3848,8 +3848,8 @@ static struct mlxreg_core_platform_data mlxplat_modular_regs_io_data = {
.counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_regs_io_data),
};
-/* Platform register access for NVLink blade systems family data */
-static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = {
+/* Platform register access for chassis blade systems family data */
+static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = {
{
.label = "cpld1_version",
.reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET,
@@ -4046,9 +4046,9 @@ static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = {
},
};
-static struct mlxreg_core_platform_data mlxplat_nvlink_blade_regs_io_data = {
- .data = mlxplat_mlxcpld_nvlink_blade_regs_io_data,
- .counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_regs_io_data),
+static struct mlxreg_core_platform_data mlxplat_chassis_blade_regs_io_data = {
+ .data = mlxplat_mlxcpld_chassis_blade_regs_io_data,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_regs_io_data),
};
/* Platform FAN default */
@@ -5168,14 +5168,14 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi)
return 1;
}
-static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *dmi)
+static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id *dmi)
{
int i;
mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data);
mlxplat_mux_data = mlxplat_default_mux_data;
- mlxplat_hotplug = &mlxplat_mlxcpld_nvlink_blade_data;
+ mlxplat_hotplug = &mlxplat_mlxcpld_chassis_blade_data;
mlxplat_hotplug->deferred_nr =
mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
for (i = 0; i < mlxplat_mux_num; i++) {
@@ -5183,7 +5183,7 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d
mlxplat_mux_data[i].n_values =
ARRAY_SIZE(mlxplat_msn21xx_channels);
}
- mlxplat_regs_io = &mlxplat_nvlink_blade_regs_io_data;
+ mlxplat_regs_io = &mlxplat_chassis_blade_regs_io_data;
mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400;
@@ -5288,7 +5288,7 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
},
},
{
- .callback = mlxplat_dmi_nvlink_blade_matched,
+ .callback = mlxplat_dmi_chassis_blade_matched,
.matches = {
DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"),
},
--
2.20.1
next prev parent reply other threads:[~2023-02-08 6:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-08 6:33 [PATCH platform-next 00/13] platform/x86: Add new systems and features for Nvidia systems Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 01/13] platform: mellanox: Introduce support for rack manager switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 02/13] platform: mellanox: Change "reset_pwr_converter_fail" attribute Vadim Pasternak
2023-02-08 6:33 ` Vadim Pasternak [this message]
2023-02-08 6:33 ` [PATCH platform-next 04/13] platform: mellanox: Introduce support for next-generation 800GB/s switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 05/13] platform: mellanox: Introduce support of new Nvidia L1 switch Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 06/13] platform: mellanox: Split initialization procedure Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 07/13] platform: mellanox: Split logic in init and exit flow Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 08/13] platform: mellanox: Extend all systems with I2C notification callback Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 09/13] platform/mellanox: mlxreg-hotplug: Allow more flexible hotplug events configuration Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 10/13] platform_data/mlxreg: Add field with mapped resource address Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 11/13] platform: mellanox: mlx-platform: Add mux selection register to regmap Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 12/13] platform: mellanox: mlx-platform: Move bus shift assignment out of the loop Vadim Pasternak
2023-02-08 6:33 ` [PATCH platform-next 13/13] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Vadim Pasternak
2023-02-10 17:46 ` [PATCH platform-next 00/13] platform/x86: Add new systems and features for Nvidia systems Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230208063331.15560-4-vadimp@nvidia.com \
--to=vadimp@nvidia.com \
--cc=hdegoede@redhat.com \
--cc=platform-driver-x86@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox