Re: [PATCH v6 5/9] platform: mellanox: Introduce support of Nvidia smart switch

["Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>]

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On Tue, 11 Feb 2025, Vadim Pasternak wrote:

> Provide platform support for Nvidia Smart Switch SN4280.
> 
> The Smart Switch equipped with:
> - Nvidia COME module based on AMD EPYC™ Embedded 3451 CPU.
> - Nvidia Spectrum-3 ASIC.
> - Four DPUs, each equipped with Nvidia BF3 ARM based processor and
>   with Lattice LFD2NX-40 FPGA device.
> - 28xQSFP-DD external ports.
> - Two power supplies.
> - Four cooling drawers.
> 
> Reviewed-by: Ciju Rajan K <crajank@nvidia.com>
> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
> ---
> v5->v6
> Comments pointed out by Ilpo:
> - Add missing coma in structure 'mlxplat_mlxcpld_xdr_led_data'.
> - Merge lines in structure 'mlxplat_mlxcpld_regmap_smart_switch'.
> - s/int/unsigned int/ in 'mlxplat_dmi_smart_switch_matched'.
> 
> v4->v5
> Comments pointed out by Ilpo:
> - Add blank lines in mlxplat_dmi_smart_switch_matched().
> - Style fixes: remove empty space after the condition fix while() loop.
> ---
>  drivers/platform/mellanox/mlx-platform.c | 1966 +++++++++++++++++++---
>  1 file changed, 1712 insertions(+), 254 deletions(-)
> 

> @@ -6390,8 +7829,25 @@
>  		}
>  	}
>  
> +	/* Add DPU drivers. */
> +	for (i = 0; i < MLXPLAT_CPLD_DPU_MAX_DEVS; i++) {
> +		if (mlxplat_dpu_data[i]) {

You can reverse the logic and use continue to lower the indentation level.

> +			priv->pdev_dpu[i] =
> +				platform_device_register_resndata(&mlxplat_dev->dev, "mlxreg-dpu",
> +								  i, NULL, 0, mlxplat_dpu_data[i],
> +								  sizeof(*mlxplat_dpu_data[i]));
> +			if (IS_ERR(priv->pdev_dpu[i])) {
> +				err = PTR_ERR(priv->pdev_dpu[i]);
> +				goto fail_platform_dpu_register;
> +			}
> +		}
> +	}
> +
>  	return 0;

-- 
 i.