From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Vadim Pasternak <vadimp@nvidia.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
michaelsh@nvidia.com, crajank@nvidia.com, fradensky@nvidia.com,
oleksandrs@nvidia.com, platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH v6 1/9] platform_data/mlxreg: Add capability mask fields
Date: Tue, 11 Feb 2025 16:49:53 +0200 (EET) [thread overview]
Message-ID: <d138c8e3-73c3-3197-2c46-e37b99dd9d35@linux.intel.com> (raw)
In-Reply-To: <20250211091912.36787-2-vadimp@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 2271 bytes --]
On Tue, 11 Feb 2025, Vadim Pasternak wrote:
> Add new field 'capability_mask' to structs 'mlxreg_core_data' and
> 'mlxreg_core_item'.
>
> The ‘capabilty_mask’ is associated with the relevant capability
capability_mask
> registers, indicating which attributes should be handled and which
> ignored. Register contains bitmask of attributes or number of
> attributtes, which should be handled. While 'capability mask' is
attributes
The sentence starting with "While" feels incomplete.
> superset.
>
> Reviewed-by: Felix Radensky <fradensky@nvidia.com>
> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
> ---
> v5->v6
> Revised after comments pointed out by Ilpo:
> - Drop 'capability_bit' from structure 'mlxreg_core_data', since it is
> not used.
> ---
> include/linux/platform_data/mlxreg.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h
> index 0b9f81a6f753..b2a3377a28e5 100644
> --- a/include/linux/platform_data/mlxreg.h
> +++ b/include/linux/platform_data/mlxreg.h
> @@ -118,6 +118,7 @@ struct mlxreg_hotplug_device {
> * @mask: attribute access mask;
> * @bit: attribute effective bit;
> * @capability: attribute capability register;
> + * @capability_mask: superset mask for capability register;
> * @reg_prsnt: attribute presence register;
> * @reg_sync: attribute synch register;
> * @reg_pwr: attribute power register;
> @@ -138,6 +139,7 @@ struct mlxreg_core_data {
> u32 mask;
> u32 bit;
> u32 capability;
> + u32 capability_mask;
> u32 reg_prsnt;
> u32 reg_sync;
> u32 reg_pwr;
> @@ -162,6 +164,7 @@ struct mlxreg_core_data {
> * @reg: group interrupt status register;
> * @mask: group interrupt mask;
> * @capability: group capability register;
> + * @capability_mask: superset mask for capability register;
> * @cache: last status value for elements fro the same group;
> * @count: number of available elements in the group;
> * @ind: element's index inside the group;
> @@ -175,6 +178,7 @@ struct mlxreg_core_item {
> u32 reg;
> u32 mask;
> u32 capability;
> + u32 capability_mask;
> u32 cache;
> u8 count;
> u8 ind;
>
--
i.
next prev parent reply other threads:[~2025-02-11 14:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 9:19 [PATCH v6 0/9] Add support for new systems, amendments Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 1/9] platform_data/mlxreg: Add capability mask fields Vadim Pasternak
2025-02-11 14:49 ` Ilpo Järvinen [this message]
2025-02-11 9:19 ` [PATCH v6 2/9] platform/mellanox mlxreg-hotplug: Add support for new flavor of capability registers Vadim Pasternak
2025-03-04 13:25 ` Ilpo Järvinen
2025-03-17 16:16 ` Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 3/9] platform/mellanox: Rename field to improve code readability Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 4/9] platform/mellanox: mlxreg-dpu: Add initial support for Nvidia DPU Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 5/9] platform: mellanox: Introduce support of Nvidia smart switch Vadim Pasternak
2025-02-11 14:52 ` Ilpo Järvinen
2025-02-11 9:19 ` [PATCH v6 6/9] platform: mellanox: Cosmetic changes to improve code style Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 7/9] platform: mellanox: mlx-platform: Add support for new Nvidia system Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 8/9] platform: mellanox: nvsw-sn2200: Add support for new system flavour Vadim Pasternak
2025-02-11 9:19 ` [PATCH v6 9/9] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Vadim Pasternak
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d138c8e3-73c3-3197-2c46-e37b99dd9d35@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=crajank@nvidia.com \
--cc=fradensky@nvidia.com \
--cc=hdegoede@redhat.com \
--cc=michaelsh@nvidia.com \
--cc=oleksandrs@nvidia.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=vadimp@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox