From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: <platform-driver-x86@vger.kernel.org>,
<intel-xe@lists.freedesktop.org>, <hansg@kernel.org>,
<ilpo.jarvinen@linux.intel.com>, <matthew.brost@intel.com>,
<thomas.hellstrom@linux.intel.com>, <airlied@gmail.com>,
<simona@ffwll.ch>, <david.e.box@linux.intel.com>,
<anoop.c.vijay@intel.com>, <badal.nilawar@intel.com>,
<matthew.d.roper@intel.com>, <james.ausmus@intel.com>,
<karthik.poosa@intel.com>
Subject: Re: [PATCH v4 11/18] drm/xe/vsec: Support Crescent Island PMT
Date: Wed, 2 Sep 2026 15:16:29 -0400 [thread overview]
Message-ID: <aph2DZRfHa7xqMK5@intel.com> (raw)
In-Reply-To: <20260901192736.626777-31-michael.j.ruhl@intel.com>
On Tue, Sep 01, 2026 at 12:27:46PM -0700, Michael J. Ruhl wrote:
> Crescent Island (CRI) supports PMT telemetry and crashlog.
>
> Add Crescent Island (CRI) discovery structure (DVSEC)
> information to allow for Xe registration.
>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_pmt.h | 8 +++--
> drivers/gpu/drm/xe/xe_vsec.c | 51 +++++++++++++++++++++++++++++---
> 2 files changed, 53 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index a62ab05c6b4c..2f6658395587 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -17,8 +17,12 @@
>
> #define PUNIT_VERSION_OFFSET 0xA0
>
> -#define BMG_TELEMETRY_BASE_OFFSET 0xE0000
> -#define BMG_TELEMETRY_OFFSET (SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
> +#define XE_PMT_BASE_OFFSET 0xE0000
> +
> +#define BMG_TELEMETRY_OFFSET (SOC_BASE + XE_PMT_BASE_OFFSET)
> +
> +/* for CRI discovery and telemetry are in an indexed window */
> +#define CRI_PMT_OFFSET (SOC_BASE + XE_PMT_BASE_OFFSET)
>
> #define BMG_MODS_RESIDENCY_OFFSET (0x4D0)
> #define BMG_G2_RESIDENCY_OFFSET (0x530)
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index c6299629dc27..0604e65d10a0 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -8,6 +8,7 @@
> #include <linux/module.h>
> #include <linux/mutex.h>
> #include <linux/pci.h>
> +#include <linux/sizes.h>
> #include <linux/types.h>
>
> #include <drm/drm_drv.h>
> @@ -21,12 +22,23 @@
>
> #include "regs/xe_pmt.h"
>
> -/* PMT GUID value for BMG devices. NOTE: this is NOT a PCI id */
> +/* PMT GUID value for BMG and CRI devices. NOTE: this is NOT a PCI id */
> #define BMG_DEVICE_ID 0xE2F8
> +#define CRI_DEVICE_ID 0xE2FA
> +
> +/*
> + * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes
> + * For BMG and CRI PUNIT and OOBMSMS crashlogs are consecutive.
> + */
> +#define BMG_CRASHLOG_PUNIT_DISC_OFFSET (0x60)
> +#define BMG_CRASHLOG_OOBMSM_DISC_OFFSET (BMG_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
> +
> +#define CRI_CRASHLOG_PUNIT_DISC_OFFSET (0x80)
> +#define CRI_CRASHLOG_OOBMSM_DISC_OFFSET (CRI_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
>
> static struct intel_vsec_header bmg_telemetry = {
> .rev = 1,
> - .length = 0x10,
> + .length = SZ_16,
> .id = VSEC_ID_TELEMETRY,
> .num_entries = 2,
> .entry_size = 4,
> @@ -36,12 +48,12 @@ static struct intel_vsec_header bmg_telemetry = {
>
> static struct intel_vsec_header bmg_crashlog = {
> .rev = 1,
> - .length = 0x10,
> + .length = SZ_16,
> .id = VSEC_ID_CRASHLOG,
> .num_entries = 2,
> .entry_size = 6,
> .tbir = 0,
> - .offset = BMG_DISCOVERY_OFFSET + 0x60,
> + .offset = BMG_DISCOVERY_OFFSET + BMG_CRASHLOG_PUNIT_DISC_OFFSET,
> };
>
> static struct intel_vsec_header *bmg_capabilities[] = {
> @@ -50,9 +62,36 @@ static struct intel_vsec_header *bmg_capabilities[] = {
> NULL
> };
>
> +static struct intel_vsec_header cri_telemetry = {
> + .rev = 1,
> + .length = SZ_16,
> + .id = VSEC_ID_TELEMETRY,
> + .num_entries = 3,
> + .entry_size = 4,
> + .tbir = 0,
> + .offset = CRI_PMT_OFFSET,
> +};
> +
> +static struct intel_vsec_header cri_crashlog = {
> + .rev = 1,
> + .length = SZ_16,
> + .id = VSEC_ID_CRASHLOG,
> + .num_entries = 2,
> + .entry_size = 6,
> + .tbir = 0,
> + .offset = CRI_PMT_OFFSET + CRI_CRASHLOG_PUNIT_DISC_OFFSET,
> +};
> +
> +static struct intel_vsec_header *cri_capabilities[] = {
> + &cri_telemetry,
> + &cri_crashlog,
> + NULL
> +};
> +
> enum xe_vsec {
> XE_VSEC_UNKNOWN = 0,
> XE_VSEC_BMG,
> + XE_VSEC_CRI,
> };
>
> static struct intel_vsec_platform_info xe_vsec_info[] = {
> @@ -60,6 +99,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
> .caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
> .headers = bmg_capabilities,
> },
> + [XE_VSEC_CRI] = {
> + .caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
> + .headers = cri_capabilities,
> + },
> { }
> };
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-09-02 19:16 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 19:27 [PATCH v4 00/18] Crescent Island PMT support Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 01/18] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 02/18] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-02 9:05 ` Ilpo Järvinen
2026-09-02 9:07 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 03/18] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-02 9:08 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 04/18] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 05/18] platform/x86/intel/pmt: Add helpers for callback info Michael J. Ruhl
2026-09-02 9:10 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 06/18] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-02 9:18 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 07/18] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-02 19:06 ` Rodrigo Vivi
2026-09-02 20:47 ` Ruhl, Michael J
2026-09-01 19:27 ` [PATCH v4 08/18] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-02 19:08 ` Rodrigo Vivi
2026-09-02 19:11 ` Matthew Brost
2026-09-01 19:27 ` [PATCH v4 09/18] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-02 19:10 ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 10/18] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-02 19:15 ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 11/18] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-02 19:16 ` Rodrigo Vivi [this message]
2026-09-01 19:27 ` [PATCH v4 12/18] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-02 19:18 ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 13/18] drm/xe/vsec: Crescent Island PMT decode Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 14/18] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 15/18] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 16/18] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 17/18] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 18/18] drm/xe/vsec: Refactor platform check Michael J. Ruhl
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aph2DZRfHa7xqMK5@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=airlied@gmail.com \
--cc=anoop.c.vijay@intel.com \
--cc=badal.nilawar@intel.com \
--cc=david.e.box@linux.intel.com \
--cc=hansg@kernel.org \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=james.ausmus@intel.com \
--cc=karthik.poosa@intel.com \
--cc=matthew.brost@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=michael.j.ruhl@intel.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=simona@ffwll.ch \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox