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From: Mario Limonciello <superm1@kernel.org>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
	hansg@kernel.org, ilpo.jarvinen@linux.intel.com
Cc: platform-driver-x86@vger.kernel.org, Sanket.Goswami@amd.com
Subject: Re: [PATCH v2 0/2] platform/x86/amd/pmc: Add support for AMD 1Ah Family 80h SoC
Date: Tue, 2 Jun 2026 08:58:36 -0500	[thread overview]
Message-ID: <ec389d15-79ef-4267-b7e1-72b04bbcf84d@kernel.org> (raw)
In-Reply-To: <20260601112103.1690951-1-Shyam-sundar.S-k@amd.com>



On 6/1/26 06:21, Shyam Sundar S K wrote:
> The series introduces the necessary device identification, refactors SMU
> mailbox register handling for better maintainability, and configures the
> SoC-specific register offsets required for SMU communication.
> 
> Patch 1 refactors the per-SoC configuration by introducing amd_pmc_cpu_info
> struct that consolidates SMU register offsets, IP block table, and OS hint.
> The individual smu_msg, num_ips, and ips_ptr fields in amd_pmc_dev are
> replaced with a single cpu_info pointer. Per-SoC instances are embedded
> directly as driver_data in the PCI ID table via PCI_DEVICE_DATA(),
> eliminating the amd_pmc_get_ip_info() and amd_pmc_get_os_hint() switch
> statements. The AMD_CPU_ID_* macros are renamed to
> PCI_DEVICE_ID_AMD_CPU_ID_* with compatibility aliases retained.
> 
> Patch 2 adds support for the AMD 1Ah Family 80h SoC by defining its
> distinct SMU register offsets (msg: 0xA10, arg: 0xA18, rsp: 0xA14), adding
> the amd_1ah_m80_cpu_info instance, and wiring it into the PCI ID table,
> amd_pmc_set_cpu_info(), and amd_pmc_idlemask_read(). The corresponding
> ACPI ID AMDI000C is also added.
> 
> v2:
>   - Consolidate 5-patch series into 2 patches
>   - Use PCI_DEVICE_DATA() and maintain per SoC data.
>   - Address other remarks as per Ilpo comments in v1
> 
> Shyam Sundar S K (2):
>    platform/x86/amd/pmc: Use per-SoC cpu_info struct for SMU mailbox and
>      IP info
>    platform/x86/amd/pmc: Add PMC driver support for AMD 1Ah M80H SoC
> 
>   drivers/platform/x86/amd/pmc/pmc.c | 176 ++++++++++++++++++++---------
>   drivers/platform/x86/amd/pmc/pmc.h |  75 ++++++++----
>   2 files changed, 177 insertions(+), 74 deletions(-)
> 

Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>

As a general statement though about patch 1:

If there ends up being too many "Special case" blocks in the future it 
may be better to just switch to explicit CPU ID range matching later. 
There are some other drivers that do this like k10temp:

https://github.com/torvalds/linux/blob/6f3ed7fec72fc8979b2a8c7219c0a9fcfc8d07b5/drivers/hwmon/k10temp.c#L490

  parent reply	other threads:[~2026-06-02 13:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-01 11:21 [PATCH v2 0/2] platform/x86/amd/pmc: Add support for AMD 1Ah Family 80h SoC Shyam Sundar S K
2026-06-01 11:21 ` [PATCH v2 1/2] platform/x86/amd/pmc: Use per-SoC cpu_info struct for SMU mailbox and IP info Shyam Sundar S K
2026-06-08  9:08   ` Ilpo Järvinen
2026-06-09  5:54     ` Shyam Sundar S K
2026-06-09  8:13       ` Ilpo Järvinen
2026-06-01 11:21 ` [PATCH v2 2/2] platform/x86/amd/pmc: Add PMC driver support for AMD 1Ah M80H SoC Shyam Sundar S K
2026-06-08  9:18   ` Ilpo Järvinen
2026-06-09  7:23     ` Shyam Sundar S K
2026-06-02 13:58 ` Mario Limonciello [this message]
2026-06-09  7:38   ` [PATCH v2 0/2] platform/x86/amd/pmc: Add support for AMD 1Ah Family 80h SoC Shyam Sundar S K

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