From: "Doru Blânzeanu" <dblanzeanu@linux.microsoft.com>
To: Magnus Kulke <magnuskulke@linux.microsoft.com>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Magnus Kulke" <magnuskulke@microsoft.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Doru Blânzeanu" <doru.blanzeanu@microsoft.com>,
"Wei Liu" <liuwe@microsoft.com>
Subject: Re: [PATCH 08/12] target/i386/mshv: migrate STIMER state
Date: Wed, 22 Jul 2026 17:24:51 +0300 [thread overview]
Message-ID: <amDSsxdCQyK-9fCU@linux.microsoft.com> (raw)
In-Reply-To: <20260710101534.664604-9-magnuskulke@linux.microsoft.com>
On Fri, Jul 10, 2026 at 12:15:30PM +0200, Magnus Kulke wrote:
> This part of Synic state is retrieved via a mem-aligned page. We declare
> the required space (size reference: rust-vmm/mshv) as a buffer on the VM
> state struct for inclusion in a migration.
>
> Other than other SynIC features, STIMER doesn't depend on SCONTROL being
> set.
>
> Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
> ---
> include/system/mshv_int.h | 2 ++
> target/i386/cpu.h | 5 ++++
> target/i386/machine.c | 20 +++++++++++++++
> target/i386/mshv/mshv-cpu.c | 12 +++++++++
> target/i386/mshv/synic.c | 51 +++++++++++++++++++++++++++++++++++++
> 5 files changed, 90 insertions(+)
>
> diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h
> index bc023d3535..063852115e 100644
> --- a/include/system/mshv_int.h
> +++ b/include/system/mshv_int.h
> @@ -144,5 +144,7 @@ int mshv_set_simp(int cpu_fd, const uint8_t *page);
> int mshv_get_siefp(int cpu_fd, uint8_t *page);
> int mshv_set_siefp(int cpu_fd, const uint8_t *page);
> bool mshv_synic_enabled(const CPUState *cpu);
> +int mshv_get_synthetic_timers(int cpu_fd, uint8_t *state);
> +int mshv_set_synthetic_timers(int cpu_fd, const uint8_t *state);
>
> #endif
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 9270ae95d0..6c9e674e81 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -45,6 +45,10 @@
> #define ELF_MACHINE_UNAME "i686"
> #endif
>
> +#ifdef CONFIG_MSHV
> +#define MSHV_STIMERS_STATE_SIZE 200
> +#endif
> +
> enum {
> R_EAX = 0,
> R_ECX = 1,
> @@ -2303,6 +2307,7 @@ typedef struct CPUArchState {
> #if defined(CONFIG_MSHV)
> uint8_t hv_simp_page[HV_HYP_PAGE_SIZE];
> uint8_t hv_siefp_page[HV_HYP_PAGE_SIZE];
> + uint8_t hv_synthetic_timers_state[MSHV_STIMERS_STATE_SIZE];
> #endif
>
> uint64_t mcg_cap;
> diff --git a/target/i386/machine.c b/target/i386/machine.c
> index 023a397ab8..8d69d7e25e 100644
> --- a/target/i386/machine.c
> +++ b/target/i386/machine.c
> @@ -10,6 +10,7 @@
> #include "exec/watchpoint.h"
> #include "system/kvm.h"
> #include "system/kvm_xen.h"
> +#include "system/mshv.h"
> #include "system/tcg.h"
>
> #include "qemu/error-report.h"
> @@ -952,6 +953,24 @@ static const VMStateDescription vmstate_msr_hyperv_reenlightenment = {
> };
>
> #ifdef CONFIG_MSHV
> +
> +static bool mshv_synthetic_timers_needed(void *opaque)
> +{
> + /* Always migrate synthetic timers */
> + return mshv_enabled();
> +}
> +
> +static const VMStateDescription vmstate_mshv_synthetic_timers = {
> + .name = "cpu/mshv_synthetic_timers",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = mshv_synthetic_timers_needed,
> + .fields = (const VMStateField[]) {
> + VMSTATE_BUFFER(env.hv_synthetic_timers_state, X86CPU),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> static bool mshv_synic_vp_state_needed(void *opaque)
> {
> X86CPU *cpu = opaque;
> @@ -1941,6 +1960,7 @@ const VMStateDescription vmstate_x86_cpu = {
> #endif
> #ifdef CONFIG_MSHV
> &vmstate_mshv_synic_vp_state,
> + &vmstate_mshv_synthetic_timers,
> #endif
> NULL
> }
> diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
> index 57244bc667..ce6cfccc0a 100644
> --- a/target/i386/mshv/mshv-cpu.c
> +++ b/target/i386/mshv/mshv-cpu.c
> @@ -118,6 +118,12 @@ static int get_synic_state(CPUState *cpu)
> int cpu_fd = mshv_vcpufd(cpu);
> int ret;
>
> + ret = mshv_get_synthetic_timers(cpu_fd, env->hv_synthetic_timers_state);
> + if (ret < 0) {
> + error_report("failed to get synthetic timers");
> + return -1;
> + }
> +
> /* SIMP/SIEFP can only be read when SynIC is enabled */
> if (!mshv_synic_enabled(cpu)) {
> return 0;
> @@ -1420,6 +1426,12 @@ static int set_synic_state(const CPUState *cpu)
> int cpu_fd = mshv_vcpufd(cpu);
> int ret;
>
> + ret = mshv_set_synthetic_timers(cpu_fd, env->hv_synthetic_timers_state);
> + if (ret < 0) {
> + error_report("failed to set synthetic timers state");
> + return -1;
> + }
> +
> /* SIMP/SIEFP can only be written when SynIC is enabled */
> if (!mshv_synic_enabled(cpu)) {
> return 0;
> diff --git a/target/i386/mshv/synic.c b/target/i386/mshv/synic.c
> index 8f9fee6ed7..4c629adc3a 100644
> --- a/target/i386/mshv/synic.c
> +++ b/target/i386/mshv/synic.c
> @@ -54,6 +54,57 @@ static int set_vp_state(int cpu_fd, const struct mshv_get_set_vp_state *state)
> return 0;
> }
>
> +int mshv_get_synthetic_timers(int cpu_fd, uint8_t *state)
> +{
> + int ret;
> + void *buffer;
> + struct mshv_get_set_vp_state args = {0};
> +
> + buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);
> + args.buf_ptr = (uint64_t)buffer;
> + args.buf_sz = HV_HYP_PAGE_SIZE;
> + args.type = MSHV_VP_STATE_SYNTHETIC_TIMERS;
> +
> + ret = get_vp_state(cpu_fd, &args);
> +
> + if (ret < 0) {
> + qemu_vfree(buffer);
> + error_report("failed to get synthetic timers");
> + return -1;
> + }
> +
> + memcpy(state, buffer, MSHV_STIMERS_STATE_SIZE);
> + qemu_vfree(buffer);
> +
> + return 0;
> +}
> +
> +int mshv_set_synthetic_timers(int cpu_fd, const uint8_t *state)
> +{
> + int ret;
> + void *buffer;
> + struct mshv_get_set_vp_state args = {0};
> +
> + buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);
> + memset(buffer, 0, HV_HYP_PAGE_SIZE);
> + args.buf_ptr = (uint64_t)buffer;
> + args.buf_sz = HV_HYP_PAGE_SIZE;
> + args.type = MSHV_VP_STATE_SYNTHETIC_TIMERS;
> +
> + assert(state);
> + memcpy(buffer, state, MSHV_STIMERS_STATE_SIZE);
> +
> + ret = set_vp_state(cpu_fd, &args);
> + qemu_vfree(buffer);
> +
> + if (ret < 0) {
> + error_report("failed to set synthetic timers");
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> int mshv_get_simp(int cpu_fd, uint8_t *page)
> {
> int ret;
> --
> 2.34.1
Reviewed-by: Doru Blânzeanu <dblanzeanu@linux.microsoft.com>
next prev parent reply other threads:[~2026-07-22 14:25 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-10 10:15 [PATCH 00/12] Add migration support to MSHV accelerator, Part 2 Magnus Kulke
2026-07-10 10:15 ` [PATCH 01/12] target/i386/mshv: disable AMX TILE features Magnus Kulke
2026-07-16 11:06 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 02/12] accel/mshv: introduce SaveVMHandler Magnus Kulke
2026-07-16 11:10 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 03/12] hw/i386/mshv: migrate REFERENCE_TIME Magnus Kulke
2026-07-16 12:01 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 04/12] accel/mshv: install dummy handler for SIG_IPI Magnus Kulke
2026-07-17 14:43 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 05/12] target/i386/mshv: migrate LAPIC state Magnus Kulke
2026-07-22 11:57 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 06/12] target/i386/mshv: migrate Synic SINT MSRs Magnus Kulke
2026-07-22 14:03 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 07/12] target/i386/mshv: migrate SIMP and SIEFP state Magnus Kulke
2026-07-22 14:12 ` Doru Blânzeanu
2026-07-10 10:15 ` [PATCH 08/12] target/i386/mshv: migrate STIMER state Magnus Kulke
2026-07-22 14:24 ` Doru Blânzeanu [this message]
2026-07-10 10:15 ` [PATCH 09/12] accel/mshv: write synthetic MSRs after migration Magnus Kulke
2026-07-10 10:15 ` [PATCH 10/12] target/i386/mshv: migrate MP_STATE Magnus Kulke
2026-07-10 10:15 ` [PATCH 11/12] target/i386/mshv: toggle fpu/xsave migration Magnus Kulke
2026-07-10 10:15 ` [PATCH 12/12] hw/i386/mshv: drop initial msi vector 0 Magnus Kulke
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