messages from 2022-10-27 05:47:45 to 2022-11-21 17:01:15 UTC [more...]
[PATCH] cleanup: Tweak and re-run return_directly.cocci
2022-11-21 17:00 UTC (8+ messages)
[PATCH 0/3] kvm: fix two svm pmu virtualization bugs
2022-11-21 14:28 UTC (9+ messages)
` [PATCH 1/3] kvm: introduce a helper before creating the 1st vcpu
` [PATCH 2/3] i386: kvm: disable KVM_CAP_PMU_CAPABILITY if "pmu" is disabled
` [PATCH 3/3] target/i386/kvm: get and put AMD pmu registers
[PATCH for-8.0 5/7] target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip
2022-11-21 10:56 UTC (3+ messages)
[PATCH v2 0/5] Nested virtualization fixes for QEMU
2022-11-21 7:23 UTC (8+ messages)
` [PATCH v2 1/5] target/riscv: Typo fix in sstc() predicate
` [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta changes
` [PATCH v2 3/5] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP
` [PATCH v2 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
` [PATCH v2 5/5] target/riscv: Ensure opcode is saved for all relevant instructions
[PATCH v5 0/9] support subsets of code size reduction extension
2022-11-21 7:20 UTC (15+ messages)
` [PATCH v5 1/9] target/riscv: add cfg properties for Zc* extension
` [PATCH v5 2/9] target/riscv: add support for Zca extension
` [PATCH v5 3/9] target/riscv: add support for Zcf extension
` [PATCH v5 4/9] target/riscv: add support for Zcd extension
` [PATCH v5 5/9] target/riscv: add support for Zcb extension
` [PATCH v5 6/9] target/riscv: add support for Zcmp extension
` [PATCH v5 7/9] target/riscv: add support for Zcmt extension
` [PATCH v5 8/9] target/riscv: expose properties for Zc* extension
` [PATCH v5 9/9] disas/riscv.c: add disasm support for Zc*
[PATCH v2] hw/riscv: virt: Remove the redundant ipi-id property
2022-11-21 0:53 UTC (3+ messages)
[PATCH] riscv: Add RISCVCPUConfig.satp_mode to set sv48, sv57, etc
2022-11-20 23:43 UTC (3+ messages)
[PATCH v11 0/5] RISC-V Smstateen support
2022-11-20 23:35 UTC (9+ messages)
` [PATCH v11 1/5] target/riscv: Add smstateen support
` [PATCH v11 3/5] target/riscv: generate virtual instruction exception
` [PATCH v11 4/5] target/riscv: smstateen check for fcsr
[PATCH v4 0/9] support subsets of code size reduction extension
2022-11-18 11:59 UTC (13+ messages)
` [PATCH v4 1/9] target/riscv: add cfg properties for Zc* extension
` [PATCH v4 2/9] target/riscv: add support for Zca extension
` [PATCH v4 3/9] target/riscv: add support for Zcf extension
` [PATCH v4 4/9] target/riscv: add support for Zcd extension
` [PATCH v4 5/9] target/riscv: add support for Zcb extension
` [PATCH v4 6/9] target/riscv: add support for Zcmp extension
` [PATCH v4 7/9] target/riscv: add support for Zcmt extension
` [PATCH v4 8/9] target/riscv: expose properties for Zc* extension
` [PATCH v4 9/9] disas/riscv.c: add disasm support for Zc*
[PATCH v2 0/3] Add (more) missing PolarFire SoC io regions
2022-11-18 7:04 UTC (10+ messages)
` [PATCH v2 1/3] hw/misc/pfsoc: add fabric clocks to ioscb
` [PATCH v2 2/3] hw/riscv: pfsoc: add missing FICs as unimplemented
` [PATCH v2 3/3] hw/{misc, riscv}: pfsoc: add system controller "
[PATCH v3 0/9] support subsets of code size reduction extension
2022-11-18 3:51 UTC (22+ messages)
` [PATCH v3 1/9] target/riscv: add cfg properties for Zc* extension
` [PATCH v3 2/9] target/riscv: add support for Zca extension
` [PATCH v3 3/9] target/riscv: add support for Zcf extension
` [PATCH v3 4/9] target/riscv: add support for Zcd extension
` [PATCH v3 5/9] target/riscv: add support for Zcb extension
` [PATCH v3 6/9] target/riscv: add support for Zcmp extension
` [PATCH v3 7/9] target/riscv: add support for Zcmt extension
` [PATCH v3 8/9] target/riscv: expose properties for Zc* extension
` [PATCH v3 9/9] disas/riscv.c: add disasm support for Zc*
[PATCH v3 0/3] Add (more) missing PolarFire SoC io regions
2022-11-17 22:55 UTC (4+ messages)
` [PATCH v3 1/3] hw/misc: pfsoc: add fabric clocks to ioscb
` [PATCH v3 2/3] hw/riscv: pfsoc: add missing FICs as unimplemented
` [PATCH v3 3/3] hw/{misc, riscv}: pfsoc: add system controller "
[PATCH v2] hw/intc: sifive_plic: Renumber the S irqs for numa support
2022-11-16 2:52 UTC (2+ messages)
[PATCH v2 0/8] support subsets of code size reduction extension
2022-11-16 1:22 UTC (14+ messages)
` [PATCH v2 1/8] target/riscv: add cfg properties for Zc* extension
` [PATCH v2 2/8] target/riscv: add support for Zca and Zcf extensions
` [PATCH v2 3/8] target/riscv: add support for Zcd extension
` [PATCH v2 4/8] target/riscv: add support for Zcb extension
` [PATCH v2 5/8] target/riscv: add support for Zcmp extension
` [PATCH v2 6/8] target/riscv: add support for Zcmt extension
` [PATCH v2 7/8] target/riscv: expose properties for Zc* extension
` [PATCH v2 8/8] disas/riscv.c: add disasm support for Zc*
[PATCH] hw/intc: sifive_plic: Renumber the S irqs for numa support
2022-11-15 4:03 UTC (7+ messages)
[PATCH v1 0/3] target/riscv: Apply KVM policy to ISA extensions
2022-11-14 3:48 UTC (7+ messages)
` [PATCH v1 1/3] update-linux-headers: Version 6.1-rc2
` [PATCH v1 2/3] target/riscv: Extend isa_ext_data for single letter extensions
` [PATCH v1 3/3] target/riscv: kvm: Support selecting VCPU extensions
[PATCH] hw/misc/pfsoc: add fabric clocks to ioscb
2022-11-12 13:19 UTC (6+ messages)
[PATCH] hw/riscv: virt: Remove the redundant ipi-id property
2022-11-12 0:46 UTC (4+ messages)
[PATCH v5 12/20] target/riscv: initialise MemTxAttrs for CPU access
2022-11-11 18:25 UTC
[PATCH v1 0/4] Support native debug icount trigger
2022-11-11 5:31 UTC (17+ messages)
` [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled
` [PATCH v1 2/4] target/riscv: Add itrigger support when icount is enabled
` [PATCH v1 3/4] target/riscv: Enable native debug itrigger
` [PATCH v1 4/4] target/riscv: Add itrigger_enabled field to CPURISCVState
[PATCH V2] hw/riscv: virt: Remove size restriction for pflash
2022-11-09 15:51 UTC (19+ messages)
[PATCH] hw/riscv: virt: Remove size restriction for pflash
2022-11-07 11:23 UTC (8+ messages)
[PATCH 0/5] Nested virtualization fixes for QEMU
2022-11-07 2:48 UTC (13+ messages)
` [PATCH 1/5] target/riscv: Typo fix in sstc() predicate
` [PATCH 2/5] target/riscv: Update VS timer whenever htimedelta changes
` [PATCH 3/5] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP
` [PATCH 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
` [PATCH 5/5] target/riscv: Ensure opcode is saved for all relevant instructions
[PATCH 0/3] Implement the watchdog timer of HiFive 1 rev b
2022-11-01 2:57 UTC (7+ messages)
` [PATCH 1/3] hw/misc: sifive_e_aon: Support "
` [PATCH 2/3] hw/riscv: sifive_e: "
[PATCH v2 0/3] Implement the watchdog timer of HiFive 1 rev b
2022-11-01 2:46 UTC (4+ messages)
` [PATCH v2 1/3] hw/misc: sifive_e_aon: Support "
` [PATCH v2 2/3] hw/riscv: sifive_e: "
` [PATCH v2 3/3] tests/qtest: sifive-e-aon-watchdog-test.c : Add QTest of watchdog of sifive_e
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