qemu-riscv.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Chao Liu <chao.liu.zevorn@gmail.com>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	 Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	 Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	bin.meng@windriver.com, vivahavey@gmail.com,
	 Alvin Chang <alvinga@andestech.com>,
	Yu-Ming Chang <yumin686@andestech.com>,
	 Joel Stanley <joel@jms.id.au>
Subject: Re: [RFC PATCH 02/25] target/riscv/debug: Handle changing trigger types
Date: Mon, 6 Jul 2026 14:13:24 +0800	[thread overview]
Message-ID: <aktHeE11h_RXWQ29@ChaodeMacBook-Pro.local> (raw)
In-Reply-To: <20260114044701.1173347-3-npiggin@gmail.com>

On Wed, Jan 14, 2026 at 02:46:35PM +0800, Nicholas Piggin wrote:
> Updating debug registers will first remove the existing TCG breakpoint /
> watchpoint, then adds it back with new values.
> 
> Writing TDATA1 with a value that changes the trigger type attempts to
> remove the facility for the new trigger type rather than the existing
> one. That is, it will not remove a breakpoint if the type is changed to
> a non-breakpoint type.
> 
> Fix this by removing based on the old trigger type, then inserting based
> on the new type.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>

> ---
>  target/riscv/debug.c | 64 +++++++++++++++++++++++---------------------
>  1 file changed, 33 insertions(+), 31 deletions(-)
> 
> diff --git a/target/riscv/debug.c b/target/riscv/debug.c
> index 4273ab7a8d..2190c25f23 100644
> --- a/target/riscv/debug.c
> +++ b/target/riscv/debug.c
> @@ -528,23 +528,12 @@ static void type2_breakpoint_remove(CPURISCVState *env, target_ulong index)
>  static void type2_reg_write(CPURISCVState *env, target_ulong index,
>                              int tdata_index, target_ulong val)
>  {
> -    target_ulong new_val;
> -
>      switch (tdata_index) {
>      case TDATA1:
> -        new_val = type2_mcontrol_validate(env, val);
> -        if (new_val != env->tdata1[index]) {
> -            env->tdata1[index] = new_val;
> -            type2_breakpoint_remove(env, index);
> -            type2_breakpoint_insert(env, index);
> -        }
> +        env->tdata1[index] = type2_mcontrol_validate(env, val);
>          break;
>      case TDATA2:
> -        if (val != env->tdata2[index]) {
> -            env->tdata2[index] = val;
> -            type2_breakpoint_remove(env, index);
> -            type2_breakpoint_insert(env, index);
> -        }
> +        env->tdata2[index] = val;
>          break;
>      case TDATA3:
>          env->tdata3[index] = textra_validate(env, val);
> @@ -552,6 +541,8 @@ static void type2_reg_write(CPURISCVState *env, target_ulong index,
>      default:
>          g_assert_not_reached();
>      }
> +
> +    type2_breakpoint_insert(env, index);
>  }
>  
>  /* type 6 trigger */
> @@ -642,23 +633,12 @@ static void type6_breakpoint_remove(CPURISCVState *env, target_ulong index)
>  static void type6_reg_write(CPURISCVState *env, target_ulong index,
>                              int tdata_index, target_ulong val)
>  {
> -    target_ulong new_val;
> -
>      switch (tdata_index) {
>      case TDATA1:
> -        new_val = type6_mcontrol6_validate(env, val);
> -        if (new_val != env->tdata1[index]) {
> -            env->tdata1[index] = new_val;
> -            type6_breakpoint_remove(env, index);
> -            type6_breakpoint_insert(env, index);
> -        }
> +        env->tdata1[index] = type6_mcontrol6_validate(env, val);
>          break;
>      case TDATA2:
> -        if (val != env->tdata2[index]) {
> -            env->tdata2[index] = val;
> -            type6_breakpoint_remove(env, index);
> -            type6_breakpoint_insert(env, index);
> -        }
> +        env->tdata2[index] = val;
>          break;
>      case TDATA3:
>          env->tdata3[index] = textra_validate(env, val);
> @@ -666,6 +646,7 @@ static void type6_reg_write(CPURISCVState *env, target_ulong index,
>      default:
>          g_assert_not_reached();
>      }
> +    type6_breakpoint_insert(env, index);
>  }
>  
>  /* icount trigger type */
> @@ -831,8 +812,6 @@ static void itrigger_reg_write(CPURISCVState *env, target_ulong index,
>                  /* set the count to timer */
>                  timer_mod(env->itrigger_timer[index],
>                            env->last_icount + itrigger_get_count(env, index));
> -            } else {
> -                env->itrigger_enabled = riscv_itrigger_enabled(env);
>              }
>          }
>          break;
> @@ -881,12 +860,30 @@ target_ulong tdata_csr_read(CPURISCVState *env, int tdata_index)
>  
>  void tdata_csr_write(CPURISCVState *env, int tdata_index, target_ulong val)
>  {
> -    int trigger_type;
> +    int trigger_type = get_trigger_type(env, env->trigger_cur);
> +    bool check_itrigger = false;
> +
> +    switch (trigger_type) {
> +    case TRIGGER_TYPE_AD_MATCH:
> +        type2_breakpoint_remove(env, env->trigger_cur);
> +        break;
> +    case TRIGGER_TYPE_AD_MATCH6:
> +        type6_breakpoint_remove(env, env->trigger_cur);
> +        break;
> +    case TRIGGER_TYPE_INST_CNT:
> +        /*
> +         * itrigger_enabled is the union of all enabled icount triggers,
> +         * so it's easiest to recheck all if any have changed (removed or
> +         * added or modified).
> +         */
> +        check_itrigger = true;
> +        break;
> +    default:
> +        break;
> +    }
>  
>      if (tdata_index == TDATA1) {
>          trigger_type = extract_trigger_type(env, val);
> -    } else {
> -        trigger_type = get_trigger_type(env, env->trigger_cur);
>      }
>  
>      switch (trigger_type) {
> @@ -898,6 +895,7 @@ void tdata_csr_write(CPURISCVState *env, int tdata_index, target_ulong val)
>          break;
>      case TRIGGER_TYPE_INST_CNT:
>          itrigger_reg_write(env, env->trigger_cur, tdata_index, val);
> +        check_itrigger = true;
>          break;
>      case TRIGGER_TYPE_INT:
>      case TRIGGER_TYPE_EXCP:
> @@ -913,6 +911,10 @@ void tdata_csr_write(CPURISCVState *env, int tdata_index, target_ulong val)
>      default:
>          g_assert_not_reached();
>      }
> +
> +    if (check_itrigger && !icount_enabled()) {
> +        env->itrigger_enabled = riscv_itrigger_enabled(env);
> +    }
>  }
>  
>  target_ulong tinfo_csr_read(CPURISCVState *env)
> -- 
> 2.51.0
> 
> 


      parent reply	other threads:[~2026-07-06  6:14 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20260114044701.1173347-1-npiggin@gmail.com>
     [not found] ` <20260114044701.1173347-4-npiggin@gmail.com>
2026-06-04 10:10   ` [RFC PATCH 03/25] target/riscv/debug: Implement permissive type unavailable trigger Daniel Henrique Barboza
2026-07-06  6:13   ` Chao Liu
     [not found] ` <20260114044701.1173347-6-npiggin@gmail.com>
2026-06-04 10:29   ` [RFC PATCH 05/25] target/riscv/debug: Update itrigger_enabled after changing privilege Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-7-npiggin@gmail.com>
2026-06-04 10:29   ` [RFC PATCH 06/25] target/riscv/debug: Implement get_trigger_action for icount type trigger Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-8-npiggin@gmail.com>
2026-06-04 10:30   ` [RFC PATCH 07/25] target/riscv/debug: Fix migration post_load icount_enabled() test Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-9-npiggin@gmail.com>
2026-06-04 10:30   ` [RFC PATCH 08/25] target/riscv/debug: Fix icount privilege matching " Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-10-npiggin@gmail.com>
2026-06-04 10:31   ` [RFC PATCH 09/25] target/riscv/debug: Implement icount trigger textra matching Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-11-npiggin@gmail.com>
2026-06-04 10:32   ` [RFC PATCH 10/25] target/riscv/debug: Maintain itrigger_enabled in helper_itrigger_match() Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-26-npiggin@gmail.com>
2026-06-04 10:32   ` [RFC PATCH 25/25] target/riscv/debug: Fix minor comment typos Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-12-npiggin@gmail.com>
2026-06-04 11:35   ` [RFC PATCH 11/25] target/riscv/debug: Fix breakpoint matching action Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-13-npiggin@gmail.com>
2026-06-04 11:38   ` [RFC PATCH 12/25] target/riscv/debug: Put mcontrol load/store match address into tval Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-14-npiggin@gmail.com>
2026-06-04 11:38   ` [RFC PATCH 13/25] target/riscv/debug: Remove breakpoints on reset Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-15-npiggin@gmail.com>
2026-06-04 12:52   ` [RFC PATCH 14/25] target/riscv/debug: Move debug CPU post_load details into debug.c Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-16-npiggin@gmail.com>
2026-06-04 12:53   ` [RFC PATCH 15/25] target/riscv/debug: Insert breakpoints after migration Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-18-npiggin@gmail.com>
2026-06-04 12:55   ` [RFC PATCH 17/25] target/riscv/debug: Advertise icount trigger type in tinfo Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-19-npiggin@gmail.com>
2026-06-04 12:56   ` [RFC PATCH 18/25] target/riscv/debug: Reset trigger type to unavailable Daniel Henrique Barboza
2026-06-04 13:12 ` [RFC PATCH 00/25] target/riscv/debug: Sdtrig fixes and TT Ascalon support Daniel Henrique Barboza
     [not found] ` <20260114044701.1173347-2-npiggin@gmail.com>
2026-06-04  9:55   ` [RFC PATCH 01/25] target/riscv/debug: Check only mcontrol triggers for break/watchpoint matching Daniel Henrique Barboza
2026-06-08  2:57   ` Chao Liu
2026-07-03 21:36 ` [RFC PATCH 00/25] target/riscv/debug: Sdtrig fixes and TT Ascalon support Daniel Henrique Barboza
2026-07-04  3:22   ` Chao Liu
     [not found] ` <20260114044701.1173347-5-npiggin@gmail.com>
2026-06-04 10:12   ` [RFC PATCH 04/25] target/riscv/debug: Fix icount trigger privilege check Daniel Henrique Barboza
2026-07-06  5:00   ` Chao Liu
     [not found] ` <20260114044701.1173347-3-npiggin@gmail.com>
2026-07-06  6:13   ` Chao Liu [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aktHeE11h_RXWQ29@ChaodeMacBook-Pro.local \
    --to=chao.liu.zevorn@gmail.com \
    --cc=alistair.francis@wdc.com \
    --cc=alvinga@andestech.com \
    --cc=bin.meng@windriver.com \
    --cc=dbarboza@ventanamicro.com \
    --cc=joel@jms.id.au \
    --cc=liwei1518@gmail.com \
    --cc=npiggin@gmail.com \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=vivahavey@gmail.com \
    --cc=yumin686@andestech.com \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).