From: Zhi Wang <zhiw@nvidia.com>
To: Gary Guo <gary@garyguo.net>
Cc: <rust-for-linux@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <dakr@kernel.org>,
<aliceryhl@google.com>, <bhelgaas@google.com>,
<kwilczynski@kernel.org>, <ojeda@kernel.org>, <boqun@kernel.org>,
<bjorn3_gh@protonmail.com>, <lossin@kernel.org>,
<a.hindborg@kernel.org>, <tmgross@umich.edu>,
<markus.probst@posteo.de>, <cjia@nvidia.com>, <smitra@nvidia.com>,
<ankita@nvidia.com>, <aniketa@nvidia.com>, <kwankhede@nvidia.com>,
<targupta@nvidia.com>, <kjaju@nvidia.com>, <alkumar@nvidia.com>,
<acourbot@nvidia.com>, <joelagnelf@nvidia.com>,
<jhubbard@nvidia.com>, <zhiwang@kernel.org>
Subject: Re: [PATCH v6 1/1] rust: pci: add extended capability and SR-IOV support
Date: Fri, 31 Jul 2026 12:32:49 +0300 [thread overview]
Message-ID: <20260731123249.02bc6ac7@inno-dell> (raw)
In-Reply-To: <DKC4MR1ZBQMP.3L7X2C96OJLFU@garyguo.net>
On Thu, 30 Jul 2026 19:45:05 +0100
"Gary Guo" <gary@garyguo.net> wrote:
snip
> > +
> > +impl ConfigSpace<'_, ExtSriovRegs> {
> > + /// Reads and decodes the VF memory BAR at configuration-space
> > slot `bar_index`.
> > + #[inline]
> > + pub fn read_vf_bar(&self, bar_index: usize) ->
> > Result<ExtSriovVfBar> {
>
> Do you expect people to pass in a random index instead of 0 or
> next_index? If not, this should be an iterator. Otherwise it'd be
> possible to index into high part of 64-bit address.
>
Yes, that is exactly what I want to avoid. Looking at the driver again,
it does not need random access, and I was thinking to make the
interface more convenient for the driver and avoid ambiguous numbers
from driver. Alex also suggested an iterator in an earlier review. So
having an interator makes more sense. I will rework this into an
iterator in the next re-spin.
Z.
> > + if bar_index >= NUM_VF_BARS {
> > + return Err(EINVAL);
> > + }
> > +
> > + let low = crate::io_read!(*self, .vf_bar[try: bar_index]);
>
> Given the bound checking above I'd use `panic: ` here.
>
> > + if low & bindings::PCI_BASE_ADDRESS_SPACE !=
> > bindings::PCI_BASE_ADDRESS_SPACE_MEMORY {
> > + return Err(EINVAL);
> > + }
> > +
> > + let is_64bit = low &
> > bindings::PCI_BASE_ADDRESS_MEM_TYPE_MASK
> > + == bindings::PCI_BASE_ADDRESS_MEM_TYPE_64;
> > + let following_index =
> > bar_index.checked_add(1).ok_or(EINVAL)?;
>
> Just use operator here as it cannot overflow.
>
> > +
> > + let (address, next_index) = if is_64bit {
> > + if following_index >= NUM_VF_BARS {
> > + return Err(EINVAL);
> > + }
> > +
> > + let high = crate::io_read!(*self, .vf_bar[try:
> > following_index]);
>
> Same here.
>
> > + (
> > + (u64::from(high) << 32) | u64::from(low &
> > !VF_MEMORY_BAR_ATTRIBUTE_BITS),
> > + following_index.checked_add(1).ok_or(EINVAL)?,
>
> Same here.
>
> Best,
> Gary
>
> > + )
> > + } else {
> > + (
> > + u64::from(low & !VF_MEMORY_BAR_ATTRIBUTE_BITS),
> > + following_index,
> > + )
> > + };
> > +
> > + Ok(ExtSriovVfBar {
> > + address,
> > + is_64bit,
> > + next_index,
> > + })
> > + }
> > +}
>
>
next prev parent reply other threads:[~2026-07-31 9:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 18:29 [PATCH v6 0/1] Rust PCI capability infrastructure and SR-IOV support Zhi Wang
2026-07-30 18:29 ` [PATCH v6 1/1] rust: pci: add extended capability " Zhi Wang
2026-07-30 18:45 ` Gary Guo
2026-07-31 9:32 ` Zhi Wang [this message]
2026-07-31 9:57 ` Alexandre Courbot
2026-07-31 12:38 ` Gary Guo
2026-07-31 12:52 ` Alexandre Courbot
2026-07-31 10:35 ` Alexandre Courbot
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