[PATCH v1 0/4] rust: Add i8/i16 atomic xchg helpers

[PATCH v1 0/4] rust: Add i8/i16 atomic xchg helpers

[FUJITA Tomonori]

This adds atomic xchg helpers with full, acquire, release, and relaxed
orderings in preparation for i8/i16 atomic xchg support.

The architectures supporting Rust, implement atomic xchg families
using architecture-specific instructions. So the helpers just call
them.

Note that the architectures that support Rust handle xchg differently:

- arm64 and riscv support xchg with all the orderings.

- x86_64 and loongarch support only full-ordering xchg. They calls the
  full-ordering xchg for any orderings.

- arm v7 supports only relaxed-odering xchg. It uses __atomic_op_
 macros to add barriers properly.

FUJITA Tomonori (4):
  rust: helpers: Add i8/i16 atomic xchg helpers
  rust: helpers: Add i8/i16 atomic xchg_acquire helpers
  rust: helpers: Add i8/i16 atomic xchg_release helpers
  rust: helpers: Add i8/i16 atomic xchg_relaxed helpers

 rust/helpers/atomic_ext.c | 41 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)


base-commit: 02c5c8c11bbd34cdd9c566dd4ecca48995c09621
-- 
2.43.0

[PATCH v1 1/4] rust: helpers: Add i8/i16 atomic xchg helpers

[FUJITA Tomonori]

Add i8/i16 atomic xchg helpers that call raw_xchg() macro implementing
atomic xchg using architecture-specific instructions.

x86_64, loongarch, arm64, and riscv implement xchg with full ordering.

arm v7 only supports relaxed-ordering xchg; __atomic_op_fence() macro
is used to add barriers before and after the relaxed xchg.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
---
 rust/helpers/atomic_ext.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c
index fedf808383e0..66b74111d798 100644
--- a/rust/helpers/atomic_ext.c
+++ b/rust/helpers/atomic_ext.c
@@ -2,6 +2,7 @@
 
 #include <asm/barrier.h>
 #include <asm/rwonce.h>
+#include <linux/atomic.h>
 
 __rust_helper s8 rust_helper_atomic_i8_load(s8 *ptr)
 {
@@ -42,3 +43,13 @@ __rust_helper void rust_helper_atomic_i16_store_release(s16 *ptr, s16 val)
 {
 	smp_store_release(ptr, val);
 }
+
+__rust_helper s8 rust_helper_atomic_i8_xchg(s8 *ptr, s8 new)
+{
+	return raw_xchg(ptr, new);
+}
+
+__rust_helper s16 rust_helper_atomic_i16_xchg(s16 *ptr, s16 new)
+{
+	return raw_xchg(ptr, new);
+}
-- 
2.43.0

[PATCH v1 2/4] rust: helpers: Add i8/i16 atomic xchg_acquire helpers

[FUJITA Tomonori]

Add i8/i16 atomic xchg_acquire helpers that call raw_xchg_acquire()
macro implementing atomic xchg_acquire using architecture-specific
instructions.

x86_64 and loongarch use full-ordering xchg.

arm64 and riscv implement acquire-ordering xchg.

arm v7 only supports relaxed-ordering xchg; __atomic_op_acquire() macro
is used to add barriers after the relaxed xchg.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
---
 rust/helpers/atomic_ext.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c
index 66b74111d798..1de75dc0ef90 100644
--- a/rust/helpers/atomic_ext.c
+++ b/rust/helpers/atomic_ext.c
@@ -53,3 +53,13 @@ __rust_helper s16 rust_helper_atomic_i16_xchg(s16 *ptr, s16 new)
 {
 	return raw_xchg(ptr, new);
 }
+
+__rust_helper s8 rust_helper_atomic_i8_xchg_acquire(s8 *ptr, s8 new)
+{
+	return raw_xchg_acquire(ptr, new);
+}
+
+__rust_helper s16 rust_helper_atomic_i16_xchg_acquire(s16 *ptr, s16 new)
+{
+	return raw_xchg_acquire(ptr, new);
+}
-- 
2.43.0

[PATCH v1 3/4] rust: helpers: Add i8/i16 atomic xchg_release helpers

[FUJITA Tomonori]

Add i8/i16 atomic xchg_release helpers that call raw_xchg_release()
macro implementing atomic xchg_release using architecture-specific
instructions.

x86_64 and loongarch use full-ordering xchg.

arm64 and riscv implement release-ordering xchg.

arm v7 only supports relaxed-ordering xchg; __atomic_op_release()
macro is used to add barriers before the relaxed xchg.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
---
 rust/helpers/atomic_ext.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c
index 1de75dc0ef90..dcd115091c91 100644
--- a/rust/helpers/atomic_ext.c
+++ b/rust/helpers/atomic_ext.c
@@ -63,3 +63,13 @@ __rust_helper s16 rust_helper_atomic_i16_xchg_acquire(s16 *ptr, s16 new)
 {
 	return raw_xchg_acquire(ptr, new);
 }
+
+__rust_helper s8 rust_helper_atomic_i8_xchg_release(s8 *ptr, s8 new)
+{
+	return raw_xchg_release(ptr, new);
+}
+
+__rust_helper s16 rust_helper_atomic_i16_xchg_release(s16 *ptr, s16 new)
+{
+	return raw_xchg_release(ptr, new);
+}
-- 
2.43.0

[PATCH v1 4/4] rust: helpers: Add i8/i16 atomic xchg_relaxed helpers

[FUJITA Tomonori]

Add i8/i16 atomic xchg_relaxed helpers that call raw_xchg_relaxed()
macro implementing atomic xchg_relaxed using architecture-specific
instructions.

x86_64 and loongarch use full-ordering xchg.

arm64, riscv, and arm v7 implement relaxed-ordering xchg.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
---
 rust/helpers/atomic_ext.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c
index dcd115091c91..669f4832eb54 100644
--- a/rust/helpers/atomic_ext.c
+++ b/rust/helpers/atomic_ext.c
@@ -73,3 +73,13 @@ __rust_helper s16 rust_helper_atomic_i16_xchg_release(s16 *ptr, s16 new)
 {
 	return raw_xchg_release(ptr, new);
 }
+
+__rust_helper s8 rust_helper_atomic_i8_xchg_relaxed(s8 *ptr, s8 new)
+{
+	return raw_xchg_relaxed(ptr, new);
+}
+
+__rust_helper s16 rust_helper_atomic_i16_xchg_relaxed(s16 *ptr, s16 new)
+{
+	return raw_xchg_relaxed(ptr, new);
+}
-- 
2.43.0

Re: [PATCH v1 0/4] rust: Add i8/i16 atomic xchg helpers

[Alice Ryhl]

On Thu, Dec 18, 2025 at 06:37:38AM +0900, FUJITA Tomonori wrote:
> This adds atomic xchg helpers with full, acquire, release, and relaxed
> orderings in preparation for i8/i16 atomic xchg support.
> 
> The architectures supporting Rust, implement atomic xchg families
> using architecture-specific instructions. So the helpers just call
> them.
> 
> Note that the architectures that support Rust handle xchg differently:
> 
> - arm64 and riscv support xchg with all the orderings.
> 
> - x86_64 and loongarch support only full-ordering xchg. They calls the
>   full-ordering xchg for any orderings.
> 
> - arm v7 supports only relaxed-odering xchg. It uses __atomic_op_
>  macros to add barriers properly.
> 
> FUJITA Tomonori (4):
>   rust: helpers: Add i8/i16 atomic xchg helpers
>   rust: helpers: Add i8/i16 atomic xchg_acquire helpers
>   rust: helpers: Add i8/i16 atomic xchg_release helpers
>   rust: helpers: Add i8/i16 atomic xchg_relaxed helpers

Looks ok to me, and it compiles.

Reviewed-by: Alice Ryhl <aliceryhl@google.com>

Re: [PATCH v1 0/4] rust: Add i8/i16 atomic xchg helpers

[Boqun Feng]

[Cc parisc, sparc32, arc and hexagon]

On Thu, Dec 18, 2025 at 06:37:38AM +0900, FUJITA Tomonori wrote:
> This adds atomic xchg helpers with full, acquire, release, and relaxed
> orderings in preparation for i8/i16 atomic xchg support.
> 
> The architectures supporting Rust, implement atomic xchg families
> using architecture-specific instructions. So the helpers just call
> them.
> 
> Note that the architectures that support Rust handle xchg differently:
> 
> - arm64 and riscv support xchg with all the orderings.
> 
> - x86_64 and loongarch support only full-ordering xchg. They calls the
>   full-ordering xchg for any orderings.
> 
> - arm v7 supports only relaxed-odering xchg. It uses __atomic_op_
>  macros to add barriers properly.
> 

Thanks for the work! And please do Cc linux-arch next time when doing
architecture-related changes. We would get more experts to take a look.

I think the current implementation expects that xchg() work with normal
store/load, and that requires ARCH_SUPPORTS_ATOMIC_RMW. So could you add
a comment saying the current implementation only support
ARCH_SUPPORTS_ATOMIC_RMW architectures? And when you wire up the rust
helpers, I think using #[cfg(CONFIG_ARCH_SUPPORTS_ATOMIC_RMW)] is a good
idea. This will at least let the !ARCH_SUPPORTS_ATOMIC_RMW archs know
that something is missing here.

Regards,
Boqun

> FUJITA Tomonori (4):
>   rust: helpers: Add i8/i16 atomic xchg helpers
>   rust: helpers: Add i8/i16 atomic xchg_acquire helpers
>   rust: helpers: Add i8/i16 atomic xchg_release helpers
>   rust: helpers: Add i8/i16 atomic xchg_relaxed helpers
> 
>  rust/helpers/atomic_ext.c | 41 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> 
> base-commit: 02c5c8c11bbd34cdd9c566dd4ecca48995c09621
> -- 
> 2.43.0
> 

Re: [PATCH v1 0/4] rust: Add i8/i16 atomic xchg helpers

[FUJITA Tomonori]

On Thu, 18 Dec 2025 18:18:17 +0900
Boqun Feng <boqun.feng@gmail.com> wrote:

> [Cc parisc, sparc32, arc and hexagon]
> 
> On Thu, Dec 18, 2025 at 06:37:38AM +0900, FUJITA Tomonori wrote:
>> This adds atomic xchg helpers with full, acquire, release, and relaxed
>> orderings in preparation for i8/i16 atomic xchg support.
>> 
>> The architectures supporting Rust, implement atomic xchg families
>> using architecture-specific instructions. So the helpers just call
>> them.
>> 
>> Note that the architectures that support Rust handle xchg differently:
>> 
>> - arm64 and riscv support xchg with all the orderings.
>> 
>> - x86_64 and loongarch support only full-ordering xchg. They calls the
>>   full-ordering xchg for any orderings.
>> 
>> - arm v7 supports only relaxed-odering xchg. It uses __atomic_op_
>>  macros to add barriers properly.
>> 
> 
> Thanks for the work! And please do Cc linux-arch next time when doing
> architecture-related changes. We would get more experts to take a look.

Will do, thanks.

> I think the current implementation expects that xchg() work with normal
> store/load, and that requires ARCH_SUPPORTS_ATOMIC_RMW. So could you add
> a comment saying the current implementation only support
> ARCH_SUPPORTS_ATOMIC_RMW architectures? And when you wire up the rust
> helpers, I think using #[cfg(CONFIG_ARCH_SUPPORTS_ATOMIC_RMW)] is a good
> idea. This will at least let the !ARCH_SUPPORTS_ATOMIC_RMW archs know
> that something is missing here.

I will add a comment.

ARCH_SUPPORTS_ATOMIC_RMW is required, but we also rely on xchg
supporting i8/i16, which is not currently required on the C side, I
suppose.

As I wrote, at the moment, the architectures that support Rust
(x86_64, armv7, arm64, riscv, and loongarch) satisfy these
requirements, so my plan was to use cfgs in internal.rs to restrict
xchg support to those architectures.