* [PATCH RESEND v2 1/2] arm64: dts: seattle: Update spi clock properties
2024-11-05 21:18 [PATCH RESEND v2 0/2] arm64: dts: PL022 clock fixes Rob Herring (Arm)
@ 2024-11-05 21:18 ` Rob Herring (Arm)
2024-11-05 21:18 ` [PATCH RESEND v2 2/2] arm64: dts: lg131x: " Rob Herring (Arm)
2024-11-12 22:31 ` [PATCH RESEND v2 0/2] arm64: dts: PL022 clock fixes patchwork-bot+linux-soc
2 siblings, 0 replies; 4+ messages in thread
From: Rob Herring (Arm) @ 2024-11-05 21:18 UTC (permalink / raw)
To: soc, Kuldeep Singh, Suravee Suthikulpanit, Tom Lendacky,
Krzysztof Kozlowski, Conor Dooley, Chanho Min, Vladimir Zapolskiy,
Piotr Wojtaszczyk
Cc: devicetree, linux-kernel, linux-arm-kernel
From: Kuldeep Singh <singh.kuldeep87k@gmail.com>
PL022 binding require two clocks to be defined but AMD seattle platform
does't comply with binding and define only one clock i.e apb_pclk.
Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.
CC: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
Arnd, Please apply directly.
---
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
index 690020589d41..d3d931eb7677 100644
--- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
+++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
@@ -123,8 +123,8 @@ spi0: spi@e1020000 {
reg = <0 0xe1020000 0 0x1000>;
spi-controller;
interrupts = <0 330 4>;
- clocks = <&uartspiclk_100mhz>;
- clock-names = "apb_pclk";
+ clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>;
+ clock-names = "sspclk", "apb_pclk";
};
spi1: spi@e1030000 {
@@ -133,8 +133,8 @@ spi1: spi@e1030000 {
reg = <0 0xe1030000 0 0x1000>;
spi-controller;
interrupts = <0 329 4>;
- clocks = <&uartspiclk_100mhz>;
- clock-names = "apb_pclk";
+ clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
--
2.45.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH RESEND v2 2/2] arm64: dts: lg131x: Update spi clock properties
2024-11-05 21:18 [PATCH RESEND v2 0/2] arm64: dts: PL022 clock fixes Rob Herring (Arm)
2024-11-05 21:18 ` [PATCH RESEND v2 1/2] arm64: dts: seattle: Update spi clock properties Rob Herring (Arm)
@ 2024-11-05 21:18 ` Rob Herring (Arm)
2024-11-12 22:31 ` [PATCH RESEND v2 0/2] arm64: dts: PL022 clock fixes patchwork-bot+linux-soc
2 siblings, 0 replies; 4+ messages in thread
From: Rob Herring (Arm) @ 2024-11-05 21:18 UTC (permalink / raw)
To: soc, Kuldeep Singh, Suravee Suthikulpanit, Tom Lendacky,
Krzysztof Kozlowski, Conor Dooley, Chanho Min, Vladimir Zapolskiy,
Piotr Wojtaszczyk
Cc: devicetree, linux-kernel, linux-arm-kernel
From: Kuldeep Singh <singh.kuldeep87k@gmail.com>
PL022 binding require two clocks to be defined but LG1312 and LG1313
platforms don't comply with bindings and define only one clock.
Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.
CC: Chanho Min <chanho.min@lge.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
Arnd, Please apply directly.
---
arch/arm64/boot/dts/lg/lg1312.dtsi | 8 ++++----
arch/arm64/boot/dts/lg/lg1313.dtsi | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index b864ffa74ea8..bb0bcc6875dc 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -173,15 +173,15 @@ spi0: spi@fe800000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "sspclk", "apb_pclk";
};
spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "sspclk", "apb_pclk";
};
dmac0: dma-controller@c1128000 {
compatible = "arm,pl330", "arm,primecell";
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index 996fb39bb50c..c07d670bc465 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -173,15 +173,15 @@ spi0: spi@fe800000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "sspclk", "apb_pclk";
};
spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "sspclk", "apb_pclk";
};
dmac0: dma-controller@c1128000 {
compatible = "arm,pl330", "arm,primecell";
--
2.45.2
^ permalink raw reply related [flat|nested] 4+ messages in thread