From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Arnd Bergmann <arnd@arndb.de>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, <soc@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v1 1/4] MAINTAINERS: add entries for misc. RISC-V SoC drivers and devicetrees
Date: Mon, 14 Nov 2022 09:59:37 +0100 [thread overview]
Message-ID: <4be97a62-4749-c3a3-5401-6e440c24c3f4@microchip.com> (raw)
In-Reply-To: <20221109212219.1598355-2-conor@kernel.org>
On 09/11/2022 at 22:22, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Following some discussion both on & off list, I have volunteered to take
> over maintaining the miscellaneous RISC-V devicetrees & soc drivers from
> Palmer to ease his load.
>
> So far only SiFive and Microchip have stuff in drivers/soc. For the
> former, a SiFive entry exists with a dead GitHub repo - so remove that
> to avoid confusion since the patches for drivers/soc & devicetrees will
> be routed via my tree & other drivers go through their subsystem trees.
> The Microchip directory only contains a RISC-V driver for now, but is
> likely to contain drivers for other archs in the future. To that end,
> change the PolarFire SoC entry to specifically mention the RISC-V driver
> & the new directory level entry does not mention an architecture.
>
> CC: Arnd Bergmann <arnd@arndb.de>
> CC: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks Conor, best regards,
Nicolas
> CC: Palmer Dabbelt <palmer@dabbelt.com>
> Link: https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> MAINTAINERS | 25 +++++++++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 046ff06ff97f..b88ced1ff72c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -13627,6 +13627,12 @@ S: Supported
> F: drivers/misc/atmel-ssc.c
> F: include/linux/atmel-ssc.h
>
> +MICROCHIP SOC DRIVERS
> +M: Conor Dooley <conor@kernel.org>
> +S: Supported
> +T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: drivers/soc/microchip/
> +
> MICROCHIP USB251XB DRIVER
> M: Richard Leitner <richard.leitner@skidata.com>
> L: linux-usb@vger.kernel.org
> @@ -17749,12 +17755,21 @@ F: drivers/mailbox/mailbox-mpfs.c
> F: drivers/pci/controller/pcie-microchip-host.c
> F: drivers/reset/reset-mpfs.c
> F: drivers/rtc/rtc-mpfs.c
> -F: drivers/soc/microchip/
> +F: drivers/soc/microchip/mpfs-sys-controller.c
> F: drivers/spi/spi-microchip-core-qspi.c
> F: drivers/spi/spi-microchip-core.c
> F: drivers/usb/musb/mpfs.c
> F: include/soc/microchip/mpfs.h
>
> +RISC-V MISC SOC SUPPORT
> +M: Conor Dooley <conor@kernel.org>
> +L: linux-riscv@lists.infradead.org
> +S: Maintained
> +Q: https://patchwork.kernel.org/project/linux-riscv/list/
> +T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: Documentation/devicetree/bindings/riscv/
> +F: arch/riscv/boot/dts/
> +
> RNBD BLOCK DRIVERS
> M: Md. Haris Iqbal <haris.iqbal@ionos.com>
> M: Jack Wang <jinpu.wang@ionos.com>
> @@ -18781,7 +18796,6 @@ M: Palmer Dabbelt <palmer@dabbelt.com>
> M: Paul Walmsley <paul.walmsley@sifive.com>
> L: linux-riscv@lists.infradead.org
> S: Supported
> -T: git https://github.com/sifive/riscv-linux.git
> N: sifive
> K: [^@]sifive
>
> @@ -18800,6 +18814,13 @@ S: Maintained
> F: Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> F: drivers/dma/sf-pdma/
>
> +SIFIVE SOC DRIVERS
> +M: Conor Dooley <conor@kernel.org>
> +L: linux-riscv@lists.infradead.org
> +S: Maintained
> +T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
> +F: drivers/soc/sifive/
> +
> SILEAD TOUCHSCREEN DRIVER
> M: Hans de Goede <hdegoede@redhat.com>
> L: linux-input@vger.kernel.org
> --
> 2.37.2
>
--
Nicolas Ferre
next prev parent reply other threads:[~2022-11-14 8:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-09 21:22 [PATCH v1 0/4] Route RISC-V SoC drivers/firmware/DT via the soc tree Conor Dooley
2022-11-09 21:22 ` [PATCH v1 1/4] MAINTAINERS: add entries for misc. RISC-V SoC drivers and devicetrees Conor Dooley
2022-11-14 8:59 ` Nicolas Ferre [this message]
2022-11-14 19:44 ` Palmer Dabbelt
2022-11-09 21:22 ` [PATCH v1 2/4] MAINTAINERS: generify the Microchip RISC-V entry name Conor Dooley
2022-11-09 21:22 ` [PATCH v1 3/4] MAINTAINERS: add an entry for StarFive devicetrees Conor Dooley
2022-11-10 8:48 ` Emil Renner Berthing
2022-11-09 21:22 ` [PATCH v1 4/4] MAINTAINERS: repair Microchip corei2c driver entry Conor Dooley
2022-11-14 13:00 ` [PATCH v1 0/4] Route RISC-V SoC drivers/firmware/DT via the soc tree patchwork-bot+linux-soc
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