[PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Add device tree for Internet Initiative Japan Inc. (IIJ) SA-W2 appliance.

Specification:

- SoC         : Marvell Armada 380 88F6810
- RAM         : DDR3 256 MiB
- Flash       : SPI-NOR 32 MiB
- WLAN        : 2x Mini PCI-E slots
  - 2.4 GHz   : Atheros AR9287
  - 5 GHz     : Qualcomm Atheros QCA9880
- Ethernet    : 5x 10/100/1000 Mbps
  - Switch    : Marvell 88E6172
- LEDs        : 12x
- Buttons     : 1x
- Serial      : "CONSOLE" port (RJ-45, RS-232C level)
  - port      : ttyS0
  - settings  : 115200 8n1
  - assignment: 1:NC , 2:NC , 3:TXD, 4:GND,
                5:GND, 6:RXD, 7:NC , 8:NC
- USB         : 2x USB 2.0 Type-A
  - Hub       : SMCC USB2514B
- Power       : DC Input or PoE Input
  - DC        : 12 VDC, 3 A
  - PoE       : 802.3f
    - module  : Silvertel Ag9712-2BR
- Bootloader  : PMON2000 based
- Stock OS    : NetBSD based

Image header for stock bootloader:

0x00 - 0x07: Identifier      , ascii, "SEIL2015"
0x08 - 0x57: Copyright       , ascii
0x58 - 0x5b: Checksum (CRC32), hex
0x5c - 0x5f: Version Format  , hex  , 0x00000001
0x60 - 0x63: Major Version   , hex
0x64 - 0x67: Minor Version   , hex
0x68 - 0x87: Release Version , ascii
0x88 - 0x8b: Xor Key?        , hex  , 0x00000000 (if not encoded)
0x8c - 0x8f: Data Length     , hex

  example:

  Identifier     : "SEIL2015"
  Copyright      : "ARM OpenWrt Linux-5.15.94"
  Checksum       : 0xd575759f (calculated from kernel data)
  Version Format : 0x00000001
  Major Version  : 0x00000009
  Minor Version  : 0x00000063
  Release Version: "r22151-318ed84c8d"
  Xor Key?       : 0x00000000
  Data Length    : 0x35312d33 (length of kernel data)

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
 arch/arm/boot/dts/Makefile                 |   1 +
 arch/arm/boot/dts/armada-380-iij-sa-w2.dts | 391 +++++++++++++++++++++
 2 files changed, 392 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-380-iij-sa-w2.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index efe4152e5846..19119a3f4f1e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1523,6 +1523,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
 dtb-$(CONFIG_MACH_ARMADA_375) += \
 	armada-375-db.dtb
 dtb-$(CONFIG_MACH_ARMADA_38X) += \
+	armada-380-iij-sa-w2.dtb \
 	armada-381-netgear-gs110emx.dtb \
 	armada-382-rd-ac3x-48g4x2xl.dtb \
 	armada-385-atl-x530.dtb\
diff --git a/arch/arm/boot/dts/armada-380-iij-sa-w2.dts b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
new file mode 100644
index 000000000000..beeecbb0f5f8
--- /dev/null
+++ b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
@@ -0,0 +1,391 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree file for Internet Initiative Japan Inc. SA-W2 Appliance
+ *
+ * Copyright (c) 2023, INAGAKI Hiroshi <musashino.open@gmail.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include "armada-380.dtsi"
+
+/ {
+	model = "IIJ SA-W2";
+	compatible = "iij,sa-w2", "marvell,armada380";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>; /* 256MB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+
+		pcie {
+			status = "okay";
+
+			pcie@1,0 {
+				status = "okay";
+
+				/* Atheros AR9287 */
+				wifi@0,0 {
+					compatible = "pci168c,002e";
+					reg = <0000 0 0 0 0>;
+				};
+			};
+
+			pcie@3,0 {
+				status = "okay";
+
+				/* Qualcomm Atheros QCA9880 */
+				wifi@0,0 {
+					compatible = "qcom,ath10k";
+					reg = <0000 0 0 0 0>;
+				};
+			};
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmx_keys_pins>;
+
+		button-init {
+			label = "init";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmx_leds_pins>;
+
+		led-0 {
+			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <1>;
+		};
+
+		led-1 {
+			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <1>;
+		};
+
+		led-2 {
+			gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led-3 {
+			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led-4 {
+			label = "green:mobile";
+			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_GREEN>;
+		};
+
+		led-5 {
+			label = "red:mobile";
+			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+		};
+
+		led-6 {
+			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <0>;
+		};
+
+		led-7 {
+			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WLAN;
+			function-enumerator = <0>;
+		};
+
+		led-8 {
+			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+		};
+
+		led-9 {
+			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_POWER;
+		};
+
+		led-10 {
+			gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_USB;
+			function-enumerator = <1>;
+			linux,default-trigger = "usbport";
+			trigger-sources = <&hub_port2>;
+		};
+
+		led-11 {
+			gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_USB;
+			function-enumerator = <0>;
+			linux,default-trigger = "usbport";
+			trigger-sources = <&hub_port1>;
+		};
+	};
+
+	regulator-vbus-usb0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vbus-usb0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	regulator-vbus-usb1 {
+		compatible = "regulator-fixed";
+		regulator-name = "vbus-usb1";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&pinctrl {
+	pmx_usb_pins: usb-pins {
+		marvell,pins = "mpp2",		 /* smsc usb2514b reset */
+			       "mpp48", "mpp49", /* port over current */
+			       "mpp52", "mpp53"; /* port vbus */
+		marvell,function = "gpio";
+	};
+
+	pmx_keys_pins: keys-pins {
+		marvell,pins = "mpp18";
+		marvell,function = "gpio";
+	};
+
+	pmx_leds_pins: leds-pins {
+		marvell,pins = "mpp19", "mpp20", "mpp33", "mpp34", "mpp35",
+			       "mpp36", "mpp44", "mpp45", "mpp46", "mpp47",
+			       "mpp54", "mpp55";
+		marvell,function = "gpio";
+	};
+};
+
+&gpio0 {
+	usb-hub-reset {
+		gpio-hog;
+		gpios = <2 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
+
+&usb0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmx_usb_pins>;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/* SMSC USB2514B */
+	hub@1 {
+		compatible = "usb424,2514";
+		reg = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		hub_port1: port@1 {
+			reg = <1>;
+			#trigger-source-cells = <0>;
+		};
+
+		hub_port2: port@2 {
+			reg = <2>;
+			#trigger-source-cells = <0>;
+		};
+	};
+};
+
+&bm {
+	status = "okay";
+};
+
+&bm_bppi {
+	status = "okay";
+};
+
+&eth1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ge1_rgmii_pins>;
+	status = "okay";
+
+	phy-connection-type = "rgmii";
+	buffer-manager = <&bm>;
+	bm,pool-long = <2>;
+	bm,pool-short = <3>;
+
+	nvmem-cells = <&macaddr_bdinfo_6>;
+	nvmem-cell-names = "mac-address";
+	mac-address-increment = <1>;
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+	};
+};
+
+&mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+	status = "okay";
+
+	/* Marvell 88E6172 */
+	switch@0 {
+		compatible = "marvell,mv88e6085";
+		reg = <0x0>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				label = "ge1_0";
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "ge1_1";
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "ge1_2";
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "ge1_3";
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "ge0";
+				nvmem-cells = <&macaddr_bdinfo_6>;
+				nvmem-cell-names = "mac-address";
+			};
+
+			/*
+			 * eth0 is connected to port5 for WAN connection
+			 * on port4 ("GE0")
+			 */
+
+			port@6 {
+				reg = <6>;
+				label = "cpu";
+				ethernet = <&eth1>;
+				phy-connection-type = "rgmii-id";
+
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+		};
+	};
+};
+
+&rtc {
+	status = "disabled";
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x100000>;
+				label = "bootloader";
+				read-only;
+			};
+
+			partition@100000 {
+				reg = <0x100000 0x10000>;
+				label = "bootloader-env";
+				read-only;
+			};
+
+			partition@110000 {
+				compatible = "nvmem-cells";
+				reg = <0x110000 0xf0000>;
+				label = "board-info";
+				read-only;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				macaddr_bdinfo_6: macaddr@6 {
+					reg = <0x6 0x6>;
+				};
+			};
+
+			partition@200000 {
+				reg = <0x200000 0xf00000>;
+				label = "firmware";
+			};
+
+			partition@1100000 {
+				reg = <0x1100000 0xf00000>;
+				label = "rescue";
+				read-only;
+			};
+		};
+	};
+};
-- 
2.25.1

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Krzysztof Kozlowski]

On 23/02/2023 14:25, INAGAKI Hiroshi wrote:
> Add device tree for Internet Initiative Japan Inc. (IIJ) SA-W2 appliance.
> 
> Specification:
> 
> - SoC         : Marvell Armada 380 88F6810
> - RAM         : DDR3 256 MiB
> - Flash       : SPI-NOR 32 MiB
> - WLAN        : 2x Mini PCI-E slots
>   - 2.4 GHz   : Atheros AR9287
>   - 5 GHz     : Qualcomm Atheros QCA9880
> - Ethernet    : 5x 10/100/1000 Mbps
>   - Switch    : Marvell 88E6172
> - LEDs        : 12x
> - Buttons     : 1x
> - Serial      : "CONSOLE" port (RJ-45, RS-232C level)
>   - port      : ttyS0
>   - settings  : 115200 8n1
>   - assignment: 1:NC , 2:NC , 3:TXD, 4:GND,
>                 5:GND, 6:RXD, 7:NC , 8:NC
> - USB         : 2x USB 2.0 Type-A
>   - Hub       : SMCC USB2514B
> - Power       : DC Input or PoE Input
>   - DC        : 12 VDC, 3 A
>   - PoE       : 802.3f
>     - module  : Silvertel Ag9712-2BR
> - Bootloader  : PMON2000 based
> - Stock OS    : NetBSD based
> 
> Image header for stock bootloader:
> 
> 0x00 - 0x07: Identifier      , ascii, "SEIL2015"
> 0x08 - 0x57: Copyright       , ascii
> 0x58 - 0x5b: Checksum (CRC32), hex
> 0x5c - 0x5f: Version Format  , hex  , 0x00000001
> 0x60 - 0x63: Major Version   , hex
> 0x64 - 0x67: Minor Version   , hex
> 0x68 - 0x87: Release Version , ascii
> 0x88 - 0x8b: Xor Key?        , hex  , 0x00000000 (if not encoded)
> 0x8c - 0x8f: Data Length     , hex
> 
>   example:
> 
>   Identifier     : "SEIL2015"
>   Copyright      : "ARM OpenWrt Linux-5.15.94"
>   Checksum       : 0xd575759f (calculated from kernel data)
>   Version Format : 0x00000001
>   Major Version  : 0x00000009
>   Minor Version  : 0x00000063
>   Release Version: "r22151-318ed84c8d"
>   Xor Key?       : 0x00000000
>   Data Length    : 0x35312d33 (length of kernel data)
> 
> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
> ---
>  arch/arm/boot/dts/Makefile                 |   1 +
>  arch/arm/boot/dts/armada-380-iij-sa-w2.dts | 391 +++++++++++++++++++++
>  2 files changed, 392 insertions(+)
>  create mode 100644 arch/arm/boot/dts/armada-380-iij-sa-w2.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index efe4152e5846..19119a3f4f1e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1523,6 +1523,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
>  dtb-$(CONFIG_MACH_ARMADA_375) += \
>  	armada-375-db.dtb
>  dtb-$(CONFIG_MACH_ARMADA_38X) += \
> +	armada-380-iij-sa-w2.dtb \
>  	armada-381-netgear-gs110emx.dtb \
>  	armada-382-rd-ac3x-48g4x2xl.dtb \
>  	armada-385-atl-x530.dtb\
> diff --git a/arch/arm/boot/dts/armada-380-iij-sa-w2.dts b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
> new file mode 100644
> index 000000000000..beeecbb0f5f8
> --- /dev/null
> +++ b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
> @@ -0,0 +1,391 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
> +/*
> + * Device Tree file for Internet Initiative Japan Inc. SA-W2 Appliance
> + *
> + * Copyright (c) 2023, INAGAKI Hiroshi <musashino.open@gmail.com>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +#include "armada-380.dtsi"
> +
> +/ {
> +	model = "IIJ SA-W2";
> +	compatible = "iij,sa-w2", "marvell,armada380";

It would be nice to start documenting the board compatibles, at least
for new boards.

Best regards,
Krzysztof

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hi Krzysztof,

thank you for the comment.

On 2023/02/23 23:17, Krzysztof Kozlowski wrote:
> On 23/02/2023 14:25, INAGAKI Hiroshi wrote:
>> Add device tree for Internet Initiative Japan Inc. (IIJ) SA-W2 appliance.
>>
>> Specification:
>>
>> - SoC         : Marvell Armada 380 88F6810
>> - RAM         : DDR3 256 MiB
>> - Flash       : SPI-NOR 32 MiB
>> - WLAN        : 2x Mini PCI-E slots
>>    - 2.4 GHz   : Atheros AR9287
>>    - 5 GHz     : Qualcomm Atheros QCA9880
>> - Ethernet    : 5x 10/100/1000 Mbps
>>    - Switch    : Marvell 88E6172
>> - LEDs        : 12x
>> - Buttons     : 1x
>> - Serial      : "CONSOLE" port (RJ-45, RS-232C level)
>>    - port      : ttyS0
>>    - settings  : 115200 8n1
>>    - assignment: 1:NC , 2:NC , 3:TXD, 4:GND,
>>                  5:GND, 6:RXD, 7:NC , 8:NC
>> - USB         : 2x USB 2.0 Type-A
>>    - Hub       : SMCC USB2514B
>> - Power       : DC Input or PoE Input
>>    - DC        : 12 VDC, 3 A
>>    - PoE       : 802.3f
>>      - module  : Silvertel Ag9712-2BR
>> - Bootloader  : PMON2000 based
>> - Stock OS    : NetBSD based
>>
>> Image header for stock bootloader:
>>
>> 0x00 - 0x07: Identifier      , ascii, "SEIL2015"
>> 0x08 - 0x57: Copyright       , ascii
>> 0x58 - 0x5b: Checksum (CRC32), hex
>> 0x5c - 0x5f: Version Format  , hex  , 0x00000001
>> 0x60 - 0x63: Major Version   , hex
>> 0x64 - 0x67: Minor Version   , hex
>> 0x68 - 0x87: Release Version , ascii
>> 0x88 - 0x8b: Xor Key?        , hex  , 0x00000000 (if not encoded)
>> 0x8c - 0x8f: Data Length     , hex
>>
>>    example:
>>
>>    Identifier     : "SEIL2015"
>>    Copyright      : "ARM OpenWrt Linux-5.15.94"
>>    Checksum       : 0xd575759f (calculated from kernel data)
>>    Version Format : 0x00000001
>>    Major Version  : 0x00000009
>>    Minor Version  : 0x00000063
>>    Release Version: "r22151-318ed84c8d"
>>    Xor Key?       : 0x00000000
>>    Data Length    : 0x35312d33 (length of kernel data)
>>
>> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
>> ---
>>   arch/arm/boot/dts/Makefile                 |   1 +
>>   arch/arm/boot/dts/armada-380-iij-sa-w2.dts | 391 +++++++++++++++++++++
>>   2 files changed, 392 insertions(+)
>>   create mode 100644 arch/arm/boot/dts/armada-380-iij-sa-w2.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index efe4152e5846..19119a3f4f1e 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -1523,6 +1523,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
>>   dtb-$(CONFIG_MACH_ARMADA_375) += \
>>   	armada-375-db.dtb
>>   dtb-$(CONFIG_MACH_ARMADA_38X) += \
>> +	armada-380-iij-sa-w2.dtb \
>>   	armada-381-netgear-gs110emx.dtb \
>>   	armada-382-rd-ac3x-48g4x2xl.dtb \
>>   	armada-385-atl-x530.dtb\
>> diff --git a/arch/arm/boot/dts/armada-380-iij-sa-w2.dts b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
>> new file mode 100644
>> index 000000000000..beeecbb0f5f8
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/armada-380-iij-sa-w2.dts
>> @@ -0,0 +1,391 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
>> +/*
>> + * Device Tree file for Internet Initiative Japan Inc. SA-W2 Appliance
>> + *
>> + * Copyright (c) 2023, INAGAKI Hiroshi <musashino.open@gmail.com>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/leds/common.h>
>> +#include "armada-380.dtsi"
>> +
>> +/ {
>> +	model = "IIJ SA-W2";
>> +	compatible = "iij,sa-w2", "marvell,armada380";
> It would be nice to start documenting the board compatibles, at least
> for new boards.

So...how do I do that?

>
> Best regards,
> Krzysztof
>

Regards,
Hiroshi

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Krzysztof Kozlowski]

On 24/02/2023 13:28, INAGAKI Hiroshi wrote:

>>> +
>>> +/ {
>>> +	model = "IIJ SA-W2";
>>> +	compatible = "iij,sa-w2", "marvell,armada380";
>> It would be nice to start documenting the board compatibles, at least
>> for new boards.
> 
> So...how do I do that?

Start with something like this for Marvell:

https://lore.kernel.org/all/20230222203847.2664903-2-colin.foster@in-advantage.com/

But maybe someone already started it for Marvell? Marvell SoC
maintainers might help here to coordinate to avoid duplicated work.

Best regards,
Krzysztof

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hi Krzysztof,

thank you for the response.

On 2023/02/24 21:53, Krzysztof Kozlowski wrote:
> On 24/02/2023 13:28, INAGAKI Hiroshi wrote:
>
>>>> +
>>>> +/ {
>>>> +	model = "IIJ SA-W2";
>>>> +	compatible = "iij,sa-w2", "marvell,armada380";
>>> It would be nice to start documenting the board compatibles, at least
>>> for new boards.
>> So...how do I do that?
> Start with something like this for Marvell:
>
> https://lore.kernel.org/all/20230222203847.2664903-2-colin.foster@in-advantage.com/

Oh, got it. So marvell/armada-38x.yaml needs to be created from 
armada-38x.txt like armada-37xx.yaml.

Questions:

- who should be assigned to "maintainers:" in new yaml?
- should the old text file be deleted when new yaml is created?

> But maybe someone already started it for Marvell? Marvell SoC
> maintainers might help here to coordinate to avoid duplicated work.

OK, I'll try to add it if no one is working on...

>
> Best regards,
> Krzysztof
>

Regards,
Hiroshi

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Krzysztof Kozlowski]

On 25/02/2023 13:48, INAGAKI Hiroshi wrote:
> Hi Krzysztof,
> 
> thank you for the response.
> 
> On 2023/02/24 21:53, Krzysztof Kozlowski wrote:
>> On 24/02/2023 13:28, INAGAKI Hiroshi wrote:
>>
>>>>> +
>>>>> +/ {
>>>>> +	model = "IIJ SA-W2";
>>>>> +	compatible = "iij,sa-w2", "marvell,armada380";
>>>> It would be nice to start documenting the board compatibles, at least
>>>> for new boards.
>>> So...how do I do that?
>> Start with something like this for Marvell:
>>
>> https://lore.kernel.org/all/20230222203847.2664903-2-colin.foster@in-advantage.com/
> 
> Oh, got it. So marvell/armada-38x.yaml needs to be created from 
> armada-38x.txt like armada-37xx.yaml.

I don't understand why we need three or more files... all or almost all
platforms are having them in one file. So just merge them to one.

> 
> Questions:
> 
> - who should be assigned to "maintainers:" in new yaml?

Maintainer of platform.

> - should the old text file be deleted when new yaml is created?

If you convert, then yes, but we did not talk about conversion but at
least starting documenting the new ones.



Best regards,
Krzysztof

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hi Krzysztof,

On 2023/02/25 22:11, Krzysztof Kozlowski wrote:
> On 25/02/2023 13:48, INAGAKI Hiroshi wrote:
>> Hi Krzysztof,
>>
>> thank you for the response.
>>
>> On 2023/02/24 21:53, Krzysztof Kozlowski wrote:
>>> On 24/02/2023 13:28, INAGAKI Hiroshi wrote:
>>>
>>>>>> +
>>>>>> +/ {
>>>>>> +	model = "IIJ SA-W2";
>>>>>> +	compatible = "iij,sa-w2", "marvell,armada380";
>>>>> It would be nice to start documenting the board compatibles, at least
>>>>> for new boards.
>>>> So...how do I do that?
>>> Start with something like this for Marvell:
>>>
>>> https://lore.kernel.org/all/20230222203847.2664903-2-colin.foster@in-advantage.com/
>> Oh, got it. So marvell/armada-38x.yaml needs to be created from
>> armada-38x.txt like armada-37xx.yaml.
> I don't understand why we need three or more files... all or almost all
> platforms are having them in one file. So just merge them to one.
>
>> Questions:
>>
>> - who should be assigned to "maintainers:" in new yaml?
> Maintainer of platform.
>
>> - should the old text file be deleted when new yaml is created?
> If you convert, then yes, but we did not talk about conversion but at
> least starting documenting the new ones.

thank you for your answers and sorry for my misunderstandings...

So, (to organize my thoughts and understand correctly)

- what is the optimal solution for "documenting the board compatibles" 
of Marvell platforms in the current state?
- What should I do in this contribution of SA-W2 for "documenting the 
board compatibles"?

>
>
>
> Best regards,
> Krzysztof
>

Regards,
Hiroshi

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Andrew Lunn]

> +		pcie {
> +			status = "okay";
> +
> +			pcie@1,0 {
> +				status = "okay";
> +
> +				/* Atheros AR9287 */
> +				wifi@0,0 {
> +					compatible = "pci168c,002e";
> +					reg = <0000 0 0 0 0>;
> +				};
> +			};
> +
> +			pcie@3,0 {
> +				status = "okay";
> +
> +				/* Qualcomm Atheros QCA9880 */
> +				wifi@0,0 {
> +					compatible = "qcom,ath10k";
> +					reg = <0000 0 0 0 0>;
> +				};
> +			};
> +		};
> +	};

These are not wrong, but they are also not needed. PCI devices should
be discovered by enumeration, and you don't have any additional
properties here, or phandles pointing to these nodes.

I assume these are COTS wifi modules? By listing them here you are
restricting some flexibility. The OEM could for example swap the
modules around, and Linux would not care, but the DT would then be
wrong. Or you could have a device with a different module because it
is cheaper, and again, Linux would not care, but the DT would be
wrong.

> +&usb0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pmx_usb_pins>;
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	/* SMSC USB2514B */
> +	hub@1 {
> +		compatible = "usb424,2514";
> +		reg = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		hub_port1: port@1 {
> +			reg = <1>;
> +			#trigger-source-cells = <0>;
> +		};
> +
> +		hub_port2: port@2 {
> +			reg = <2>;
> +			#trigger-source-cells = <0>;
> +		};
> +	};
> +};

Same comment as PCI. However, it is likely that the USB hub is
actually on the board, not a module, so it is a lot less likely to
change.

As i said, they are not wrong, so you don't need to remove them.

	Andrew

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hi Andrew,

thank you for your reviews and detailed descriptions.

On 2023/02/23 23:43, Andrew Lunn wrote:
>> +		pcie {
>> +			status = "okay";
>> +
>> +			pcie@1,0 {
>> +				status = "okay";
>> +
>> +				/* Atheros AR9287 */
>> +				wifi@0,0 {
>> +					compatible = "pci168c,002e";
>> +					reg = <0000 0 0 0 0>;
>> +				};
>> +			};
>> +
>> +			pcie@3,0 {
>> +				status = "okay";
>> +
>> +				/* Qualcomm Atheros QCA9880 */
>> +				wifi@0,0 {
>> +					compatible = "qcom,ath10k";
>> +					reg = <0000 0 0 0 0>;
>> +				};
>> +			};
>> +		};
>> +	};
> These are not wrong, but they are also not needed. PCI devices should
> be discovered by enumeration, and you don't have any additional
> properties here, or phandles pointing to these nodes.
>
> I assume these are COTS wifi modules? By listing them here you are
> restricting some flexibility. The OEM could for example swap the
> modules around, and Linux would not care, but the DT would then be
> wrong. Or you could have a device with a different module because it
> is cheaper, and again, Linux would not care, but the DT would be
> wrong.

Got it. SA-W2 is not designed to allow users to swap cards under 
normal use, but certainly things like you said can happen...
I'll remove "wifi" nodes.

 > I assume these are COTS wifi modules?

Yes, those are the modules manufactured by Silex Technology, Inc. [1][2].

[1]: https://www.silex.jp/products/wireless-module/sxpcegn.html
[2]: https://www.silex.jp/products/wireless-module/sxpceac.html

>
>> +&usb0 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pmx_usb_pins>;
>> +	status = "okay";
>> +	#address-cells = <1>;
>> +	#size-cells = <0>;
>> +
>> +	/* SMSC USB2514B */
>> +	hub@1 {
>> +		compatible = "usb424,2514";
>> +		reg = <1>;
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		hub_port1: port@1 {
>> +			reg = <1>;
>> +			#trigger-source-cells = <0>;
>> +		};
>> +
>> +		hub_port2: port@2 {
>> +			reg = <2>;
>> +			#trigger-source-cells = <0>;
>> +		};
>> +	};
>> +};
> Same comment as PCI. However, it is likely that the USB hub is
> actually on the board, not a module, so it is a lot less likely to
> change.

Yes, that USB hub is on the PCB and wired to the SoC directly. But 
I'll keep it in mind...

>
> As i said, they are not wrong, so you don't need to remove them.
>
> 	Andrew
>

Regards,
Hiroshi

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Gregory CLEMENT]

Hello INAGAKI Hiroshi,

do you plan to send a v2 soon based on the reviews you got ?

Or if you already sent it, I missed it, in this case could you resend it
with me in CC ?

Thanks,

Gregory

> Hi Andrew,
>
> thank you for your reviews and detailed descriptions.
>
> On 2023/02/23 23:43, Andrew Lunn wrote:
>>> +		pcie {
>>> +			status = "okay";
>>> +
>>> +			pcie@1,0 {
>>> +				status = "okay";
>>> +
>>> +				/* Atheros AR9287 */
>>> +				wifi@0,0 {
>>> +					compatible = "pci168c,002e";
>>> +					reg = <0000 0 0 0 0>;
>>> +				};
>>> +			};
>>> +
>>> +			pcie@3,0 {
>>> +				status = "okay";
>>> +
>>> +				/* Qualcomm Atheros QCA9880 */
>>> +				wifi@0,0 {
>>> +					compatible = "qcom,ath10k";
>>> +					reg = <0000 0 0 0 0>;
>>> +				};
>>> +			};
>>> +		};
>>> +	};
>> These are not wrong, but they are also not needed. PCI devices should
>> be discovered by enumeration, and you don't have any additional
>> properties here, or phandles pointing to these nodes.
>>
>> I assume these are COTS wifi modules? By listing them here you are
>> restricting some flexibility. The OEM could for example swap the
>> modules around, and Linux would not care, but the DT would then be
>> wrong. Or you could have a device with a different module because it
>> is cheaper, and again, Linux would not care, but the DT would be
>> wrong.
>
> Got it. SA-W2 is not designed to allow users to swap cards under 
> normal use, but certainly things like you said can happen...
> I'll remove "wifi" nodes.
>
>  > I assume these are COTS wifi modules?
>
> Yes, those are the modules manufactured by Silex Technology, Inc. [1][2].
>
> [1]: https://www.silex.jp/products/wireless-module/sxpcegn.html
> [2]: https://www.silex.jp/products/wireless-module/sxpceac.html
>
>>
>>> +&usb0 {
>>> +	pinctrl-names = "default";
>>> +	pinctrl-0 = <&pmx_usb_pins>;
>>> +	status = "okay";
>>> +	#address-cells = <1>;
>>> +	#size-cells = <0>;
>>> +
>>> +	/* SMSC USB2514B */
>>> +	hub@1 {
>>> +		compatible = "usb424,2514";
>>> +		reg = <1>;
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +
>>> +		hub_port1: port@1 {
>>> +			reg = <1>;
>>> +			#trigger-source-cells = <0>;
>>> +		};
>>> +
>>> +		hub_port2: port@2 {
>>> +			reg = <2>;
>>> +			#trigger-source-cells = <0>;
>>> +		};
>>> +	};
>>> +};
>> Same comment as PCI. However, it is likely that the USB hub is
>> actually on the board, not a module, so it is a lot less likely to
>> change.
>
> Yes, that USB hub is on the PCB and wired to the SoC directly. But 
> I'll keep it in mind...
>
>>
>> As i said, they are not wrong, so you don't need to remove them.
>>
>> 	Andrew
>>
>
> Regards,
> Hiroshi

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hello Gregory CLEMENT,

On 2023/04/08 0:34, Gregory CLEMENT wrote:
> Hello INAGAKI Hiroshi,
>
> do you plan to send a v2 soon based on the reviews you got ?

Yes, I'm planning to send the next series.
But I don't know the details about "documenting the board compatibles" 
suggested by Krzysztof Kozlowski and I don't know what to do for it, 
so I'm pausing this contribution...

>
> Or if you already sent it, I missed it, in this case could you resend it
> with me in CC ?
>
> Thanks,
>
> Gregory
>

Regards,
Hiroshi

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Andrew Lunn]

On Sun, Apr 09, 2023 at 02:13:11PM +0900, INAGAKI Hiroshi wrote:
> Hello Gregory CLEMENT,
> 
> On 2023/04/08 0:34, Gregory CLEMENT wrote:
> > Hello INAGAKI Hiroshi,
> > 
> > do you plan to send a v2 soon based on the reviews you got ?
> 
> Yes, I'm planning to send the next series.
> But I don't know the details about "documenting the board compatibles"
> suggested by Krzysztof Kozlowski and I don't know what to do for it, so I'm
> pausing this contribution...

Create Documentation/devicetree/bindings/arm/marvell/armada-380.yaml

Put in it

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/marvell/armada-380.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell Armada 380 SoC architecture

maintainers:
  - Andrew Lunn <andrew@lunn.ch>

description:
  Platforms based on Marvell Armada 380 SoC architecture.

properties:
  $nodename:
    const: '/'
  compatibnle:
    oneOf:

      - description: Marvell Armada 380 SoC based platforms
        items:
          - enum:
              - phytec,pcm049   # Phytec OMAP 4460 SoM
          - const: "marvell,armada380"

additionalProperties: true


But replace the phytex,pcm049 with the compatible for your board.

    Andrew

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[INAGAKI Hiroshi]

Hello Andrew Lunn,

thank you for your guidance, I'll do it.

Regards,
Hiroshi

On 2023/04/09 23:07, Andrew Lunn wrote:
> On Sun, Apr 09, 2023 at 02:13:11PM +0900, INAGAKI Hiroshi wrote:
>> Hello Gregory CLEMENT,
>>
>> On 2023/04/08 0:34, Gregory CLEMENT wrote:
>>> Hello INAGAKI Hiroshi,
>>>
>>> do you plan to send a v2 soon based on the reviews you got ?
>> Yes, I'm planning to send the next series.
>> But I don't know the details about "documenting the board compatibles"
>> suggested by Krzysztof Kozlowski and I don't know what to do for it, so I'm
>> pausing this contribution...
> Create Documentation/devicetree/bindings/arm/marvell/armada-380.yaml
>
> Put in it
>
> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> %YAML 1.2
> ---
> $id: http://devicetree.org/schemas/arm/marvell/armada-380.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> title: Marvell Armada 380 SoC architecture
>
> maintainers:
>    - Andrew Lunn <andrew@lunn.ch>
>
> description:
>    Platforms based on Marvell Armada 380 SoC architecture.
>
> properties:
>    $nodename:
>      const: '/'
>    compatibnle:
>      oneOf:
>
>        - description: Marvell Armada 380 SoC based platforms
>          items:
>            - enum:
>                - phytec,pcm049   # Phytec OMAP 4460 SoM
>            - const: "marvell,armada380"
>
> additionalProperties: true
>
>
> But replace the phytex,pcm049 with the compatible for your board.
>
>      Andrew

Re: [PATCH 2/2] ARM: dts: mvebu: add device tree for IIJ SA-W2 appliance

[Andrew Lunn]

On Wed, Apr 12, 2023 at 02:21:27PM +0900, INAGAKI Hiroshi wrote:
> Hello Andrew Lunn,
> 
> thank you for your guidance, I'll do it.

You probably want to talk to Tony Dinh <mibodhi@gmail.com>.

https://lore.kernel.org/linux-arm-kernel/20230412025737.20280-2-mibodhi@gmail.com/T/

    Andrew