[GIT PULL 1/2] SoCFPGA DTS updates for v7.4

[GIT PULL 1/2] SoCFPGA DTS updates for v7.4

[Dinh Nguyen]

The following changes since commit cee9395acd8043be0644b25c34bfa86623f2b935:

  Linux 7.3-rc1 (2026-08-30 13:34:40 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v7.4

for you to fetch changes up to 1c4d22949a77d82505188bf36a4bcae0cbdf699e:

  arm64: dts: altera: Move all SoCFPGA files to dts/altera (2026-10-08 11:25:18 -0500)

----------------------------------------------------------------
SoCFPGA DTS updates for v7.4
dt-bindings:
- Add the SOCDK eMMC and TSN config2 boards based on Agilex5
- Update the interrupts spec for the Stratix10 Service Layer
dts:
- Agilex5
   - Add FPGA manager, region, and USB3.1 node in the base DTSI
   - Add SD/eMMC on the SoCDK OOBE card
   - Add the SoCDK eMMC daughter board
   - Add support for the debug daughter card
   - Add support for the  SoCDK TSN Config2 board
- Add SDM interrupts for Agilex and Stratix10
- Move all Altera SoCFPGA dts files to dts/altera

----------------------------------------------------------------
Adrian Ng Ho Yin (3):
      arm64: dts: intel: agilex5: add USB3.1 controller node
      arm64: dts: intel: agilex5: remove usb0 in Agilex5 SoCDK
      arm64: dts: agilex5: add support for debug daughter card

Dinh Nguyen (3):
      arm64: dts: socfpga: agilex5: add FPGA manager and region nodes
      arm64: dts: socfpga: agilex5: Add SoCDK TSN Config2 board
      arm64: dts: altera: Move all SoCFPGA files to dts/altera

Mahesh Rao (3):
      dt-bindings: firmware: Add interrupt specification for Intel Stratix 10 Service Layer
      dts: stratix10: Add support for SDM mailbox interrupt for Intel Stratix10 SoCFPGA
      dts: agilex: Add support for SDM mailbox interrupt for Intel Agilex SoCFPGA

Nazim Amirul (1):
      dt-bindings: arm: altera: Add Agilex5 SoCDK TSN Config2 board

Tanmay Kathpalia (4):
      arm64: dts: agilex5: add SD/eMMC host controller
      arm64: dts: agilex5: enable SD card on SOCDK OOBE card
      dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant
      arm64: dts: agilex5: add SOCDK eMMC daughter board

 Documentation/devicetree/bindings/arm/altera.yaml  |   2 +
 .../bindings/firmware/intel,stratix10-svc.yaml     |  10 ++
 arch/arm64/boot/dts/altera/Makefile                |  14 +-
 .../boot/dts/{intel => altera}/socfpga_agilex.dtsi |   2 +
 .../{intel => altera}/socfpga_agilex3_socdk.dts    |   0
 .../dts/{intel => altera}/socfpga_agilex5.dtsi     |  61 +++++++++
 .../boot/dts/altera/socfpga_agilex5_socdk.dts      | 146 +++++++++++++++++++++
 .../socfpga_agilex5_socdk_013b.dts                 |   0
 .../dts/altera/socfpga_agilex5_socdk_debug.dts     | 121 +++++++++++++++++
 .../boot/dts/altera/socfpga_agilex5_socdk_emmc.dts | 123 +++++++++++++++++
 .../socfpga_agilex5_socdk_modular.dts              |   0
 .../socfpga_agilex5_socdk_nand.dts                 |   0
 .../socfpga_agilex5_socdk_tsn_cfg2.dts}            |  40 ++++--
 .../dts/{intel => altera}/socfpga_agilex72.dtsi    |   0
 .../{intel => altera}/socfpga_agilex72_socdk.dts   |   0
 .../{intel => altera}/socfpga_agilex7m_socdk.dts   |   0
 .../dts/{intel => altera}/socfpga_agilex_n6000.dts |   0
 .../dts/{intel => altera}/socfpga_agilex_socdk.dts |   0
 .../socfpga_agilex_socdk_emmc.dts                  |   0
 .../socfpga_agilex_socdk_nand.dts                  |   0
 .../dts/{intel => altera}/socfpga_n5x_socdk.dts    |   0
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi  |   4 +
 arch/arm64/boot/dts/intel/Makefile                 |  12 --
 23 files changed, 510 insertions(+), 25 deletions(-)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex.dtsi (99%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex3_socdk.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex5.dtsi (93%)
 create mode 100644 arch/arm64/boot/dts/altera/socfpga_agilex5_socdk.dts
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex5_socdk_013b.dts (100%)
 create mode 100644 arch/arm64/boot/dts/altera/socfpga_agilex5_socdk_debug.dts
 create mode 100644 arch/arm64/boot/dts/altera/socfpga_agilex5_socdk_emmc.dts
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex5_socdk_modular.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex5_socdk_nand.dts (100%)
 rename arch/arm64/boot/dts/{intel/socfpga_agilex5_socdk.dts => altera/socfpga_agilex5_socdk_tsn_cfg2.dts} (73%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72_socdk.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex7m_socdk.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex_n6000.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex_socdk.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex_socdk_emmc.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex_socdk_nand.dts (100%)
 rename arch/arm64/boot/dts/{intel => altera}/socfpga_n5x_socdk.dts (100%)

Re: [GIT PULL 1/2] SoCFPGA DTS updates for v7.4

[patchwork-bot+linux-soc]

Hello:

This pull request was applied to soc/soc.git (for-next)
by Arnd Bergmann <arnd@arndb.de>:

On Thu,  8 Oct 2026 11:47:35 -0500 you wrote:
> The following changes since commit cee9395acd8043be0644b25c34bfa86623f2b935:
> 
>   Linux 7.3-rc1 (2026-08-30 13:34:40 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v7.4
> 
> [...]

Here is the summary with links:
  - [GIT,PULL,1/2] SoCFPGA DTS updates for v7.4
    (no matching commit)
  - [GIT,PULL,2/2] MAINTAINERS: socfpga: update for v7.4
    https://git.kernel.org/soc/soc/c/41eb191bcd8f

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [GIT PULL 1/2] SoCFPGA DTS updates for v7.4

[Dinh Nguyen]

Hi Arnd,

On 10/13/26 11:10, patchwork-bot+linux-soc@kernel.org wrote:
>    - [GIT,PULL,1/2] SoCFPGA DTS updates for v7.4
>      (no matching commit)

I see that the bot has pull in the 2/2 of PR, but something may have 
gone wrong with the PR 1/2?

I may have done something wrong? Can you please take a look?

Thanks,
Dinh

Re: [GIT PULL 1/2] SoCFPGA DTS updates for v7.4

[Arnd Bergmann]

On Wed, Oct 14, 2026, at 01:33, Dinh Nguyen wrote:
> Hi Arnd,
>
> On 10/13/26 11:10, patchwork-bot+linux-soc@kernel.org wrote:
>>    - [GIT,PULL,1/2] SoCFPGA DTS updates for v7.4
>>      (no matching commit)
>
> I see that the bot has pull in the 2/2 of PR, but something may have 
> gone wrong with the PR 1/2?
>
> I may have done something wrong? Can you please take a look?

We tend to pull in similar branches from different submitters together,
I only got through the defconfig, drivers and arm32 branches yesterday,
the DT branches should get there in the next few days. It's a bit late
because of lpc, but unless something shows up it should be there in
the next two days.

      Arnd