* [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
@ 2017-03-08 12:40 Chris Wilson
2017-03-23 15:00 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2017-03-08 12:40 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, Joonas Lahtinen, # v4 . 9
We can assume that if the device is asleep then all pending GTT writes
will have been posted, and so we can defer the flush from
i915_gem_object_flush_gtt_write_domain()
[ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
[ 1957.462582] RPM wakelock ref not held during HW access
[ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
[ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G U 4.11.0-rc1+ #464
[ 1957.462619] Hardware name: / , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
[ 1957.462630] Call Trace:
[ 1957.462646] dump_stack+0x4d/0x6f
[ 1957.462657] __warn+0xc1/0xe0
[ 1957.462667] warn_slowpath_fmt+0x4a/0x50
[ 1957.462709] fwtable_read32+0x123/0x150 [i915]
[ 1957.462750] i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
[ 1957.462791] i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
[ 1957.462831] i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
[ 1957.462843] drm_ioctl+0x1d7/0x440
[ 1957.462885] ? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
[ 1957.462896] ? pick_next_task_fair+0x436/0x440
[ 1957.462906] ? mntput+0x1f/0x30
[ 1957.462915] do_vfs_ioctl+0x8f/0x5c0
[ 1957.462925] ? __schedule+0x16f/0x5f0
[ 1957.462935] ? ____fput+0x9/0x10
[ 1957.462943] SyS_ioctl+0x3c/0x70
[ 1957.462952] entry_SYSCALL_64_fastpath+0x17/0x98
[ 1957.462961] RIP: 0033:0x7fc542179ca7
[ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
[ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
[ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
[ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
[ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.9
---
drivers/gpu/drm/i915/i915_gem.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d2e2dc19bc8f..9c35346fb469 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3209,8 +3209,12 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
* system agents we cannot reproduce this behaviour).
*/
wmb();
- if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv))
- POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+ if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
+ if (intel_runtime_pm_get_if_in_use(dev_priv)) {
+ POSTING_READ(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+ intel_runtime_pm_put(dev_priv);
+ }
+ }
intel_fb_obj_flush(obj, write_origin(obj, I915_GEM_DOMAIN_GTT));
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
2017-03-08 12:40 [PATCH] drm/i915: Check we have an wake device before flushing GTT writes Chris Wilson
@ 2017-03-23 15:00 ` Chris Wilson
2017-03-27 10:29 ` Joonas Lahtinen
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2017-03-23 15:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, Joonas Lahtinen, # v4 . 9
We can assume that if the device is asleep then all pending GTT writes
will have been posted, and so we can defer the flush from
i915_gem_object_flush_gtt_write_domain()
[ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
[ 1957.462582] RPM wakelock ref not held during HW access
[ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
[ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G U 4.11.0-rc1+ #464
[ 1957.462619] Hardware name: / , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
[ 1957.462630] Call Trace:
[ 1957.462646] dump_stack+0x4d/0x6f
[ 1957.462657] __warn+0xc1/0xe0
[ 1957.462667] warn_slowpath_fmt+0x4a/0x50
[ 1957.462709] fwtable_read32+0x123/0x150 [i915]
[ 1957.462750] i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
[ 1957.462791] i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
[ 1957.462831] i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
[ 1957.462843] drm_ioctl+0x1d7/0x440
[ 1957.462885] ? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
[ 1957.462896] ? pick_next_task_fair+0x436/0x440
[ 1957.462906] ? mntput+0x1f/0x30
[ 1957.462915] do_vfs_ioctl+0x8f/0x5c0
[ 1957.462925] ? __schedule+0x16f/0x5f0
[ 1957.462935] ? ____fput+0x9/0x10
[ 1957.462943] SyS_ioctl+0x3c/0x70
[ 1957.462952] entry_SYSCALL_64_fastpath+0x17/0x98
[ 1957.462961] RIP: 0033:0x7fc542179ca7
[ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
[ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
[ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
[ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
[ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
[ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.9
---
drivers/gpu/drm/i915/i915_gem.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4e66daa12bc9..39d5b849367e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3104,9 +3104,12 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
*/
wmb();
if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
- spin_lock_irq(&dev_priv->uncore.lock);
- POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
- spin_unlock_irq(&dev_priv->uncore.lock);
+ if (intel_runtime_pm_get_if_in_use(dev_priv)) {
+ spin_lock_irq(&dev_priv->uncore.lock);
+ POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+ spin_unlock_irq(&dev_priv->uncore.lock);
+ intel_runtime_pm_put(dev_priv);
+ }
}
intel_fb_obj_flush(obj, write_origin(obj, I915_GEM_DOMAIN_GTT));
--
2.11.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
2017-03-23 15:00 ` Chris Wilson
@ 2017-03-27 10:29 ` Joonas Lahtinen
2017-03-27 12:25 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Joonas Lahtinen @ 2017-03-27 10:29 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: # v4 . 9
On to, 2017-03-23 at 15:00 +0000, Chris Wilson wrote:
> We can assume that if the device is asleep then all pending GTT writes
> will have been posted, and so we can defer the flush from
> i915_gem_object_flush_gtt_write_domain()
>
> [ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
> [ 1957.462582] RPM wakelock ref not held during HW access
> [ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
> [ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G U 4.11.0-rc1+ #464
> [ 1957.462619] Hardware name: / , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
> [ 1957.462630] Call Trace:
> [ 1957.462646] dump_stack+0x4d/0x6f
> [ 1957.462657] __warn+0xc1/0xe0
> [ 1957.462667] warn_slowpath_fmt+0x4a/0x50
> [ 1957.462709] fwtable_read32+0x123/0x150 [i915]
> [ 1957.462750] i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
> [ 1957.462791] i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
> [ 1957.462831] i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
> [ 1957.462843] drm_ioctl+0x1d7/0x440
> [ 1957.462885] ? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
> [ 1957.462896] ? pick_next_task_fair+0x436/0x440
> [ 1957.462906] ? mntput+0x1f/0x30
> [ 1957.462915] do_vfs_ioctl+0x8f/0x5c0
> [ 1957.462925] ? __schedule+0x16f/0x5f0
> [ 1957.462935] ? ____fput+0x9/0x10
> [ 1957.462943] SyS_ioctl+0x3c/0x70
> [ 1957.462952] entry_SYSCALL_64_fastpath+0x17/0x98
> [ 1957.462961] RIP: 0033:0x7fc542179ca7
> [ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
> [ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
> [ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
> [ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
> [ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
> [ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
>
> Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: <stable@vger.kernel.org> # v4.9
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Check we have an wake device before flushing GTT writes
2017-03-27 10:29 ` Joonas Lahtinen
@ 2017-03-27 12:25 ` Chris Wilson
0 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2017-03-27 12:25 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: intel-gfx, # v4 . 9
On Mon, Mar 27, 2017 at 01:29:18PM +0300, Joonas Lahtinen wrote:
> On to, 2017-03-23 at 15:00 +0000, Chris Wilson wrote:
> > We can assume that if the device is asleep then all pending GTT writes
> > will have been posted, and so we can defer the flush from
> > i915_gem_object_flush_gtt_write_domain()
> >
> > [ 1957.462568] WARNING: CPU: 0 PID: 6132 at drivers/gpu/drm/i915/intel_drv.h:1742 fwtable_read32+0x123/0x150 [i915]
> > [ 1957.462582] RPM wakelock ref not held during HW access
> > [ 1957.462583] Modules linked in: i915 intel_gtt drm_kms_helper prime_numbers
> > [ 1957.462607] CPU: 0 PID: 6132 Comm: gem_concurrent_ Tainted: G�����U����������4.11.0-rc1+ #464
> > [ 1957.462619] Hardware name:������������������/��������, BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
> > [ 1957.462630] Call Trace:
> > [ 1957.462646]��dump_stack+0x4d/0x6f
> > [ 1957.462657]��__warn+0xc1/0xe0
> > [ 1957.462667]��warn_slowpath_fmt+0x4a/0x50
> > [ 1957.462709]��fwtable_read32+0x123/0x150 [i915]
> > [ 1957.462750]��i915_gem_object_flush_gtt_write_domain+0x43/0x70 [i915]
> > [ 1957.462791]��i915_gem_object_set_to_cpu_domain+0x46/0xa0 [i915]
> > [ 1957.462831]��i915_gem_set_domain_ioctl+0x15d/0x220 [i915]
> > [ 1957.462843]��drm_ioctl+0x1d7/0x440
> > [ 1957.462885]��? i915_gem_obj_prepare_shmem_write+0x1d0/0x1d0 [i915]
> > [ 1957.462896]��? pick_next_task_fair+0x436/0x440
> > [ 1957.462906]��? mntput+0x1f/0x30
> > [ 1957.462915]��do_vfs_ioctl+0x8f/0x5c0
> > [ 1957.462925]��? __schedule+0x16f/0x5f0
> > [ 1957.462935]��? ____fput+0x9/0x10
> > [ 1957.462943]��SyS_ioctl+0x3c/0x70
> > [ 1957.462952]��entry_SYSCALL_64_fastpath+0x17/0x98
> > [ 1957.462961] RIP: 0033:0x7fc542179ca7
> > [ 1957.462968] RSP: 002b:00007ffeef12ff98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
> > [ 1957.462982] RAX: ffffffffffffffda RBX: 00007ffeef1301d0 RCX: 00007fc542179ca7
> > [ 1957.462990] RDX: 00007ffeef12ffd0 RSI: 00000000400c645f RDI: 0000000000000003
> > [ 1957.462999] RBP: 0000000000000003 R08: 000055f433bc7c40 R09: 000000000000002c
> > [ 1957.463006] R10: 0000000000000073 R11: 0000000000000246 R12: 0000000000000018
> > [ 1957.463015] R13: 000055f432c89d20 R14: 000055f432c87690 R15: 0000000000000000
> >
> > Fixes: 3b5724d702ef ("drm/i915: Wait for writes through the GTT to land before reading back")
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: <stable@vger.kernel.org> # v4.9
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Ta, one less warning (not yet seen by CI, come on CI stop slacking)!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-03-27 12:25 UTC | newest]
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2017-03-08 12:40 [PATCH] drm/i915: Check we have an wake device before flushing GTT writes Chris Wilson
2017-03-23 15:00 ` Chris Wilson
2017-03-27 10:29 ` Joonas Lahtinen
2017-03-27 12:25 ` Chris Wilson
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