request for 4.14-stable: c5ba5b24657e ("drm/i915: Apply the GTT write flush for all !llc machines")

request for 4.14-stable: c5ba5b24657e ("drm/i915: Apply the GTT write flush for all !llc machines")

[Sudip Mukherjee]

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Hi Greg,

This was not marked for stable but seems it should be in stable.
Please apply to your queue of 4.14-stable.

--
Regards
Sudip

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>From 0bf97799b9b319bc8de89afbb198887dacb2d8fe Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu, 7 Sep 2017 19:45:20 +0100
Subject: [PATCH] drm/i915: Apply the GTT write flush for all !llc machines
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

commit c5ba5b24657e473b1c64b0a614b168a635a2c935 upstream

We also see the delayed GTT write issue on i915g/i915gm, so let's
presume that it is a universal problem for all !llc machines, and that we
just haven't yet noticed on g33, gen4 and gen5 machines.

v2: Use a register that exists on all platforms

Testcase: igt/gem_mmap_gtt/coherency # i915gm
References: https://bugs.freedesktop.org/show_bug.cgi?id=102577
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrj�l� <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907184520.5032-1-chris@chris-wilson.co.uk
Reviewed-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 90359c7954c8..3c0ce3ee0710 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -687,10 +687,10 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
 
 	switch (obj->base.write_domain) {
 	case I915_GEM_DOMAIN_GTT:
-		if (INTEL_GEN(dev_priv) >= 6 && !HAS_LLC(dev_priv)) {
+		if (!HAS_LLC(dev_priv)) {
 			intel_runtime_pm_get(dev_priv);
 			spin_lock_irq(&dev_priv->uncore.lock);
-			POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+			POSTING_READ_FW(RING_HEAD(dev_priv->engine[RCS]->mmio_base));
 			spin_unlock_irq(&dev_priv->uncore.lock);
 			intel_runtime_pm_put(dev_priv);
 		}
-- 
2.11.0

Re: request for 4.14-stable: c5ba5b24657e ("drm/i915: Apply the GTT write flush for all !llc machines")

[Greg Kroah-Hartman]

On Thu, Sep 20, 2018 at 08:29:28PM +0100, Sudip Mukherjee wrote:
> Hi Greg,
> 
> This was not marked for stable but seems it should be in stable.
> Please apply to your queue of 4.14-stable.

Now applied, thanks.

greg k-h