* [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG
[not found] <20250812090256.757273-2-rkrcmar@ventanamicro.com>
@ 2025-08-12 9:02 ` Radim Krčmář
2025-08-16 1:27 ` Pu Lehui
2025-08-12 9:02 ` [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id Radim Krčmář
1 sibling, 1 reply; 4+ messages in thread
From: Radim Krčmář @ 2025-08-12 9:02 UTC (permalink / raw)
To: bpf
Cc: stable, Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, KP Singh, Stanislav Fomichev, Hao Luo, Jiri Olsa,
Björn Töpel, Pu Lehui, Puranjay Mohan, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Kumar Kartikeya Dwivedi, linux-riscv, linux-kernel
emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.
Fixes: 19c56d4e5be1 ("riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs")
Cc: <stable@vger.kernel.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
arch/riscv/net/bpf_jit_comp64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index 10e01ff06312..6e1554d89681 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -1356,7 +1356,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
emit_mv(rd, rs, ctx);
#ifdef CONFIG_SMP
/* Load current CPU number in T1 */
- emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
+ emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
RV_REG_TP, ctx);
/* Load address of __per_cpu_offset array in T2 */
emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
--
2.50.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id
[not found] <20250812090256.757273-2-rkrcmar@ventanamicro.com>
2025-08-12 9:02 ` [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG Radim Krčmář
@ 2025-08-12 9:02 ` Radim Krčmář
2025-08-16 1:30 ` Pu Lehui
1 sibling, 1 reply; 4+ messages in thread
From: Radim Krčmář @ 2025-08-12 9:02 UTC (permalink / raw)
To: bpf
Cc: stable, Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, KP Singh, Stanislav Fomichev, Hao Luo, Jiri Olsa,
Björn Töpel, Pu Lehui, Puranjay Mohan, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Kumar Kartikeya Dwivedi, linux-riscv, linux-kernel
emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.
Fixes: 2ddec2c80b44 ("riscv, bpf: inline bpf_get_smp_processor_id()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
arch/riscv/net/bpf_jit_comp64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index 6e1554d89681..9883a55d61b5 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -1763,7 +1763,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
*/
if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
/* Load current CPU number in R0 */
- emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
+ emit_lw(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
RV_REG_TP, ctx);
break;
}
--
2.50.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG
2025-08-12 9:02 ` [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG Radim Krčmář
@ 2025-08-16 1:27 ` Pu Lehui
0 siblings, 0 replies; 4+ messages in thread
From: Pu Lehui @ 2025-08-16 1:27 UTC (permalink / raw)
To: Radim Krčmář, bpf
Cc: stable, Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, KP Singh, Stanislav Fomichev, Hao Luo, Jiri Olsa,
Björn Töpel, Puranjay Mohan, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Kumar Kartikeya Dwivedi, linux-riscv, linux-kernel
On 2025/8/12 17:02, Radim Krčmář wrote:
> emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
> The struct currently has a hole after cpu, so little endian accesses
> seemed fine.
>
> Fixes: 19c56d4e5be1 ("riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
> ---
> arch/riscv/net/bpf_jit_comp64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
> index 10e01ff06312..6e1554d89681 100644
> --- a/arch/riscv/net/bpf_jit_comp64.c
> +++ b/arch/riscv/net/bpf_jit_comp64.c
> @@ -1356,7 +1356,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
> emit_mv(rd, rs, ctx);
> #ifdef CONFIG_SMP
> /* Load current CPU number in T1 */
> - emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
> + emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
> RV_REG_TP, ctx);
> /* Load address of __per_cpu_offset array in T2 */
> emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
Reviewed-by: Pu Lehui <pulehui@huawei.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id
2025-08-12 9:02 ` [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id Radim Krčmář
@ 2025-08-16 1:30 ` Pu Lehui
0 siblings, 0 replies; 4+ messages in thread
From: Pu Lehui @ 2025-08-16 1:30 UTC (permalink / raw)
To: Radim Krčmář, bpf
Cc: stable, Alexei Starovoitov, Daniel Borkmann, Andrii Nakryiko,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, KP Singh, Stanislav Fomichev, Hao Luo, Jiri Olsa,
Björn Töpel, Puranjay Mohan, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Kumar Kartikeya Dwivedi, linux-riscv, linux-kernel
On 2025/8/12 17:02, Radim Krčmář wrote:
> emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
> The struct currently has a hole after cpu, so little endian accesses
> seemed fine.
>
> Fixes: 2ddec2c80b44 ("riscv, bpf: inline bpf_get_smp_processor_id()")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
> ---
> arch/riscv/net/bpf_jit_comp64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
> index 6e1554d89681..9883a55d61b5 100644
> --- a/arch/riscv/net/bpf_jit_comp64.c
> +++ b/arch/riscv/net/bpf_jit_comp64.c
> @@ -1763,7 +1763,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
> */
> if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
> /* Load current CPU number in R0 */
> - emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
> + emit_lw(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
> RV_REG_TP, ctx);
> break;
> }
Reviewed-by: Pu Lehui <pulehui@huawei.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
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[not found] <20250812090256.757273-2-rkrcmar@ventanamicro.com>
2025-08-12 9:02 ` [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG Radim Krčmář
2025-08-16 1:27 ` Pu Lehui
2025-08-12 9:02 ` [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id Radim Krčmář
2025-08-16 1:30 ` Pu Lehui
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