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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Sasha Levin <sashal@kernel.org>,
	stable@vger.kernel.org, jianqi.ren.cn@windriver.com
Subject: Re: [PATCH 6.1.y] spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
Date: Thu, 9 Oct 2025 15:09:25 +0200	[thread overview]
Message-ID: <2025100934-tweet-rotten-d617@gregkh> (raw)
In-Reply-To: <CABMQnV+mjLbn62AXSp4QPG1rBY+4vTq-yFKJM+rT=YKwVwxVsw@mail.gmail.com>

On Thu, Oct 09, 2025 at 09:35:21PM +0900, Nobuhiro Iwamatsu wrote:
> HIiall,
> 
> Why isn't this patch being applied?

Perhaps because I had to drop ALL windriver submissions due to them not
working at all.  This was in that batch.  See the mailing list archives
for details.

If you think this needs to be applied, please test it yourself and
submit it with your signed-off-by please.

thanks,

greg k-h

      reply	other threads:[~2025-10-09 13:09 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  1:52 [PATCH 6.1.y] spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer jianqi.ren.cn
2025-05-12 21:52 ` Sasha Levin
2025-10-09 12:35   ` Nobuhiro Iwamatsu
2025-10-09 13:09     ` Greg Kroah-Hartman [this message]

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