[PATCH 1/2] drm/i915/psr: Block DC states on vblank enable when Panel Replay supported

[PATCH 1/2] drm/i915/psr: Block DC states on vblank enable when Panel Replay supported

[Jouni Högander]

Currently we are blocking DC states only when Panel Replay is enabled on
vblank enable. It may happen that Panel Replay is getting enabled when
vblank is already enabled. Fix this by blocking DC states always if Panel
Replay is supported.

While at it take care of possible dual eDP case by looping all encoders
supporting PSR.

Fixes: 0c427ac78a1d ("drm/i915/psr: Add interface to notify PSR of vblank enable/disable")
Cc: <stable@vger.kernel.org> # v6.16+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9958230a3dd9..657b1614cd65 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4141,32 +4141,33 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
 					    bool enable)
 {
 	struct intel_encoder *encoder;
+	bool block_dc_states = false;
 
 	for_each_intel_encoder_with_psr(display->drm, encoder) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		mutex_lock(&intel_dp->psr.lock);
-		if (intel_dp->psr.panel_replay_enabled) {
-			mutex_unlock(&intel_dp->psr.lock);
-			break;
-		}
+		if (CAN_PANEL_REPLAY(intel_dp))
+			block_dc_states = true;
 
-		if (intel_dp->psr.enabled && intel_dp->psr.pkg_c_latency_used)
+		if (intel_dp->psr.enabled && !intel_dp->psr.panel_replay_enabled &&
+		    intel_dp->psr.pkg_c_latency_used)
 			intel_psr_apply_underrun_on_idle_wa_locked(intel_dp);
 
 		mutex_unlock(&intel_dp->psr.lock);
-		return;
 	}
 
 	/*
 	 * NOTE: intel_display_power_set_target_dc_state is used
-	 * only by PSR * code for DC3CO handling. DC3CO target
+	 * only by PSR code for DC3CO handling. DC3CO target
 	 * state is currently disabled in * PSR code. If DC3CO
 	 * is taken into use we need take that into account here
 	 * as well.
 	 */
-	intel_display_power_set_target_dc_state(display, enable ? DC_STATE_DISABLE :
-						DC_STATE_EN_UPTO_DC6);
+	if (block_dc_states)
+		intel_display_power_set_target_dc_state(display, enable ?
+							DC_STATE_DISABLE :
+							DC_STATE_EN_UPTO_DC6);
 }
 
 static void
-- 
2.43.0

[PATCH 2/2] drm/i915/psr: Use DC_OFF wake reference to block DC6 on vblank enable

[Jouni Högander]

We are observing following warnings:

*ERROR* power well DC_off state mismatch (refcount 0/enabled 1)

gen9_dc_off_power_well_enabled is concidering target state DC_STATE_DISABLE
as DC_OFF power well being enabled. Fix this by using wakeref for the
purpose.

Fixes: aa451abcffb5 ("drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay")
Cc: <stable@vger.kernel.org> # v6.13+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_psr.c      | 24 +++++++------------
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 26e59110e743..e2861476b215 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1789,6 +1789,8 @@ struct intel_psr {
 	u8 active_non_psr_pipes;
 
 	const char *no_psr_reason;
+
+	struct ref_tracker *vblank_wakeref;
 };
 
 struct intel_dp {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 657b1614cd65..a8f02f928bd8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4141,14 +4141,20 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
 					    bool enable)
 {
 	struct intel_encoder *encoder;
-	bool block_dc_states = false;
 
 	for_each_intel_encoder_with_psr(display->drm, encoder) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		mutex_lock(&intel_dp->psr.lock);
-		if (CAN_PANEL_REPLAY(intel_dp))
-			block_dc_states = true;
+		if (CAN_PANEL_REPLAY(intel_dp)) {
+			if (enable)
+				intel_dp->psr.vblank_wakeref =
+					intel_display_power_get(display,
+								POWER_DOMAIN_DC_OFF);
+			else
+				intel_display_power_put(display, POWER_DOMAIN_DC_OFF,
+							intel_dp->psr.vblank_wakeref);
+		}
 
 		if (intel_dp->psr.enabled && !intel_dp->psr.panel_replay_enabled &&
 		    intel_dp->psr.pkg_c_latency_used)
@@ -4156,18 +4162,6 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
 
 		mutex_unlock(&intel_dp->psr.lock);
 	}
-
-	/*
-	 * NOTE: intel_display_power_set_target_dc_state is used
-	 * only by PSR code for DC3CO handling. DC3CO target
-	 * state is currently disabled in * PSR code. If DC3CO
-	 * is taken into use we need take that into account here
-	 * as well.
-	 */
-	if (block_dc_states)
-		intel_display_power_set_target_dc_state(display, enable ?
-							DC_STATE_DISABLE :
-							DC_STATE_EN_UPTO_DC6);
 }
 
 static void
-- 
2.43.0

Re: [PATCH 1/2] drm/i915/psr: Block DC states on vblank enable when Panel Replay supported

[Michał Grzelak]

[-- Attachment #1: Type: text/plain, Size: 2594 bytes --]

On Mon, 11 May 2026, Jouni Högander wrote:
> Currently we are blocking DC states only when Panel Replay is enabled on
> vblank enable. It may happen that Panel Replay is getting enabled when
> vblank is already enabled. Fix this by blocking DC states always if Panel
> Replay is supported.
>
> While at it take care of possible dual eDP case by looping all encoders
> supporting PSR.
>
> Fixes: 0c427ac78a1d ("drm/i915/psr: Add interface to notify PSR of vblank enable/disable")
> Cc: <stable@vger.kernel.org> # v6.16+
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 19 ++++++++++---------
> 1 file changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 9958230a3dd9..657b1614cd65 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -4141,32 +4141,33 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
> 					    bool enable)
> {
> 	struct intel_encoder *encoder;
> +	bool block_dc_states = false;
>
> 	for_each_intel_encoder_with_psr(display->drm, encoder) {
> 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> 		mutex_lock(&intel_dp->psr.lock);
> -		if (intel_dp->psr.panel_replay_enabled) {
> -			mutex_unlock(&intel_dp->psr.lock);
> -			break;
> -		}
> +		if (CAN_PANEL_REPLAY(intel_dp))
> +			block_dc_states = true;
>
> -		if (intel_dp->psr.enabled && intel_dp->psr.pkg_c_latency_used)
> +		if (intel_dp->psr.enabled && !intel_dp->psr.panel_replay_enabled &&
> +		    intel_dp->psr.pkg_c_latency_used)
> 			intel_psr_apply_underrun_on_idle_wa_locked(intel_dp);
>
> 		mutex_unlock(&intel_dp->psr.lock);
> -		return;
> 	}
>
> 	/*
> 	 * NOTE: intel_display_power_set_target_dc_state is used
> -	 * only by PSR * code for DC3CO handling. DC3CO target
> +	 * only by PSR code for DC3CO handling. DC3CO target
> 	 * state is currently disabled in * PSR code. If DC3CO

Here '*' could be dropped as well. Anyways it doesn't make much
difference since next patch will remove the whole block.

Reviewed-by: Michał Grzelak <michal.grzelak@intel.co>

BR,
Michał

> 	 * is taken into use we need take that into account here
> 	 * as well.
> 	 */
> -	intel_display_power_set_target_dc_state(display, enable ? DC_STATE_DISABLE :
> -						DC_STATE_EN_UPTO_DC6);
> +	if (block_dc_states)
> +		intel_display_power_set_target_dc_state(display, enable ?
> +							DC_STATE_DISABLE :
> +							DC_STATE_EN_UPTO_DC6);
> }
>
> static void
> -- 
> 2.43.0
>
>

Re: [PATCH 2/2] drm/i915/psr: Use DC_OFF wake reference to block DC6 on vblank enable

[Michał Grzelak]

[-- Attachment #1: Type: text/plain, Size: 2925 bytes --]

On Mon, 11 May 2026, Jouni Högander wrote:
> We are observing following warnings:
>
> *ERROR* power well DC_off state mismatch (refcount 0/enabled 1)
>
> gen9_dc_off_power_well_enabled is concidering target state DC_STATE_DISABLE

s/concidering/considering/

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

BR,
Michał

> as DC_OFF power well being enabled. Fix this by using wakeref for the
> purpose.
>
> Fixes: aa451abcffb5 ("drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay")
> Cc: <stable@vger.kernel.org> # v6.13+
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h    |  2 ++
> drivers/gpu/drm/i915/display/intel_psr.c      | 24 +++++++------------
> 2 files changed, 11 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 26e59110e743..e2861476b215 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1789,6 +1789,8 @@ struct intel_psr {
> 	u8 active_non_psr_pipes;
>
> 	const char *no_psr_reason;
> +
> +	struct ref_tracker *vblank_wakeref;
> };
>
> struct intel_dp {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 657b1614cd65..a8f02f928bd8 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -4141,14 +4141,20 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
> 					    bool enable)
> {
> 	struct intel_encoder *encoder;
> -	bool block_dc_states = false;
>
> 	for_each_intel_encoder_with_psr(display->drm, encoder) {
> 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> 		mutex_lock(&intel_dp->psr.lock);
> -		if (CAN_PANEL_REPLAY(intel_dp))
> -			block_dc_states = true;
> +		if (CAN_PANEL_REPLAY(intel_dp)) {
> +			if (enable)
> +				intel_dp->psr.vblank_wakeref =
> +					intel_display_power_get(display,
> +								POWER_DOMAIN_DC_OFF);
> +			else
> +				intel_display_power_put(display, POWER_DOMAIN_DC_OFF,
> +							intel_dp->psr.vblank_wakeref);
> +		}
>
> 		if (intel_dp->psr.enabled && !intel_dp->psr.panel_replay_enabled &&
> 		    intel_dp->psr.pkg_c_latency_used)
> @@ -4156,18 +4162,6 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
>
> 		mutex_unlock(&intel_dp->psr.lock);
> 	}
> -
> -	/*
> -	 * NOTE: intel_display_power_set_target_dc_state is used
> -	 * only by PSR code for DC3CO handling. DC3CO target
> -	 * state is currently disabled in * PSR code. If DC3CO
> -	 * is taken into use we need take that into account here
> -	 * as well.
> -	 */
> -	if (block_dc_states)
> -		intel_display_power_set_target_dc_state(display, enable ?
> -							DC_STATE_DISABLE :
> -							DC_STATE_EN_UPTO_DC6);
> }
>
> static void
> -- 
> 2.43.0
>
>