[PATCH 3/4] ASoC: fsl_easrc: Use div64_u64 for 64-by-64 division

[PATCH 3/4] ASoC: fsl_easrc: Use div64_u64 for 64-by-64 division

[wangdich9700]

From: wangdicheng <wangdicheng@kylinos.cn>

Fix a compiler warning about do_div() truncating a 64-bit divisor:

sound/soc/fsl/fsl_easrc.c:2061:2-8: WARNING: do_div() does a 64-by-32 division, please consider using div64_u64 instead.

do_div() truncates the divisor to 32 bits, but val1 is u64 and may
exceed the 32-bit range after (u64)in_rate << frac_bits >> 12 with
frac_bits up to 39. Use div64_u64() to perform a proper 64-by-64
division and avoid potential truncation.

Fixes: 955ac624058f ("ASoC: fsl_easrc: Add EASRC ASoC CPU DAI drivers")
Cc: <stable@vger.kernel.org>
Signed-off-by: wangdicheng <wangdicheng@kylinos.cn>
---
 sound/soc/fsl/fsl_easrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_easrc.c b/sound/soc/fsl/fsl_easrc.c
index 114a6c0b6b73..d0bbe9f71e36 100644
--- a/sound/soc/fsl/fsl_easrc.c
+++ b/sound/soc/fsl/fsl_easrc.c
@@ -2058,7 +2058,7 @@ static int fsl_easrc_m2m_calc_out_len(struct fsl_asrc_pair *pair, int input_buff
 		/* right shift 12 bit to make ratio in 32bit space */
 		val2 = (u64)in_samples << (frac_bits - 12);
 		val1 = val1 >> 12;
-		do_div(val2, val1);
+		val2 = div64_u64(val2, val1);
 		out_samples = val2;
 
 		out_length = out_samples * out_width * channels;
-- 
2.25.1

[PATCH 4/4] ASoC: tlv320aic32x4: Use div64_ul for division by unsigned long

[wangdich9700]

From: wangdicheng <wangdicheng@kylinos.cn>

Fix a compiler warning about do_div() truncating an unsigned long divisor:

sound/soc/codecs/tlv320aic32x4-clk.c:169:1-7: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead.

do_div() truncates the divisor to 32 bits, but parent_rate is unsigned
long which is 64-bit on 64-bit platforms. Use div64_ul() to correctly
handle the unsigned long divisor across all architectures.

Fixes: 514b044cba66 ("ASoC: tlv320aic32x4: Model PLL in CCF")
Cc: <stable@vger.kernel.org>
Signed-off-by: wangdicheng <wangdicheng@kylinos.cn>
---
 sound/soc/codecs/tlv320aic32x4-clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c
index 5c0a76a4a106..9359492051ad 100644
--- a/sound/soc/codecs/tlv320aic32x4-clk.c
+++ b/sound/soc/codecs/tlv320aic32x4-clk.c
@@ -166,7 +166,7 @@ static int clk_aic32x4_pll_calc_muldiv(struct clk_aic32x4_pll_muldiv *settings,
 	 * math in the kernel.
 	 */
 	multiplier = (u64) rate * settings->p * 10000;
-	do_div(multiplier, parent_rate);
+	multiplier = div64_ul(multiplier, parent_rate);
 
 	/*
 	 * J can't be over 64, so R can scale this.
-- 
2.25.1

Re: [PATCH 3/4] ASoC: fsl_easrc: Use div64_u64 for 64-by-64 division

[David Laight]

On Fri, 17 Jul 2026 15:02:51 +0800
wangdich9700@163.com wrote:

> From: wangdicheng <wangdicheng@kylinos.cn>
> 
> Fix a compiler warning about do_div() truncating a 64-bit divisor:

It's not a compiler warning.

> 
> sound/soc/fsl/fsl_easrc.c:2061:2-8: WARNING: do_div() does a 64-by-32 division, please consider using div64_u64 instead.
> 
> do_div() truncates the divisor to 32 bits, but val1 is u64 and may
> exceed the 32-bit range after (u64)in_rate << frac_bits >> 12 with
> frac_bits up to 39. Use div64_u64() to perform a proper 64-by-64
> division and avoid potential truncation.
> 
> Fixes: 955ac624058f ("ASoC: fsl_easrc: Add EASRC ASoC CPU DAI drivers")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: wangdicheng <wangdicheng@kylinos.cn>
> ---
>  sound/soc/fsl/fsl_easrc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sound/soc/fsl/fsl_easrc.c b/sound/soc/fsl/fsl_easrc.c
> index 114a6c0b6b73..d0bbe9f71e36 100644
> --- a/sound/soc/fsl/fsl_easrc.c
> +++ b/sound/soc/fsl/fsl_easrc.c
> @@ -2058,7 +2058,7 @@ static int fsl_easrc_m2m_calc_out_len(struct fsl_asrc_pair *pair, int input_buff
>  		/* right shift 12 bit to make ratio in 32bit space */
>  		val2 = (u64)in_samples << (frac_bits - 12);
>  		val1 = val1 >> 12;
> -		do_div(val2, val1);
> +		val2 = div64_u64(val2, val1);

Are you sure the domain of val1 can exceed 32 bits?
There is a comment in the patch block that implies otherwise.

	David

>  		out_samples = val2;
>  
>  		out_length = out_samples * out_width * channels;

Re: [PATCH 4/4] ASoC: tlv320aic32x4: Use div64_ul for division by unsigned long

[David Laight]

On Fri, 17 Jul 2026 15:02:52 +0800
wangdich9700@163.com wrote:

> From: wangdicheng <wangdicheng@kylinos.cn>
> 
> Fix a compiler warning about do_div() truncating an unsigned long divisor:
> 
> sound/soc/codecs/tlv320aic32x4-clk.c:169:1-7: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead.
> 
> do_div() truncates the divisor to 32 bits, but parent_rate is unsigned
> long which is 64-bit on 64-bit platforms. Use div64_ul() to correctly
> handle the unsigned long divisor across all architectures.

And the code has to process the same values on 32bit.
So the value must fit in 32bits and do_div() is fine.
Doesn't 'fix' anything.

	David

> 
> Fixes: 514b044cba66 ("ASoC: tlv320aic32x4: Model PLL in CCF")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: wangdicheng <wangdicheng@kylinos.cn>
> ---
>  sound/soc/codecs/tlv320aic32x4-clk.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c
> index 5c0a76a4a106..9359492051ad 100644
> --- a/sound/soc/codecs/tlv320aic32x4-clk.c
> +++ b/sound/soc/codecs/tlv320aic32x4-clk.c
> @@ -166,7 +166,7 @@ static int clk_aic32x4_pll_calc_muldiv(struct clk_aic32x4_pll_muldiv *settings,
>  	 * math in the kernel.
>  	 */
>  	multiplier = (u64) rate * settings->p * 10000;
> -	do_div(multiplier, parent_rate);
> +	multiplier = div64_ul(multiplier, parent_rate);
>  
>  	/*
>  	 * J can't be over 64, so R can scale this.