* FAILED: patch "[PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM" failed to apply to 6.18-stable tree
@ 2026-09-16 9:21 gregkh
2026-09-16 18:36 ` [PATCH 6.18.y 1/3] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer Sasha Levin
0 siblings, 1 reply; 7+ messages in thread
From: gregkh @ 2026-09-16 9:21 UTC (permalink / raw)
To: Arunpravin.PaneerSelvam, alexander.deucher, christian.koenig,
timur.kristof
Cc: stable
The patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x 87ceb8cba73d0b3c4025ff42495bccd8164acaed
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<stable@vger.kernel.org>' --in-reply-to '2026091636-creole-glorified-e7b6@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 87ceb8cba73d0b3c4025ff42495bccd8164acaed Mon Sep 17 00:00:00 2001
From: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Date: Wed, 2 Sep 2026 18:33:48 +0530
Subject: [PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Clear-on-release only runs on VRAM, which amdgpu_ttm_map_buffer() reaches
via its direct MC address without programming a GART window, yet the wipe
still forces a VMID 0 flush. On GFX11 (e.g. Navi33) that spurious SDMA
flush can wedge the engine; only flush when a GART window is actually used.
v2: Let amdgpu_ttm_map_buffer() return whether the VMID 0 flush is needed,
and drive the clear and copy paths from that. (Christian)
v3: Make the vm_needs_flush output parameter mandatory instead of
allowing NULL. (Christian)
Fixes: a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality")
Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5413
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit a306e406e570b74318ff7d80e5b07b540ca1d3a9)
Cc: stable@vger.kernel.org
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 05abf4c31dce..016957cac1f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -191,6 +191,8 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_ttm_buffer_entit
* @tmz: if we should setup a TMZ enabled mapping
* @size: in number of bytes to map, out number of bytes mapped
* @addr: resulting address inside the MC address space
+ * @vm_needs_flush: out, set true if a GART window was programmed (VMID 0 flush
+ * needed) or false for a direct address
*
* Setup one of the GART windows to access a specific piece of memory or return
* the physical address for local memory.
@@ -200,7 +202,8 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
struct ttm_resource *mem,
struct amdgpu_res_cursor *mm_cur,
unsigned int window,
- bool tmz, uint64_t *size, uint64_t *addr)
+ bool tmz, uint64_t *size, uint64_t *addr,
+ bool *vm_needs_flush)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
unsigned int offset, num_pages, num_dw, num_bytes;
@@ -221,9 +224,12 @@ static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
if (!tmz && mem->start != AMDGPU_BO_INVALID_OFFSET) {
*addr = amdgpu_ttm_domain_start(adev, mem->mem_type) +
mm_cur->start;
+ *vm_needs_flush = false;
return 0;
}
+ /* A GART window is programmed below, so its VMID 0 TLB needs a flush */
+ *vm_needs_flush = true;
/*
* If start begins at an offset inside the page, then adjust the size
@@ -324,6 +330,7 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
while (src_mm.remaining) {
uint64_t from, to, cur_size, tiling_flags;
uint32_t num_type, data_format, max_com, write_compress_disable;
+ bool src_vm_flush, dst_vm_flush;
struct dma_fence *next;
/* Never copy more than 256MiB at once to avoid a timeout */
@@ -331,12 +338,12 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
/* Map src to window 0 and dst to window 1. */
r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm,
- 0, tmz, &cur_size, &from);
+ 0, tmz, &cur_size, &from, &src_vm_flush);
if (r)
goto error;
r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm,
- 1, tmz, &cur_size, &to);
+ 1, tmz, &cur_size, &to, &dst_vm_flush);
if (r)
goto error;
@@ -364,7 +371,7 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
}
r = amdgpu_copy_buffer(adev, entity, from, to, cur_size, resv,
- &next, true, copy_flags);
+ &next, src_vm_flush || dst_vm_flush, copy_flags);
if (r)
goto error;
@@ -2624,6 +2631,7 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity,
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct dma_fence *fence = NULL;
struct amdgpu_res_cursor dst;
+ bool vm_needs_flush = false;
int r;
if (!entity)
@@ -2645,13 +2653,13 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity,
cur_size = min(dst.size, 256ULL << 20);
r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &dst,
- 0, false, &cur_size, &to);
+ 0, false, &cur_size, &to, &vm_needs_flush);
if (r)
goto error;
r = amdgpu_ttm_fill_mem(adev, entity,
0, to, cur_size, resv,
- &next, true, k_job_id);
+ &next, vm_needs_flush, k_job_id);
if (r)
goto error;
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 6.18.y 1/3] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer 2026-09-16 9:21 FAILED: patch "[PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM" failed to apply to 6.18-stable tree gregkh @ 2026-09-16 18:36 ` Sasha Levin 2026-09-16 18:36 ` [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer Sasha Levin 2026-09-16 18:36 ` [PATCH 6.18.y 3/3] drm/amdgpu: skip the VMID 0 flush for VRAM Sasha Levin 0 siblings, 2 replies; 7+ messages in thread From: Sasha Levin @ 2026-09-16 18:36 UTC (permalink / raw) To: stable Cc: Pierre-Eric Pelloux-Prayer, Christian König, Alex Deucher, Sasha Levin From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> [ Upstream commit 23bd7e67961ee531386246e98021273bb45b0a84 ] It's doing the same thing as amdgpu_fill_buffer(src_data=0), so drop it. The only caveat is that amdgpu_res_cleared() return value is only valid right after allocation. --- v2: introduce new "bool consider_clear_status" arg v6: dont pass a NULL resv when calling amdgpu_fill_buffer from amdgpu_bo_create --- Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Stable adaptation for 6.18: Consolidate allocation clearing and VRAM wiping in amdgpu_fill_buffer, using the existing high_pr/low_pr drm_sched_entity objects and shared GART-window mutex. The upstream buffer-entity infrastructure is absent. Preserve the existing scheduling priorities and reservation dependencies, only skip cleared regions immediately after allocation, and handle a successful no-job clear with a NULL fence and an initialized return code. To prepare the unchanged VMID-flush fix in 87ceb8cba73d, pass these existing entities explicitly through the map/copy/fill helpers. Remove the unused direct-submit option (all callers passed false), update the benchmark and KFD callers, and specialize the fill entry point to zero, its only use. Use GART window 0 for clearing, matching the target's context. No functions or dynamic buffer-entity infrastructure are added; the VMID-flush behavior itself is left for the target commit. Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM") Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 189 +++++++----------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 21 +- drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 5 +- 5 files changed, 93 insertions(+), 143 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c index 199693369c7ce..81d0e16fd1fe4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c @@ -37,9 +37,9 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size, stime = ktime_get(); for (i = 0; i < n; i++) { - struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; - r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence, - false, false, 0); + r = amdgpu_copy_buffer(adev, &adev->mman.high_pr, + saddr, daddr, size, NULL, &fence, + false, 0); if (r) goto exit_do_move; r = dma_fence_wait(fence, false); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index cdab2c098cfab..e29bcb090f06d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -728,13 +728,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev, bo->tbo.resource->mem_type == TTM_PL_VRAM) { struct dma_fence *fence; - r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence); + r = amdgpu_fill_buffer(&adev->mman.low_pr, bo, + bo->tbo.base.resv, &fence, true, + AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); if (unlikely(r)) goto fail_unreserve; - dma_resv_add_fence(bo->tbo.base.resv, fence, - DMA_RESV_USAGE_KERNEL); - dma_fence_put(fence); + if (fence) { + dma_resv_add_fence(bo->tbo.base.resv, fence, + DMA_RESV_USAGE_KERNEL); + dma_fence_put(fence); + } } if (!bp->resv) amdgpu_bo_unreserve(bo); @@ -1324,7 +1328,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) if (r) goto out; - r = amdgpu_fill_buffer(abo, 0, &bo->base._resv, &fence, true, + r = amdgpu_fill_buffer(&adev->mman.low_pr, abo, + &bo->base._resv, &fence, false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index c48c266cc7a75..dbaba8aacec27 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -167,11 +167,11 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, /** * amdgpu_ttm_map_buffer - Map memory into the GART windows + * @entity: scheduler entity to use * @bo: buffer object to map * @mem: memory object to map * @mm_cur: range to map * @window: which GART window to use - * @ring: DMA ring to use for the copy * @tmz: if we should setup a TMZ enabled mapping * @size: in number of bytes to map, out number of bytes mapped * @addr: resulting address inside the MC address space @@ -179,14 +179,16 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, * Setup one of the GART windows to access a specific piece of memory or return * the physical address for local memory. */ -static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, +static int amdgpu_ttm_map_buffer(struct drm_sched_entity *entity, + struct ttm_buffer_object *bo, struct ttm_resource *mem, struct amdgpu_res_cursor *mm_cur, - unsigned int window, struct amdgpu_ring *ring, + unsigned int window, bool tmz, uint64_t *size, uint64_t *addr) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); unsigned int offset, num_pages, num_dw, num_bytes; + struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; uint64_t src_addr, dst_addr; struct amdgpu_job *job; void *cpu_addr; @@ -227,7 +229,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, num_dw = ALIGN(adev->mman.buffer_funcs->copy_num_dw, 8); num_bytes = num_pages * 8 * AMDGPU_GPU_PAGES_IN_CPU_PAGE; - r = amdgpu_job_alloc_with_ib(adev, &adev->mman.high_pr, + r = amdgpu_job_alloc_with_ib(adev, entity, AMDGPU_FENCE_OWNER_UNDEFINED, num_dw * 4 + num_bytes, AMDGPU_IB_POOL_DELAYED, &job, @@ -296,7 +298,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, struct dma_resv *resv, struct dma_fence **f) { - struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; + struct drm_sched_entity *entity = &adev->mman.high_pr; struct amdgpu_res_cursor src_mm, dst_mm; struct dma_fence *fence = NULL; int r = 0; @@ -322,13 +324,13 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, cur_size = min3(src_mm.size, dst_mm.size, 256ULL << 20); /* Map src to window 0 and dst to window 1. */ - r = amdgpu_ttm_map_buffer(src->bo, src->mem, &src_mm, - 0, ring, tmz, &cur_size, &from); + r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm, + 0, tmz, &cur_size, &from); if (r) goto error; - r = amdgpu_ttm_map_buffer(dst->bo, dst->mem, &dst_mm, - 1, ring, tmz, &cur_size, &to); + r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm, + 1, tmz, &cur_size, &to); if (r) goto error; @@ -355,8 +357,8 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, write_compress_disable)); } - r = amdgpu_copy_buffer(ring, from, to, cur_size, resv, - &next, false, true, copy_flags); + r = amdgpu_copy_buffer(adev, entity, from, to, cur_size, resv, + &next, true, copy_flags); if (r) goto error; @@ -410,7 +412,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence = NULL; - r = amdgpu_fill_buffer(abo, 0, NULL, &wipe_fence, + r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { goto error; @@ -2276,19 +2278,16 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable) } static int amdgpu_ttm_prepare_job(struct amdgpu_device *adev, - bool direct_submit, + struct drm_sched_entity *entity, unsigned int num_dw, struct dma_resv *resv, bool vm_needs_flush, struct amdgpu_job **job, - bool delayed, u64 k_job_id) + u64 k_job_id) { - enum amdgpu_ib_pool_type pool = direct_submit ? - AMDGPU_IB_POOL_DIRECT : - AMDGPU_IB_POOL_DELAYED; + enum amdgpu_ib_pool_type pool = AMDGPU_IB_POOL_DELAYED; int r; - struct drm_sched_entity *entity = delayed ? &adev->mman.low_pr : - &adev->mman.high_pr; + r = amdgpu_job_alloc_with_ib(adev, entity, AMDGPU_FENCE_OWNER_UNDEFINED, num_dw * 4, pool, job, k_job_id); @@ -2308,20 +2307,22 @@ static int amdgpu_ttm_prepare_job(struct amdgpu_device *adev, DMA_RESV_USAGE_BOOKKEEP); } -int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, +int amdgpu_copy_buffer(struct amdgpu_device *adev, + struct drm_sched_entity *entity, + uint64_t src_offset, uint64_t dst_offset, uint32_t byte_count, struct dma_resv *resv, - struct dma_fence **fence, bool direct_submit, + struct dma_fence **fence, bool vm_needs_flush, uint32_t copy_flags) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; unsigned int num_loops, num_dw; struct amdgpu_job *job; uint32_t max_bytes; unsigned int i; int r; - if (!direct_submit && !ring->sched.ready) { + if (!ring->sched.ready) { dev_err(adev->dev, "Trying to move memory with ring turned off.\n"); return -EINVAL; @@ -2330,8 +2331,8 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, max_bytes = adev->mman.buffer_funcs->copy_max_bytes; num_loops = DIV_ROUND_UP(byte_count, max_bytes); num_dw = ALIGN(num_loops * adev->mman.buffer_funcs->copy_num_dw, 8); - r = amdgpu_ttm_prepare_job(adev, direct_submit, num_dw, - resv, vm_needs_flush, &job, false, + r = amdgpu_ttm_prepare_job(adev, entity, num_dw, + resv, vm_needs_flush, &job, AMDGPU_KERNEL_JOB_ID_TTM_COPY_BUFFER); if (r) return r; @@ -2348,29 +2349,20 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, amdgpu_ring_pad_ib(ring, &job->ibs[0]); WARN_ON(job->ibs[0].length_dw > num_dw); - if (direct_submit) - r = amdgpu_job_submit_direct(job, ring, fence); - else - *fence = amdgpu_job_submit(job); - if (r) - goto error_free; - - return r; - -error_free: - amdgpu_job_free(job); - dev_err(adev->dev, "Error scheduling IBs (%d)\n", r); - return r; + *fence = amdgpu_job_submit(job); + return 0; } -static int amdgpu_ttm_fill_mem(struct amdgpu_ring *ring, uint32_t src_data, +static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, + struct drm_sched_entity *entity, + uint32_t src_data, uint64_t dst_addr, uint32_t byte_count, struct dma_resv *resv, struct dma_fence **fence, - bool vm_needs_flush, bool delayed, + bool vm_needs_flush, u64 k_job_id) { - struct amdgpu_device *adev = ring->adev; + struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; unsigned int num_loops, num_dw; struct amdgpu_job *job; uint32_t max_bytes; @@ -2380,8 +2372,8 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_ring *ring, uint32_t src_data, max_bytes = adev->mman.buffer_funcs->fill_max_bytes; num_loops = DIV_ROUND_UP_ULL(byte_count, max_bytes); num_dw = ALIGN(num_loops * adev->mman.buffer_funcs->fill_num_dw, 8); - r = amdgpu_ttm_prepare_job(adev, false, num_dw, resv, vm_needs_flush, - &job, delayed, k_job_id); + r = amdgpu_ttm_prepare_job(adev, entity, num_dw, resv, + vm_needs_flush, &job, k_job_id); if (r) return r; @@ -2402,90 +2394,39 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_ring *ring, uint32_t src_data, } /** - * amdgpu_ttm_clear_buffer - clear memory buffers - * @bo: amdgpu buffer object - * @resv: reservation object - * @fence: dma_fence associated with the operation - * - * Clear the memory buffer resource. - * - * Returns: - * 0 for success or a negative error code on failure. + * amdgpu_fill_buffer - fill a buffer with 0 + * @entity: scheduler entity to use + * @bo: the bo to fill + * @resv: fences contained in this reservation will be used as dependencies. + * @out_fence: the fence from the last clear will be stored here. It might be + * NULL if no job was run. + * @consider_clear_status: skip regions already cleared, only valid immediately + * after allocation. + * @k_job_id: trace id */ -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **fence) -{ - struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); - struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; - struct amdgpu_res_cursor cursor; - u64 addr; - int r = 0; - - if (!adev->mman.buffer_funcs_enabled) - return -EINVAL; - - if (!fence) - return -EINVAL; - - *fence = dma_fence_get_stub(); - - amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor); - - mutex_lock(&adev->mman.gtt_window_lock); - while (cursor.remaining) { - struct dma_fence *next = NULL; - u64 size; - - if (amdgpu_res_cleared(&cursor)) { - amdgpu_res_next(&cursor, cursor.size); - continue; - } - - /* Never clear more than 256MiB at once to avoid timeouts */ - size = min(cursor.size, 256ULL << 20); - - r = amdgpu_ttm_map_buffer(&bo->tbo, bo->tbo.resource, &cursor, - 1, ring, false, &size, &addr); - if (r) - goto err; - - r = amdgpu_ttm_fill_mem(ring, 0, addr, size, resv, - &next, true, true, - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); - if (r) - goto err; - - dma_fence_put(*fence); - *fence = next; - - amdgpu_res_next(&cursor, size); - } -err: - mutex_unlock(&adev->mman.gtt_window_lock); - - return r; -} - -int amdgpu_fill_buffer(struct amdgpu_bo *bo, - uint32_t src_data, - struct dma_resv *resv, - struct dma_fence **f, - bool delayed, - u64 k_job_id) +int amdgpu_fill_buffer(struct drm_sched_entity *entity, + struct amdgpu_bo *bo, + struct dma_resv *resv, + struct dma_fence **out_fence, + bool consider_clear_status, + u64 k_job_id) { struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); - struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; struct dma_fence *fence = NULL; struct amdgpu_res_cursor dst; int r; + if (!entity) + return -EINVAL; + if (!adev->mman.buffer_funcs_enabled) { dev_err(adev->dev, "Trying to clear memory with ring turned off.\n"); return -EINVAL; } + /* All regions may already be clear, with no job needed. */ + r = 0; amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &dst); mutex_lock(&adev->mman.gtt_window_lock); @@ -2493,16 +2434,22 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, struct dma_fence *next; uint64_t cur_size, to; + if (consider_clear_status && amdgpu_res_cleared(&dst)) { + amdgpu_res_next(&dst, dst.size); + continue; + } + /* Never fill more than 256MiB at once to avoid timeouts */ cur_size = min(dst.size, 256ULL << 20); - r = amdgpu_ttm_map_buffer(&bo->tbo, bo->tbo.resource, &dst, - 1, ring, false, &cur_size, &to); + r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &dst, + 0, false, &cur_size, &to); if (r) goto error; - r = amdgpu_ttm_fill_mem(ring, src_data, to, cur_size, resv, - &next, true, delayed, k_job_id); + r = amdgpu_ttm_fill_mem(adev, entity, + 0, to, cur_size, resv, + &next, true, k_job_id); if (r) goto error; @@ -2513,9 +2460,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, } error: mutex_unlock(&adev->mman.gtt_window_lock); - if (f) - *f = dma_fence_get(fence); - dma_fence_put(fence); + *out_fence = fence; return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index 0be2728aa8729..fc5133af30485 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -165,10 +165,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev); void amdgpu_ttm_fini(struct amdgpu_device *adev); void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable); -int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, +int amdgpu_copy_buffer(struct amdgpu_device *adev, + struct drm_sched_entity *entity, + uint64_t src_offset, uint64_t dst_offset, uint32_t byte_count, struct dma_resv *resv, - struct dma_fence **fence, bool direct_submit, + struct dma_fence **fence, bool vm_needs_flush, uint32_t copy_flags); int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, const struct amdgpu_copy_mem *src, @@ -176,15 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, uint64_t size, bool tmz, struct dma_resv *resv, struct dma_fence **f); -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **fence); -int amdgpu_fill_buffer(struct amdgpu_bo *bo, - uint32_t src_data, - struct dma_resv *resv, - struct dma_fence **fence, - bool delayed, - u64 k_job_id); +int amdgpu_fill_buffer(struct drm_sched_entity *entity, + struct amdgpu_bo *bo, + struct dma_resv *resv, + struct dma_fence **out_fence, + bool consider_clear_status, + u64 k_job_id); int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c index c47c9bda51f64..87d51e80df20f 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c @@ -153,8 +153,9 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *adev, dma_addr_t *sys, goto out_unlock; } - r = amdgpu_copy_buffer(ring, gart_s, gart_d, size * PAGE_SIZE, - NULL, &next, false, true, 0); + r = amdgpu_copy_buffer(adev, &adev->mman.high_pr, + gart_s, gart_d, size * PAGE_SIZE, + NULL, &next, true, 0); if (r) { dev_err(adev->dev, "fail %d to copy memory\n", r); goto out_unlock; -- 2.53.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer 2026-09-16 18:36 ` [PATCH 6.18.y 1/3] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer Sasha Levin @ 2026-09-16 18:36 ` Sasha Levin 2026-09-17 8:17 ` Christian König 2026-09-16 18:36 ` [PATCH 6.18.y 3/3] drm/amdgpu: skip the VMID 0 flush for VRAM Sasha Levin 1 sibling, 1 reply; 7+ messages in thread From: Sasha Levin @ 2026-09-16 18:36 UTC (permalink / raw) To: stable Cc: Pierre-Eric Pelloux-Prayer, Christian König, Alex Deucher, Sasha Levin From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> [ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ] This is the only use case for this function. --- v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer --- Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Stable adaptation for 6.18: The preceding stable dependency already specialized amdgpu_fill_buffer for zeroing and removed its src_data argument. Retain that adaptation and limit this dependency to renaming the existing helper, its declaration, its kernel-doc heading, and all three callers. Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared GART-window locking, reservation dependencies, and no-job return handling. The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity helper are absent from this stable tree and are not needed for the rename. No functions are added. The VMID-flush changes remain in the target commit, whose unchanged patch applies cleanly after this dependency. Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM") Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++--------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 12 ++++++------ 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index e29bcb090f06d..4def8b6640891 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, bo->tbo.resource->mem_type == TTM_PL_VRAM) { struct dma_fence *fence; - r = amdgpu_fill_buffer(&adev->mman.low_pr, bo, - bo->tbo.base.resv, &fence, true, - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo, + bo->tbo.base.resv, &fence, true, + AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); if (unlikely(r)) goto fail_unreserve; @@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) if (r) goto out; - r = amdgpu_fill_buffer(&adev->mman.low_pr, abo, - &bo->base._resv, &fence, false, - AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo, + &bo->base._resv, &fence, false, + AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index dbaba8aacec27..8a433a0920e74 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence = NULL; - r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); + r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { goto error; } else if (wipe_fence) { @@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, } /** - * amdgpu_fill_buffer - fill a buffer with 0 + * amdgpu_ttm_clear_buffer - fill a buffer with 0 * @entity: scheduler entity to use * @bo: the bo to fill * @resv: fences contained in this reservation will be used as dependencies. @@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, * after allocation. * @k_job_id: trace id */ -int amdgpu_fill_buffer(struct drm_sched_entity *entity, - struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **out_fence, - bool consider_clear_status, - u64 k_job_id) +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, + struct amdgpu_bo *bo, + struct dma_resv *resv, + struct dma_fence **out_fence, + bool consider_clear_status, + u64 k_job_id) { struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); struct dma_fence *fence = NULL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index fc5133af30485..c5f7efd78409a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, uint64_t size, bool tmz, struct dma_resv *resv, struct dma_fence **f); -int amdgpu_fill_buffer(struct drm_sched_entity *entity, - struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **out_fence, - bool consider_clear_status, - u64 k_job_id); +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, + struct amdgpu_bo *bo, + struct dma_resv *resv, + struct dma_fence **out_fence, + bool consider_clear_status, + u64 k_job_id); int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); -- 2.53.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer 2026-09-16 18:36 ` [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer Sasha Levin @ 2026-09-17 8:17 ` Christian König 2026-09-17 9:54 ` Arunpravin Paneer Selvam 2026-09-17 10:35 ` Arunpravin Paneer Selvam 0 siblings, 2 replies; 7+ messages in thread From: Christian König @ 2026-09-17 8:17 UTC (permalink / raw) To: Paneer Selvam, Arunpravin, Sasha Levin Cc: Alex Deucher, stable, Pierre-Eric Pelloux-Prayer On 9/16/26 20:36, Sasha Levin wrote: > From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> > > [ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ] > > This is the only use case for this function. > > --- > v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer > --- > > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> > Reviewed-by: Christian König <christian.koenig@amd.com> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com> > > Stable adaptation for 6.18: > > The preceding stable dependency already specialized amdgpu_fill_buffer > for zeroing and removed its src_data argument. Retain that adaptation > and limit this dependency to renaming the existing helper, its declaration, > its kernel-doc heading, and all three callers. > > Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared > GART-window locking, reservation dependencies, and no-job return handling. > The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity > helper are absent from this stable tree and are not needed for the rename. > No functions are added. The VMID-flush changes remain in the target commit, > whose unchanged patch applies cleanly after this dependency. Oh, that patch was never meant to be back ported but I see why it is necessary. > Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM") @Arun can you guys take a closer look if that is a good idea or not or? Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18. Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking. Regards, Christian. > Signed-off-by: Sasha Levin <sashal@kernel.org> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++--------- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 12 ++++++------ > 3 files changed, 21 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index e29bcb090f06d..4def8b6640891 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, > bo->tbo.resource->mem_type == TTM_PL_VRAM) { > struct dma_fence *fence; > > - r = amdgpu_fill_buffer(&adev->mman.low_pr, bo, > - bo->tbo.base.resv, &fence, true, > - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo, > + bo->tbo.base.resv, &fence, true, > + AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > if (unlikely(r)) > goto fail_unreserve; > > @@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) > if (r) > goto out; > > - r = amdgpu_fill_buffer(&adev->mman.low_pr, abo, > - &bo->base._resv, &fence, false, > - AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo, > + &bo->base._resv, &fence, false, > + AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > if (WARN_ON(r)) > goto out; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index dbaba8aacec27..8a433a0920e74 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { > struct dma_fence *wipe_fence = NULL; > > - r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, > - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > + r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, > + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > if (r) { > goto error; > } else if (wipe_fence) { > @@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, > } > > /** > - * amdgpu_fill_buffer - fill a buffer with 0 > + * amdgpu_ttm_clear_buffer - fill a buffer with 0 > * @entity: scheduler entity to use > * @bo: the bo to fill > * @resv: fences contained in this reservation will be used as dependencies. > @@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, > * after allocation. > * @k_job_id: trace id > */ > -int amdgpu_fill_buffer(struct drm_sched_entity *entity, > - struct amdgpu_bo *bo, > - struct dma_resv *resv, > - struct dma_fence **out_fence, > - bool consider_clear_status, > - u64 k_job_id) > +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, > + struct amdgpu_bo *bo, > + struct dma_resv *resv, > + struct dma_fence **out_fence, > + bool consider_clear_status, > + u64 k_job_id) > { > struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); > struct dma_fence *fence = NULL; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > index fc5133af30485..c5f7efd78409a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > @@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, > uint64_t size, bool tmz, > struct dma_resv *resv, > struct dma_fence **f); > -int amdgpu_fill_buffer(struct drm_sched_entity *entity, > - struct amdgpu_bo *bo, > - struct dma_resv *resv, > - struct dma_fence **out_fence, > - bool consider_clear_status, > - u64 k_job_id); > +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, > + struct amdgpu_bo *bo, > + struct dma_resv *resv, > + struct dma_fence **out_fence, > + bool consider_clear_status, > + u64 k_job_id); > > int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); > void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer 2026-09-17 8:17 ` Christian König @ 2026-09-17 9:54 ` Arunpravin Paneer Selvam 2026-09-17 10:35 ` Arunpravin Paneer Selvam 1 sibling, 0 replies; 7+ messages in thread From: Arunpravin Paneer Selvam @ 2026-09-17 9:54 UTC (permalink / raw) To: Christian König, Sasha Levin Cc: Alex Deucher, stable, Pierre-Eric Pelloux-Prayer On 9/17/2026 1:47 PM, Christian König wrote: > On 9/16/26 20:36, Sasha Levin wrote: >> From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> >> >> [ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ] >> >> This is the only use case for this function. >> >> --- >> v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer >> --- >> >> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> >> Reviewed-by: Christian König <christian.koenig@amd.com> >> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> >> >> Stable adaptation for 6.18: >> >> The preceding stable dependency already specialized amdgpu_fill_buffer >> for zeroing and removed its src_data argument. Retain that adaptation >> and limit this dependency to renaming the existing helper, its declaration, >> its kernel-doc heading, and all three callers. >> >> Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared >> GART-window locking, reservation dependencies, and no-job return handling. >> The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity >> helper are absent from this stable tree and are not needed for the rename. >> No functions are added. The VMID-flush changes remain in the target commit, >> whose unchanged patch applies cleanly after this dependency. > Oh, that patch was never meant to be back ported but I see why it is necessary. > >> Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM") > @Arun can you guys take a closer look if that is a good idea or not or? > > Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18. > > Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking. > > Regards, > Christian. Hi Christian, I will verify whether the VMID 0 flush issue is reproducible on 6.18 and whether the workaround is actually needed in that stable branch. Regards, Arun > >> Signed-off-by: Sasha Levin <sashal@kernel.org> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------ >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++--------- >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 12 ++++++------ >> 3 files changed, 21 insertions(+), 21 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> index e29bcb090f06d..4def8b6640891 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> @@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, >> bo->tbo.resource->mem_type == TTM_PL_VRAM) { >> struct dma_fence *fence; >> >> - r = amdgpu_fill_buffer(&adev->mman.low_pr, bo, >> - bo->tbo.base.resv, &fence, true, >> - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo, >> + bo->tbo.base.resv, &fence, true, >> + AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); >> if (unlikely(r)) >> goto fail_unreserve; >> >> @@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) >> if (r) >> goto out; >> >> - r = amdgpu_fill_buffer(&adev->mman.low_pr, abo, >> - &bo->base._resv, &fence, false, >> - AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo, >> + &bo->base._resv, &fence, false, >> + AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); >> if (WARN_ON(r)) >> goto out; >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> index dbaba8aacec27..8a433a0920e74 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> @@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, >> (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { >> struct dma_fence *wipe_fence = NULL; >> >> - r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, >> - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, >> + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); >> if (r) { >> goto error; >> } else if (wipe_fence) { >> @@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, >> } >> >> /** >> - * amdgpu_fill_buffer - fill a buffer with 0 >> + * amdgpu_ttm_clear_buffer - fill a buffer with 0 >> * @entity: scheduler entity to use >> * @bo: the bo to fill >> * @resv: fences contained in this reservation will be used as dependencies. >> @@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, >> * after allocation. >> * @k_job_id: trace id >> */ >> -int amdgpu_fill_buffer(struct drm_sched_entity *entity, >> - struct amdgpu_bo *bo, >> - struct dma_resv *resv, >> - struct dma_fence **out_fence, >> - bool consider_clear_status, >> - u64 k_job_id) >> +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, >> + struct amdgpu_bo *bo, >> + struct dma_resv *resv, >> + struct dma_fence **out_fence, >> + bool consider_clear_status, >> + u64 k_job_id) >> { >> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); >> struct dma_fence *fence = NULL; >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> index fc5133af30485..c5f7efd78409a 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> @@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, >> uint64_t size, bool tmz, >> struct dma_resv *resv, >> struct dma_fence **f); >> -int amdgpu_fill_buffer(struct drm_sched_entity *entity, >> - struct amdgpu_bo *bo, >> - struct dma_resv *resv, >> - struct dma_fence **out_fence, >> - bool consider_clear_status, >> - u64 k_job_id); >> +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, >> + struct amdgpu_bo *bo, >> + struct dma_resv *resv, >> + struct dma_fence **out_fence, >> + bool consider_clear_status, >> + u64 k_job_id); >> >> int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); >> void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer 2026-09-17 8:17 ` Christian König 2026-09-17 9:54 ` Arunpravin Paneer Selvam @ 2026-09-17 10:35 ` Arunpravin Paneer Selvam 1 sibling, 0 replies; 7+ messages in thread From: Arunpravin Paneer Selvam @ 2026-09-17 10:35 UTC (permalink / raw) To: Christian König, Sasha Levin Cc: Alex Deucher, stable, Pierre-Eric Pelloux-Prayer On 9/17/2026 1:47 PM, Christian König wrote: > On 9/16/26 20:36, Sasha Levin wrote: >> From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> >> >> [ Upstream commit 5bd8aab55bc18a744577bff79a8c58b031e3c05d ] >> >> This is the only use case for this function. >> >> --- >> v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer >> --- >> >> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> >> Reviewed-by: Christian König <christian.koenig@amd.com> >> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> >> >> Stable adaptation for 6.18: >> >> The preceding stable dependency already specialized amdgpu_fill_buffer >> for zeroing and removed its src_data argument. Retain that adaptation >> and limit this dependency to renaming the existing helper, its declaration, >> its kernel-doc heading, and all three callers. >> >> Keep the existing drm_sched_entity type, high_pr/low_pr selection, shared >> GART-window locking, reservation dependencies, and no-job return handling. >> The upstream amdgpu_ttm_buffer_entity infrastructure and next-clear-entity >> helper are absent from this stable tree and are not needed for the rename. >> No functions are added. The VMID-flush changes remain in the target commit, >> whose unchanged patch applies cleanly after this dependency. > Oh, that patch was never meant to be back ported but I see why it is necessary. > >> Stable-dep-of: 87ceb8cba73d ("drm/amdgpu: skip the VMID 0 flush for VRAM") > @Arun can you guys take a closer look if that is a good idea or not or? > > Could be that "drm/amdgpu: skip the VMID 0 flush for VRAM" doesn't even needs to be back ported to kernel 6.18. > > Essentially it shouldn't be necessary and is just a workaround for buggy HW which surfaced because of clear tracking. Hi Christian, I checked the 6.18 code and the clear-tracking path is present there, including the unconditional VMID 0 flush in the clear path. Since this appears to be a workaround for the underlying HW issue that surfaced with clear tracking, and we are already working on the actual fix, I think we can skip this workaround for 6.18 as you suggested. Regards, Arun > > Regards, > Christian. > >> Signed-off-by: Sasha Levin <sashal@kernel.org> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 ++++++------ >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++--------- >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 12 ++++++------ >> 3 files changed, 21 insertions(+), 21 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> index e29bcb090f06d..4def8b6640891 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c >> @@ -728,9 +728,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, >> bo->tbo.resource->mem_type == TTM_PL_VRAM) { >> struct dma_fence *fence; >> >> - r = amdgpu_fill_buffer(&adev->mman.low_pr, bo, >> - bo->tbo.base.resv, &fence, true, >> - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, bo, >> + bo->tbo.base.resv, &fence, true, >> + AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); >> if (unlikely(r)) >> goto fail_unreserve; >> >> @@ -1328,9 +1328,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) >> if (r) >> goto out; >> >> - r = amdgpu_fill_buffer(&adev->mman.low_pr, abo, >> - &bo->base._resv, &fence, false, >> - AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.low_pr, abo, >> + &bo->base._resv, &fence, false, >> + AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); >> if (WARN_ON(r)) >> goto out; >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> index dbaba8aacec27..8a433a0920e74 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c >> @@ -412,8 +412,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, >> (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { >> struct dma_fence *wipe_fence = NULL; >> >> - r = amdgpu_fill_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, >> - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); >> + r = amdgpu_ttm_clear_buffer(&adev->mman.high_pr, abo, NULL, &wipe_fence, >> + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); >> if (r) { >> goto error; >> } else if (wipe_fence) { >> @@ -2394,7 +2394,7 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, >> } >> >> /** >> - * amdgpu_fill_buffer - fill a buffer with 0 >> + * amdgpu_ttm_clear_buffer - fill a buffer with 0 >> * @entity: scheduler entity to use >> * @bo: the bo to fill >> * @resv: fences contained in this reservation will be used as dependencies. >> @@ -2404,12 +2404,12 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, >> * after allocation. >> * @k_job_id: trace id >> */ >> -int amdgpu_fill_buffer(struct drm_sched_entity *entity, >> - struct amdgpu_bo *bo, >> - struct dma_resv *resv, >> - struct dma_fence **out_fence, >> - bool consider_clear_status, >> - u64 k_job_id) >> +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, >> + struct amdgpu_bo *bo, >> + struct dma_resv *resv, >> + struct dma_fence **out_fence, >> + bool consider_clear_status, >> + u64 k_job_id) >> { >> struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); >> struct dma_fence *fence = NULL; >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> index fc5133af30485..c5f7efd78409a 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> @@ -178,12 +178,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, >> uint64_t size, bool tmz, >> struct dma_resv *resv, >> struct dma_fence **f); >> -int amdgpu_fill_buffer(struct drm_sched_entity *entity, >> - struct amdgpu_bo *bo, >> - struct dma_resv *resv, >> - struct dma_fence **out_fence, >> - bool consider_clear_status, >> - u64 k_job_id); >> +int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, >> + struct amdgpu_bo *bo, >> + struct dma_resv *resv, >> + struct dma_fence **out_fence, >> + bool consider_clear_status, >> + u64 k_job_id); >> >> int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); >> void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 6.18.y 3/3] drm/amdgpu: skip the VMID 0 flush for VRAM 2026-09-16 18:36 ` [PATCH 6.18.y 1/3] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer Sasha Levin 2026-09-16 18:36 ` [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer Sasha Levin @ 2026-09-16 18:36 ` Sasha Levin 1 sibling, 0 replies; 7+ messages in thread From: Sasha Levin @ 2026-09-16 18:36 UTC (permalink / raw) To: stable Cc: Arunpravin Paneer Selvam, Christian König, Timur Kristóf, Alex Deucher, Sasha Levin From: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> [ Upstream commit 87ceb8cba73d0b3c4025ff42495bccd8164acaed ] Clear-on-release only runs on VRAM, which amdgpu_ttm_map_buffer() reaches via its direct MC address without programming a GART window, yet the wipe still forces a VMID 0 flush. On GFX11 (e.g. Navi33) that spurious SDMA flush can wedge the engine; only flush when a GART window is actually used. v2: Let amdgpu_ttm_map_buffer() return whether the VMID 0 flush is needed, and drive the clear and copy paths from that. (Christian) v3: Make the vm_needs_flush output parameter mandatory instead of allowing NULL. (Christian) Fixes: a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality") Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5413 Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit a306e406e570b74318ff7d80e5b07b540ca1d3a9) Cc: stable@vger.kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 8a433a0920e74..38c219c36ce22 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -175,6 +175,8 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo, * @tmz: if we should setup a TMZ enabled mapping * @size: in number of bytes to map, out number of bytes mapped * @addr: resulting address inside the MC address space + * @vm_needs_flush: out, set true if a GART window was programmed (VMID 0 flush + * needed) or false for a direct address * * Setup one of the GART windows to access a specific piece of memory or return * the physical address for local memory. @@ -184,7 +186,8 @@ static int amdgpu_ttm_map_buffer(struct drm_sched_entity *entity, struct ttm_resource *mem, struct amdgpu_res_cursor *mm_cur, unsigned int window, - bool tmz, uint64_t *size, uint64_t *addr) + bool tmz, uint64_t *size, uint64_t *addr, + bool *vm_needs_flush) { struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); unsigned int offset, num_pages, num_dw, num_bytes; @@ -206,9 +209,12 @@ static int amdgpu_ttm_map_buffer(struct drm_sched_entity *entity, if (!tmz && mem->start != AMDGPU_BO_INVALID_OFFSET) { *addr = amdgpu_ttm_domain_start(adev, mem->mem_type) + mm_cur->start; + *vm_needs_flush = false; return 0; } + /* A GART window is programmed below, so its VMID 0 TLB needs a flush */ + *vm_needs_flush = true; /* * If start begins at an offset inside the page, then adjust the size @@ -318,6 +324,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, while (src_mm.remaining) { uint64_t from, to, cur_size, tiling_flags; uint32_t num_type, data_format, max_com, write_compress_disable; + bool src_vm_flush, dst_vm_flush; struct dma_fence *next; /* Never copy more than 256MiB at once to avoid a timeout */ @@ -325,12 +332,12 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, /* Map src to window 0 and dst to window 1. */ r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm, - 0, tmz, &cur_size, &from); + 0, tmz, &cur_size, &from, &src_vm_flush); if (r) goto error; r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm, - 1, tmz, &cur_size, &to); + 1, tmz, &cur_size, &to, &dst_vm_flush); if (r) goto error; @@ -358,7 +365,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, } r = amdgpu_copy_buffer(adev, entity, from, to, cur_size, resv, - &next, true, copy_flags); + &next, src_vm_flush || dst_vm_flush, copy_flags); if (r) goto error; @@ -2414,6 +2421,7 @@ int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); struct dma_fence *fence = NULL; struct amdgpu_res_cursor dst; + bool vm_needs_flush = false; int r; if (!entity) @@ -2443,13 +2451,13 @@ int amdgpu_ttm_clear_buffer(struct drm_sched_entity *entity, cur_size = min(dst.size, 256ULL << 20); r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &dst, - 0, false, &cur_size, &to); + 0, false, &cur_size, &to, &vm_needs_flush); if (r) goto error; r = amdgpu_ttm_fill_mem(adev, entity, 0, to, cur_size, resv, - &next, true, k_job_id); + &next, vm_needs_flush, k_job_id); if (r) goto error; -- 2.53.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-09-17 10:35 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-16 9:21 FAILED: patch "[PATCH] drm/amdgpu: skip the VMID 0 flush for VRAM" failed to apply to 6.18-stable tree gregkh 2026-09-16 18:36 ` [PATCH 6.18.y 1/3] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer Sasha Levin 2026-09-16 18:36 ` [PATCH 6.18.y 2/3] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer Sasha Levin 2026-09-17 8:17 ` Christian König 2026-09-17 9:54 ` Arunpravin Paneer Selvam 2026-09-17 10:35 ` Arunpravin Paneer Selvam 2026-09-16 18:36 ` [PATCH 6.18.y 3/3] drm/amdgpu: skip the VMID 0 flush for VRAM Sasha Levin
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