* [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits [not found] <YVtA67jImg3KlBTw@zn.tnic> @ 2021-10-06 17:38 ` tip-bot2 for Borislav Petkov 2021-10-07 23:40 ` Thomas Gleixner 2021-10-08 9:58 ` tip-bot2 for Borislav Petkov 1 sibling, 1 reply; 3+ messages in thread From: tip-bot2 for Borislav Petkov @ 2021-10-06 17:38 UTC (permalink / raw) To: linux-tip-commits; +Cc: Ser Olmy, Borislav Petkov, stable, x86, linux-kernel The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 908d969f88bfcf6d8538a0159e502567c7678775 Gitweb: https://git.kernel.org/tip/908d969f88bfcf6d8538a0159e502567c7678775 Author: Borislav Petkov <bp@suse.de> AuthorDate: Wed, 06 Oct 2021 18:33:52 +02:00 Committer: Borislav Petkov <bp@suse.de> CommitterDate: Wed, 06 Oct 2021 18:46:06 +02:00 x86/fpu: Restore the masking out of reserved MXCSR bits Ser Olmy reported a boot failure: init[1] bad frame in sigreturn frame:(ptrval) ip:b7c9fbe6 sp:bf933310 orax:ffffffff \ in libc-2.33.so[b7bed000+156000] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b CPU: 0 PID: 1 Comm: init Tainted: G W 5.14.9 #1 Hardware name: Hewlett-Packard HP PC/HP Board, BIOS JD.00.06 12/06/2001 Call Trace: dump_stack_lvl dump_stack panic do_exit.cold do_group_exit get_signal arch_do_signal_or_restart ? force_sig_info_to_task ? force_sig exit_to_user_mode_prepare syscall_exit_to_user_mode do_int80_syscall_32 entry_INT80_32 on an old 32-bit Intel CPU: vendor_id : GenuineIntel cpu family : 6 model : 6 model name : Celeron (Mendocino) stepping : 5 microcode : 0x3 Ser bisected the problem to the commit in Fixes. tglx suggested reverting the rejection of invalid MXCSR values which this commit introduced and replacing it with what the old code did - simply masking them out to zero. Further debugging confirmed his suggestion: fpu->state.fxsave.mxcsr: 0xb7be13b4, mxcsr_feature_mask: 0xffbf WARNING: CPU: 0 PID: 1 at arch/x86/kernel/fpu/signal.c:384 __fpu_restore_sig+0x51f/0x540 so restore the original behavior. Fixes: 6f9866a166cd ("x86/fpu/signal: Let xrstor handle the features to init") Reported-by: Ser Olmy <ser.olmy@protonmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Ser Olmy <ser.olmy@protonmail.com> Cc: <stable@vger.kernel.org> Link: https://lkml.kernel.org/r/YVtA67jImg3KlBTw@zn.tnic --- arch/x86/kernel/fpu/signal.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index 445c57c..684be34 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -379,9 +379,8 @@ static int __fpu_restore_sig(void __user *buf, void __user *buf_fx, sizeof(fpu->state.fxsave))) return -EFAULT; - /* Reject invalid MXCSR values. */ - if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) - return -EINVAL; + /* Mask out reserved MXCSR bits. */ + fpu->state.fxsave.mxcsr &= mxcsr_feature_mask; /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ if (use_xsave()) ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits 2021-10-06 17:38 ` [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits tip-bot2 for Borislav Petkov @ 2021-10-07 23:40 ` Thomas Gleixner 0 siblings, 0 replies; 3+ messages in thread From: Thomas Gleixner @ 2021-10-07 23:40 UTC (permalink / raw) To: tip-bot2 for Borislav Petkov, linux-tip-commits Cc: Ser Olmy, Borislav Petkov, stable, x86, linux-kernel On Wed, Oct 06 2021 at 17:38, tip-bot wrote: > Ser bisected the problem to the commit in Fixes. > > tglx suggested reverting the rejection of invalid MXCSR values which > this commit introduced and replacing it with what the old code did - > simply masking them out to zero. > > Further debugging confirmed his suggestion: > > fpu->state.fxsave.mxcsr: 0xb7be13b4, mxcsr_feature_mask: 0xffbf > WARNING: CPU: 0 PID: 1 at arch/x86/kernel/fpu/signal.c:384 __fpu_restore_sig+0x51f/0x540 > > so restore the original behavior. > > Fixes: 6f9866a166cd ("x86/fpu/signal: Let xrstor handle the features to init") > Reported-by: Ser Olmy <ser.olmy@protonmail.com> > Signed-off-by: Borislav Petkov <bp@suse.de> > Tested-by: Ser Olmy <ser.olmy@protonmail.com> > Cc: <stable@vger.kernel.org> > Link: https://lkml.kernel.org/r/YVtA67jImg3KlBTw@zn.tnic > --- > arch/x86/kernel/fpu/signal.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c > index 445c57c..684be34 100644 > --- a/arch/x86/kernel/fpu/signal.c > +++ b/arch/x86/kernel/fpu/signal.c > @@ -379,9 +379,8 @@ static int __fpu_restore_sig(void __user *buf, void __user *buf_fx, > sizeof(fpu->state.fxsave))) > return -EFAULT; > > - /* Reject invalid MXCSR values. */ > - if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) > - return -EINVAL; > + /* Mask out reserved MXCSR bits. */ > + fpu->state.fxsave.mxcsr &= mxcsr_feature_mask; can we please make this: --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -384,9 +384,14 @@ static bool __fpu_restore_sig(void __use sizeof(fpu->state.fxsave))) return false; - /* Reject invalid MXCSR values. */ - if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) - return false; + if (IS_ENABLED(CONFIG_X86_64)) { + /* Reject invalid MXCSR values. */ + if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) + return false; + } else { + /* Mask invalid bits out for historical reasons (broken hardware) */ + fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask; + } /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ if (use_xsave()) On a 64 bit kernel even 32bit user space which supplies broken mxcsr values has to be considered malicious. The 32bit story on those stone age machines is different because the hardware is simply buggy and we can't differentiate between broken hardware and broken or malicious software. Thanks, tglx ^ permalink raw reply [flat|nested] 3+ messages in thread
* [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits [not found] <YVtA67jImg3KlBTw@zn.tnic> 2021-10-06 17:38 ` [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits tip-bot2 for Borislav Petkov @ 2021-10-08 9:58 ` tip-bot2 for Borislav Petkov 1 sibling, 0 replies; 3+ messages in thread From: tip-bot2 for Borislav Petkov @ 2021-10-08 9:58 UTC (permalink / raw) To: linux-tip-commits; +Cc: Ser Olmy, Borislav Petkov, stable, x86, linux-kernel The following commit has been merged into the x86/urgent branch of tip: Commit-ID: d298b03506d3e161f7492c440babb0bfae35e650 Gitweb: https://git.kernel.org/tip/d298b03506d3e161f7492c440babb0bfae35e650 Author: Borislav Petkov <bp@suse.de> AuthorDate: Wed, 06 Oct 2021 18:33:52 +02:00 Committer: Borislav Petkov <bp@suse.de> CommitterDate: Fri, 08 Oct 2021 11:12:17 +02:00 x86/fpu: Restore the masking out of reserved MXCSR bits Ser Olmy reported a boot failure: init[1] bad frame in sigreturn frame:(ptrval) ip:b7c9fbe6 sp:bf933310 orax:ffffffff \ in libc-2.33.so[b7bed000+156000] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b CPU: 0 PID: 1 Comm: init Tainted: G W 5.14.9 #1 Hardware name: Hewlett-Packard HP PC/HP Board, BIOS JD.00.06 12/06/2001 Call Trace: dump_stack_lvl dump_stack panic do_exit.cold do_group_exit get_signal arch_do_signal_or_restart ? force_sig_info_to_task ? force_sig exit_to_user_mode_prepare syscall_exit_to_user_mode do_int80_syscall_32 entry_INT80_32 on an old 32-bit Intel CPU: vendor_id : GenuineIntel cpu family : 6 model : 6 model name : Celeron (Mendocino) stepping : 5 microcode : 0x3 Ser bisected the problem to the commit in Fixes. tglx suggested reverting the rejection of invalid MXCSR values which this commit introduced and replacing it with what the old code did - simply masking them out to zero. Further debugging confirmed his suggestion: fpu->state.fxsave.mxcsr: 0xb7be13b4, mxcsr_feature_mask: 0xffbf WARNING: CPU: 0 PID: 1 at arch/x86/kernel/fpu/signal.c:384 __fpu_restore_sig+0x51f/0x540 so restore the original behavior only for 32-bit kernels where you have ancient machines with buggy hardware. For 32-bit programs on 64-bit kernels, user space which supplies wrong MXCSR values is considered malicious so fail the sigframe restoration there. Fixes: 6f9866a166cd ("x86/fpu/signal: Let xrstor handle the features to init") Reported-by: Ser Olmy <ser.olmy@protonmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Ser Olmy <ser.olmy@protonmail.com> Cc: <stable@vger.kernel.org> Link: https://lkml.kernel.org/r/YVtA67jImg3KlBTw@zn.tnic --- arch/x86/kernel/fpu/signal.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index 445c57c..fa17a27 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -379,9 +379,14 @@ static int __fpu_restore_sig(void __user *buf, void __user *buf_fx, sizeof(fpu->state.fxsave))) return -EFAULT; - /* Reject invalid MXCSR values. */ - if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) - return -EINVAL; + if (IS_ENABLED(CONFIG_X86_64)) { + /* Reject invalid MXCSR values. */ + if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) + return -EINVAL; + } else { + /* Mask invalid bits out for historical reasons (broken hardware). */ + fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask; + } /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ if (use_xsave()) ^ permalink raw reply related [flat|nested] 3+ messages in thread
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[not found] <YVtA67jImg3KlBTw@zn.tnic>
2021-10-06 17:38 ` [tip: x86/urgent] x86/fpu: Restore the masking out of reserved MXCSR bits tip-bot2 for Borislav Petkov
2021-10-07 23:40 ` Thomas Gleixner
2021-10-08 9:58 ` tip-bot2 for Borislav Petkov
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