* [PATCH] PCI: qcom: fix pipe clock imbalance
@ 2022-04-01 10:13 Johan Hovold
2022-04-03 4:03 ` Bjorn Andersson
0 siblings, 1 reply; 2+ messages in thread
From: Johan Hovold @ 2022-04-01 10:13 UTC (permalink / raw)
To: Lorenzo Pieralisi, Stanimir Varbanov, Andy Gross, Bjorn Andersson
Cc: Rob Herring, Krzysztof Wilczyński, Bjorn Helgaas,
Dmitry Baryshkov, Johan Hovold, stable
Commit ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe
controller") introduced a clock imbalance by enabling the pipe clock
both in init() and in post_init() but only disabling in post_deinit().
Note that the pipe clock was also never disabled in the init() error
paths and that enabling the clock before powering up the PHY looks
questionable.
Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
Cc: stable@vger.kernel.org # 5.6
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/pci/controller/dwc/pcie-qcom.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index b79d98e5e228..20a0e6533a1c 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1238,12 +1238,6 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
goto err_disable_clocks;
}
- ret = clk_prepare_enable(res->pipe_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable pipe clock\n");
- goto err_disable_clocks;
- }
-
/* Wait for reset to complete, required on SM8450 */
usleep_range(1000, 1500);
--
2.35.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] PCI: qcom: fix pipe clock imbalance
2022-04-01 10:13 [PATCH] PCI: qcom: fix pipe clock imbalance Johan Hovold
@ 2022-04-03 4:03 ` Bjorn Andersson
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Andersson @ 2022-04-03 4:03 UTC (permalink / raw)
To: Johan Hovold
Cc: Lorenzo Pieralisi, Stanimir Varbanov, Andy Gross, Rob Herring,
Krzysztof Wilczy??ski, Bjorn Helgaas, Dmitry Baryshkov, stable
On Fri 01 Apr 03:13 PDT 2022, Johan Hovold wrote:
> Commit ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe
> controller") introduced a clock imbalance by enabling the pipe clock
> both in init() and in post_init() but only disabling in post_deinit().
>
> Note that the pipe clock was also never disabled in the init() error
> paths and that enabling the clock before powering up the PHY looks
> questionable.
>
> Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
> Cc: stable@vger.kernel.org # 5.6
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index b79d98e5e228..20a0e6533a1c 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1238,12 +1238,6 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
> goto err_disable_clocks;
> }
>
> - ret = clk_prepare_enable(res->pipe_clk);
> - if (ret) {
> - dev_err(dev, "cannot prepare/enable pipe clock\n");
> - goto err_disable_clocks;
> - }
> -
> /* Wait for reset to complete, required on SM8450 */
> usleep_range(1000, 1500);
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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