* [PATCH] drm/xe: Use ordered WQ for G2H handler
@ 2024-05-06 3:47 Matthew Brost
2024-05-06 14:28 ` Francois Dugast
0 siblings, 1 reply; 2+ messages in thread
From: Matthew Brost @ 2024-05-06 3:47 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost, stable
System work queues are shared, use a dedicated work queue for G2H
processing to avoid G2H processing getting block behind system tasks.
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: <stable@vger.kernel.org>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_ct.c | 5 +++++
drivers/gpu/drm/xe/xe_guc_ct.h | 2 +-
drivers/gpu/drm/xe/xe_guc_ct_types.h | 2 ++
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index 8ac819a7061e..cc60c3333ce3 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -121,6 +121,7 @@ static void guc_ct_fini(struct drm_device *drm, void *arg)
{
struct xe_guc_ct *ct = arg;
+ destroy_workqueue(ct->g2h_wq);
xa_destroy(&ct->fence_lookup);
}
@@ -146,6 +147,10 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));
+ ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", 0);
+ if(!ct->g2h_wq)
+ return -ENOMEM;
+
spin_lock_init(&ct->fast_lock);
xa_init(&ct->fence_lookup);
INIT_WORK(&ct->g2h_worker, g2h_worker_func);
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h
index 5083e099064f..105bb8e99a8d 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.h
+++ b/drivers/gpu/drm/xe/xe_guc_ct.h
@@ -34,7 +34,7 @@ static inline void xe_guc_ct_irq_handler(struct xe_guc_ct *ct)
return;
wake_up_all(&ct->wq);
- queue_work(system_unbound_wq, &ct->g2h_worker);
+ queue_work(ct->g2h_wq, &ct->g2h_worker);
xe_guc_ct_fast_path(ct);
}
diff --git a/drivers/gpu/drm/xe/xe_guc_ct_types.h b/drivers/gpu/drm/xe/xe_guc_ct_types.h
index d29144c9f20b..fede4c6e93cb 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_ct_types.h
@@ -120,6 +120,8 @@ struct xe_guc_ct {
wait_queue_head_t wq;
/** @g2h_fence_wq: wait queue used for G2H fencing */
wait_queue_head_t g2h_fence_wq;
+ /** @g2h_wq: used to process G2H */
+ struct workqueue_struct *g2h_wq;
/** @msg: Message buffer */
u32 msg[GUC_CTB_MSG_MAX_LEN];
/** @fast_msg: Message buffer */
--
2.34.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] drm/xe: Use ordered WQ for G2H handler
2024-05-06 3:47 [PATCH] drm/xe: Use ordered WQ for G2H handler Matthew Brost
@ 2024-05-06 14:28 ` Francois Dugast
0 siblings, 0 replies; 2+ messages in thread
From: Francois Dugast @ 2024-05-06 14:28 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe, stable
On Sun, May 05, 2024 at 08:47:58PM -0700, Matthew Brost wrote:
> System work queues are shared, use a dedicated work queue for G2H
> processing to avoid G2H processing getting block behind system tasks.
>
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_ct.c | 5 +++++
> drivers/gpu/drm/xe/xe_guc_ct.h | 2 +-
> drivers/gpu/drm/xe/xe_guc_ct_types.h | 2 ++
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index 8ac819a7061e..cc60c3333ce3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -121,6 +121,7 @@ static void guc_ct_fini(struct drm_device *drm, void *arg)
> {
> struct xe_guc_ct *ct = arg;
>
> + destroy_workqueue(ct->g2h_wq);
> xa_destroy(&ct->fence_lookup);
> }
>
> @@ -146,6 +147,10 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
>
> xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));
>
> + ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", 0);
> + if(!ct->g2h_wq)
> + return -ENOMEM;
> +
> spin_lock_init(&ct->fast_lock);
> xa_init(&ct->fence_lookup);
> INIT_WORK(&ct->g2h_worker, g2h_worker_func);
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h
> index 5083e099064f..105bb8e99a8d 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.h
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.h
> @@ -34,7 +34,7 @@ static inline void xe_guc_ct_irq_handler(struct xe_guc_ct *ct)
> return;
>
> wake_up_all(&ct->wq);
> - queue_work(system_unbound_wq, &ct->g2h_worker);
> + queue_work(ct->g2h_wq, &ct->g2h_worker);
> xe_guc_ct_fast_path(ct);
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct_types.h b/drivers/gpu/drm/xe/xe_guc_ct_types.h
> index d29144c9f20b..fede4c6e93cb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_ct_types.h
> @@ -120,6 +120,8 @@ struct xe_guc_ct {
> wait_queue_head_t wq;
> /** @g2h_fence_wq: wait queue used for G2H fencing */
> wait_queue_head_t g2h_fence_wq;
> + /** @g2h_wq: used to process G2H */
> + struct workqueue_struct *g2h_wq;
> /** @msg: Message buffer */
> u32 msg[GUC_CTB_MSG_MAX_LEN];
> /** @fast_msg: Message buffer */
> --
> 2.34.1
>
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