From: Jani Nikula <jani.nikula@linux.intel.com>
To: imre.deak@intel.com, Luca Coelho <luca@coelho.fi>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
stable@vger.kernel.org, Charlton Lin <charlton.lin@intel.com>,
Khaled Almahallawy <khaled.almahallawy@intel.com>
Subject: Re: [PATCH 01/19] drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink
Date: Thu, 07 Aug 2025 16:05:14 +0300 [thread overview]
Message-ID: <b8c6a347154b3ad39045c9fd2b805b522609f442@intel.com> (raw)
In-Reply-To: <aJShB9ufOBH9AWLY@ideak-desk>
On Thu, 07 Aug 2025, Imre Deak <imre.deak@intel.com> wrote:
> Would you be ok with
>
> tc_phy_owned_by_display()
Sounds good to me. Maybe add a brief comment "Is the PHY in legacy or
DP-alt mode" or something above the function.
BR,
Jani.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-08-07 13:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250805073700.642107-1-imre.deak@intel.com>
2025-08-05 7:36 ` [PATCH 01/19] drm/i915/lnl+/tc: Fix handling of an enabled/disconnected dp-alt sink Imre Deak
2025-08-07 7:06 ` Kahola, Mika
2025-08-07 10:59 ` Luca Coelho
2025-08-07 11:38 ` Imre Deak
2025-08-07 12:19 ` Jani Nikula
2025-08-07 12:32 ` Imre Deak
2025-08-07 12:50 ` Imre Deak
2025-08-07 13:05 ` Jani Nikula [this message]
2025-08-07 13:24 ` Imre Deak
2025-08-07 14:10 ` Luca Coelho
2025-08-05 7:36 ` [PATCH 02/19] drm/i915/icl+/tc: Cache the max lane count value Imre Deak
2025-08-05 9:33 ` [PATCH v2 " Imre Deak
2025-08-07 8:07 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 03/19] drm/i915/lnl+/tc: Fix max lane count HW readout Imre Deak
2025-08-05 9:33 ` [PATCH v2 " Imre Deak
2025-08-07 8:36 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 04/19] drm/i915/lnl+/tc: Use the cached max lane count value Imre Deak
2025-08-07 8:49 ` Kahola, Mika
2025-08-05 7:36 ` [PATCH 05/19] drm/i915/icl+/tc: Convert AUX powered WARN to a debug message Imre Deak
2025-08-07 12:29 ` Kahola, Mika
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