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From: Ben Warren <bwarren@qstreams.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] u-boot 834x spd_ram
Date: Tue, 18 Apr 2006 10:07:35 -0400	[thread overview]
Message-ID: <1145369255.972.305.camel@saruman.qstreams.net> (raw)
In-Reply-To: <4444F16B.4030606@smiths-aerospace.com>

Jerry,

The 83xx chips have a separate memory bus for DDR, with its own chip
selects.  For these chips, you do in fact need to use the local bus CS0
for your boot flash/EEPROM.

I can't find anything in the manual that differentiates between the DDR
chip selects, so using CS2/3 was probably just a design choice.

regards,
Ben

On Tue, 2006-04-18 at 10:02 -0400, Jerry Van Baren wrote:

> Aziz Mzili wrote:
> > 
> > Hi
> > 
> > I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on 
> > cs2 and cs3. Is there any issue with it on cs0 and cs1 ?
> > 
> > thank you
> > 
> > Aziz Mzili
> 
> I'm not a 834x expert, but all my experience is that CS0 is used to boot 
> the processor.  If it is DDR RAM rather than flash, someone other than 
> the 834x must initialize the DDR RAM and load it with the boot program. 
>   That is possible, but very uncommon.
> 
> gvb
> 
> 
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  reply	other threads:[~2006-04-18 14:07 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-04-17 23:09 [U-Boot-Users] u-boot 834x spd_ram Aziz Mzili
2006-04-18 13:51 ` Kumar Gala
2006-04-18 14:09   ` Meszaros, Lajos
2006-04-18 15:44   ` Dan Malek
2006-04-18 14:02 ` Jerry Van Baren
2006-04-18 14:07   ` Ben Warren [this message]
  -- strict thread matches above, loose matches on Subject: below --
2006-04-18 15:45 Aziz Mzili
2006-04-18 16:54 Aziz Mzili

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