[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Sandeep Gopalpet]

Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
---
 drivers/net/tsec.c           |   19 ++++++++---------
 include/asm-ppc/immap_83xx.h |    9 ++++++++
 include/asm-ppc/immap_85xx.h |   10 +++++++++
 include/asm-ppc/immap_86xx.h |    9 ++++++++
 include/tsec.h               |   45 ++++++++++++++++++++---------------------
 5 files changed, 59 insertions(+), 33 deletions(-)

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..34f3be9 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
 #ifdef CONFIG_MPC85XX_FEC
 	{
 		.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
-		.miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+		.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
 		.devname = CONFIG_MPC85XX_FEC_NAME,
 		.phyaddr = FEC_PHY_ADDR,
 		.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
 	privlist[num_tsecs++] = priv;
 	priv->regs = tsec_info->regs;
 	priv->phyregs = tsec_info->miiregs;
+	priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
 
 	priv->phyaddr = tsec_info->phyaddr;
 	priv->flags = tsec_info->flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
 }
 
 /* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
 		uint reg, uint value)
 {
 	int timeout = 1000000;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
  * notvalid bit cleared), and the bus to cease activity (miimind
  * busy bit cleared), and then returns the value
  */
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint regnum)
 {
 	uint value;
 
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private *priv)
 {
 	/* Access TBI PHY registers at given TSEC register offset as opposed to the
 	 * register offset used for external PHY accesses */
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_ANA,
 			TBIANA_SETTINGS);
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON,
 			TBICON_CLK_SELECT);
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR,
 			TBICR_SETTINGS);
 }
 
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct phy_info *curphy;
-	volatile tsec_t *phyregs = priv->phyregs;
 	volatile tsec_t *regs = priv->regs;
 
 	/* Assign a Physical address to the TBI */
 	regs->tbipa = CONFIG_SYS_TBIPA_VALUE;
-	phyregs->tbipa = CONFIG_SYS_TBIPA_VALUE;
 	asm("sync");
 
 	/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct tsec_private * priv)
 uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
 {
 	uint phyid;
-	volatile tsec_t *regbase = priv->phyregs;
+	volatile tsec_mdio_t *regbase = priv->phyregs;
 	int timeout = 1000000;
 
 	for (phyid = 0; phyid < 4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd)
 {
 	int i;
 	uint result;
-	volatile tsec_t *phyregs = priv->phyregs;
+	volatile tsec_mdio_t *phyregs = priv->phyregs;
 
 	phyregs->miimcfg = MIIMCFG_RESET;
 
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..57b1a72 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -868,4 +868,13 @@ typedef struct immap {
 #endif
 #define CONFIG_SYS_MPC83xx_USB_ADDR \
 			(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+#define TSEC_SIZE			0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define MDIO_OFFSET			0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
 #endif				/* __IMMAP_83xx__ */
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 4194295..ad3910c 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1932,4 +1932,14 @@ typedef struct ccsr_gur {
 #define CONFIG_SYS_MPC85xx_USB_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
 
+/* TSEC and MDIO OFFSETS */
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+#define TSEC_SIZE			0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define MDIO_OFFSET			0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
 #endif /*__IMMAP_85xx__*/
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index fdfc654..80e7ecd 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1298,4 +1298,13 @@ extern immap_t  *immr;
 #define CONFIG_SYS_MPC86xx_DMA_OFFSET	(0x21000)
 #define CONFIG_SYS_MPC86xx_DMA_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
 
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+#define TSEC_SIZE			0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define MDIO_OFFSET			0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
 #endif /*__IMMAP_86xx__*/
diff --git a/include/tsec.h b/include/tsec.h
index 0ac3034..92ac49a 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -7,7 +7,7 @@
  *  terms of the GNU Public License, Version 2, incorporated
  *  herein by reference.
  *
- * Copyright 2004, 2007 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
  * (C) Copyright 2003, Motorola, Inc.
  * maintained by Xianghua Xiao (x.xiao at motorola.com)
  * author Andy Fleming
@@ -20,22 +20,12 @@
 #include <net.h>
 #include <config.h>
 
-#ifndef CONFIG_SYS_TSEC1_OFFSET
-    #define CONFIG_SYS_TSEC1_OFFSET	(0x24000)
-#endif
-
-#define TSEC_SIZE	0x01000
-
-/* FIXME:  Should these be pushed back to 83xx and 85xx config files? */
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
-	|| defined(CONFIG_MPC83xx)
-    #define TSEC_BASE_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
-#endif
-
 #define STD_TSEC_INFO(num) \
 {			\
 	.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
-	.miiregs = (tsec_t *)TSEC_BASE_ADDR, \
+	.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
+	.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					+ (num - 1) * MDIO_OFFSET), \
 	.devname = CONFIG_TSEC##num##_NAME, \
 	.phyaddr = TSEC##num##_PHY_ADDR, \
 	.flags = TSEC##num##_FLAGS \
@@ -44,7 +34,9 @@
 #define SET_STD_TSEC_INFO(x, num) \
 {			\
 	x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
-	x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \
+	x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
+	x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					 + (num - 1) * MDIO_OFFSET); \
 	x.devname = CONFIG_TSEC##num##_NAME; \
 	x.phyaddr = TSEC##num##_PHY_ADDR; \
 	x.flags = TSEC##num##_FLAGS;\
@@ -461,6 +453,16 @@ typedef struct tsec_hash_regs
 	uint	res2[24];
 } tsec_hash_t;
 
+typedef struct tsec_mdio
+{
+	uint	miimcfg;	/* MII Management: Configuration */
+	uint	miimcom;	/* MII Management: Command */
+	uint	miimadd;	/* MII Management: Address */
+	uint	miimcon;	/* MII Management: Control */
+	uint	miimstat;	/* MII Management: Status */
+	uint	miimind;	/* MII Management: Indicators */
+} tsec_mdio_t;
+
 typedef struct tsec
 {
 	/* General Control and Status Registers (0x2_n000) */
@@ -526,12 +528,7 @@ typedef struct tsec
 
 	uint	res51c;
 
-	uint	miimcfg;	/* MII Management: Configuration */
-	uint	miimcom;	/* MII Management: Command */
-	uint	miimadd;	/* MII Management: Address */
-	uint	miimcon;	/* MII Management: Control */
-	uint	miimstat;	/* MII Management: Status */
-	uint	miimind;	/* MII Management: Indicators */
+	uint	resmdio[6];
 
 	uint	res538;
 
@@ -571,7 +568,8 @@ typedef struct tsec
 
 struct tsec_private {
 	volatile tsec_t *regs;
-	volatile tsec_t *phyregs;
+	volatile tsec_mdio_t *phyregs;
+	volatile tsec_mdio_t *phyregs_sgmii;
 	struct phy_info *phyinfo;
 	uint phyaddr;
 	u32 flags;
@@ -630,7 +628,8 @@ struct phy_info {
 
 struct tsec_info_struct {
 	tsec_t *regs;
-	tsec_t *miiregs;
+	tsec_mdio_t *miiregs;
+	tsec_mdio_t *miiregs_sgmii;
 	char *devname;
 	unsigned int phyaddr;
 	u32 flags;
-- 
1.5.2.2

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gala]

On Oct 28, 2009, at 3:49 AM, Sandeep Gopalpet wrote:

> Moved the mdio regs out of the tsec structure,and
> provided different offsets for tsec base and mdio
> base so that provision for etsec2.0 can be provided.
>
> This patch helps in providing the support for etsec2.0
> In etsec2.0, the MDIO register space and the etsec reg
> space are different.
>
> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
> platform specific files.
>
> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
> ---
> drivers/net/tsec.c           |   19 ++++++++---------
> include/asm-ppc/immap_83xx.h |    9 ++++++++
> include/asm-ppc/immap_85xx.h |   10 +++++++++
> include/asm-ppc/immap_86xx.h |    9 ++++++++
> include/tsec.h               |   45 +++++++++++++++++++ 
> +---------------------
> 5 files changed, 59 insertions(+), 33 deletions(-)
>
>
[snip]

> diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/ 
> immap_83xx.h
> index c60a7d2..57b1a72 100644
> --- a/include/asm-ppc/immap_83xx.h
> +++ b/include/asm-ppc/immap_83xx.h
> @@ -868,4 +868,13 @@ typedef struct immap {
> #endif
> #define CONFIG_SYS_MPC83xx_USB_ADDR \
> 			(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
> +
> +#define CONFIG_SYS_TSEC1_OFFSET		0x24000
> +#define TSEC_SIZE			0x01000

Let's leave TSEC_SIZE in tsec.h as its never changing

> +
> +#define CONFIG_SYS_MDIO1_OFFSET		0x24520
> +#define MDIO_OFFSET			0x01000

didn't we agree to rename to TSEC_MDIO_OFFSET

> +
> +#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
> +#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)

- k

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kim Phillips]

On Wed, 28 Oct 2009 14:19:18 +0530
Sandeep Gopalpet <sandeep.kumar@freescale.com> wrote:

> Moved the mdio regs out of the tsec structure,and
> provided different offsets for tsec base and mdio
> base so that provision for etsec2.0 can be provided.
> 
> This patch helps in providing the support for etsec2.0
> In etsec2.0, the MDIO register space and the etsec reg
> space are different.
> 
> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
> platform specific files.
> 
> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
> ---

without this patchseries:

U-Boot 2009.11-rc1 (Oct 28 2009 - 14:57:54) MPC83XX

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC0, eTSEC1
Hit any key to stop autoboot:  0 
=> ping $serverip
Speed: 1000, full duplex
Using eTSEC0 device
host 192.168.1.1 is alive
=> 

with this patchseries:

U-Boot 2009.11-rc1-00002-g3775d27 (Oct 28 2009 - 14:45:51) MPC83XX

Reset Status: Software Hard, External/Internal Soft, External/Internal Hard

CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
Board: Freescale MPC8315ERDB Rev 0.1
I2C:   ready
DRAM:  128 MB
FLASH:  8 MB
NAND:  32 MiB
PCIE0: No link
PCIE1: No link
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC0: No support for PHY id 0; assuming generic
eTSEC1: No support for PHY id 0; assuming generic
eTSEC0, eTSEC1
Hit any key to stop autoboot:  0 
=> ping $serverip
eTSEC0: No link.
eTSEC1: No link.
ping failed; host 192.168.1.1 is not alive

do you not test older version tsecs/83xx?

> +typedef struct tsec_mdio
> +{

please also move this brace onto the above line.

Kim

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gopalpet-B05799]

 

>-----Original Message-----
>From: Phillips Kim-R1AAHA 
>Sent: Thursday, October 29, 2009 1:36 AM
>To: Kumar Gopalpet-B05799
>Cc: u-boot at lists.denx.de
>Subject: Re: [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space
>
>On Wed, 28 Oct 2009 14:19:18 +0530
>Sandeep Gopalpet <sandeep.kumar@freescale.com> wrote:
>
>> Moved the mdio regs out of the tsec structure,and provided different 
>> offsets for tsec base and mdio base so that provision for 
>etsec2.0 can 
>> be provided.
>> 
>> This patch helps in providing the support for etsec2.0 In etsec2.0, 
>> the MDIO register space and the etsec reg space are different.
>> 
>> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into 
>> platform specific files.
>> 
>> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
>> ---
>
>without this patchseries:
>
>U-Boot 2009.11-rc1 (Oct 28 2009 - 14:57:54) MPC83XX
>
>Reset Status: Software Hard, External/Internal Soft, 
>External/Internal Hard
>
>CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
>Board: Freescale MPC8315ERDB Rev 0.1
>I2C:   ready
>DRAM:  128 MB
>FLASH:  8 MB
>NAND:  32 MiB
>PCIE0: No link
>PCIE1: No link
>In:    serial
>Out:   serial
>Err:   serial
>Net:   eTSEC0, eTSEC1
>Hit any key to stop autoboot:  0
>=> ping $serverip
>Speed: 1000, full duplex
>Using eTSEC0 device
>host 192.168.1.1 is alive
>=> 
>
>with this patchseries:
>
>U-Boot 2009.11-rc1-00002-g3775d27 (Oct 28 2009 - 14:45:51) MPC83XX
>
>Reset Status: Software Hard, External/Internal Soft, 
>External/Internal Hard
>
>CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
>Board: Freescale MPC8315ERDB Rev 0.1
>I2C:   ready
>DRAM:  128 MB
>FLASH:  8 MB
>NAND:  32 MiB
>PCIE0: No link
>PCIE1: No link
>In:    serial
>Out:   serial
>Err:   serial
>Net:   eTSEC0: No support for PHY id 0; assuming generic
>eTSEC1: No support for PHY id 0; assuming generic eTSEC0, 
>eTSEC1 Hit any key to stop autoboot:  0 => ping $serverip
>eTSEC0: No link.
>eTSEC1: No link.
>ping failed; host 192.168.1.1 is not alive
>
>do you not test older version tsecs/83xx?
>
>> +typedef struct tsec_mdio
>> +{
>
>please also move this brace onto the above line.
>
Yes, Kim I have tested on one of the 83xx platforms. Will recheck if I
missed something.


-Thanks
Sandeep 

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gopalpet-B05799]

 

>-----Original Message-----
>From: Phillips Kim-R1AAHA 
>Sent: Thursday, October 29, 2009 1:36 AM
>To: Kumar Gopalpet-B05799
>Cc: u-boot at lists.denx.de
>Subject: Re: [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space
>
>On Wed, 28 Oct 2009 14:19:18 +0530
>Sandeep Gopalpet <sandeep.kumar@freescale.com> wrote:
>
>> Moved the mdio regs out of the tsec structure,and provided different 
>> offsets for tsec base and mdio base so that provision for 
>etsec2.0 can 
>> be provided.
>> 
>> This patch helps in providing the support for etsec2.0 In etsec2.0, 
>> the MDIO register space and the etsec reg space are different.
>> 
>> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into 
>> platform specific files.
>> 
>> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
>> ---
>
>without this patchseries:
>
>U-Boot 2009.11-rc1 (Oct 28 2009 - 14:57:54) MPC83XX
>
>Reset Status: Software Hard, External/Internal Soft, 
>External/Internal Hard
>
>CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
>Board: Freescale MPC8315ERDB Rev 0.1
>I2C:   ready
>DRAM:  128 MB
>FLASH:  8 MB
>NAND:  32 MiB
>PCIE0: No link
>PCIE1: No link
>In:    serial
>Out:   serial
>Err:   serial
>Net:   eTSEC0, eTSEC1
>Hit any key to stop autoboot:  0
>=> ping $serverip
>Speed: 1000, full duplex
>Using eTSEC0 device
>host 192.168.1.1 is alive
>=> 
>
>with this patchseries:
>
>U-Boot 2009.11-rc1-00002-g3775d27 (Oct 28 2009 - 14:45:51) MPC83XX
>
>Reset Status: Software Hard, External/Internal Soft, 
>External/Internal Hard
>
>CPU:   e300c3, MPC8315E, Rev: 1.0 at 400 MHz, CSB: 133.333 MHz
>Board: Freescale MPC8315ERDB Rev 0.1
>I2C:   ready
>DRAM:  128 MB
>FLASH:  8 MB
>NAND:  32 MiB
>PCIE0: No link
>PCIE1: No link
>In:    serial
>Out:   serial
>Err:   serial
>Net:   eTSEC0: No support for PHY id 0; assuming generic
>eTSEC1: No support for PHY id 0; assuming generic eTSEC0, 
>eTSEC1 Hit any key to stop autoboot:  0 => ping $serverip
>eTSEC0: No link.
>eTSEC1: No link.
>ping failed; host 192.168.1.1 is not alive
>
>do you not test older version tsecs/83xx?
>
>> +typedef struct tsec_mdio
>> +{
>
>please also move this brace onto the above line.


My bad. I forgot to change the MDIO_OFFSET in the last version of my
patches.
This is the reason why it failed for 83xx series.

Will resend the patches.

Thanks a lot Kim.


-Thanks
Sandeep

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kumar Gopalpet-B05799]

 

>-----Original Message-----
>From: Kumar Gala [mailto:galak at kernel.crashing.org] 
>Sent: Wednesday, October 28, 2009 8:27 PM
>To: Kumar Gopalpet-B05799
>Cc: Phillips Kim-R1AAHA; u-boot at lists.denx.de
>Subject: Re: [U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out 
>of TSEC Space
>
>
>On Oct 28, 2009, at 3:49 AM, Sandeep Gopalpet wrote:
>
>> Moved the mdio regs out of the tsec structure,and provided different 
>> offsets for tsec base and mdio base so that provision for 
>etsec2.0 can 
>> be provided.
>>
>> This patch helps in providing the support for etsec2.0 In etsec2.0, 
>> the MDIO register space and the etsec reg space are different.
>>
>> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into 
>> platform specific files.
>>
>> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
>> ---
>> drivers/net/tsec.c           |   19 ++++++++---------
>> include/asm-ppc/immap_83xx.h |    9 ++++++++
>> include/asm-ppc/immap_85xx.h |   10 +++++++++
>> include/asm-ppc/immap_86xx.h |    9 ++++++++
>> include/tsec.h               |   45 +++++++++++++++++++ 
>> +---------------------
>> 5 files changed, 59 insertions(+), 33 deletions(-)
>>
>>
>[snip]
>
>> diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/ 
>> immap_83xx.h index c60a7d2..57b1a72 100644
>> --- a/include/asm-ppc/immap_83xx.h
>> +++ b/include/asm-ppc/immap_83xx.h
>> @@ -868,4 +868,13 @@ typedef struct immap { #endif #define 
>> CONFIG_SYS_MPC83xx_USB_ADDR \
>> 			(CONFIG_SYS_IMMR + 
>CONFIG_SYS_MPC83xx_USB_OFFSET)
>> +
>> +#define CONFIG_SYS_TSEC1_OFFSET		0x24000
>> +#define TSEC_SIZE			0x01000
>
>Let's leave TSEC_SIZE in tsec.h as its never changing
>
>> +
>> +#define CONFIG_SYS_MDIO1_OFFSET		0x24520
>> +#define MDIO_OFFSET			0x01000
>
>didn't we agree to rename to TSEC_MDIO_OFFSET
>
>> +
>> +#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + 
>CONFIG_SYS_TSEC1_OFFSET)
>> +#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + 
>CONFIG_SYS_MDIO1_OFFSET)
>

OK. Will change them. I apolozise for not incorporating them in my last
patch.


-Thanks
Sandeep 

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Sandeep Gopalpet]

Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
---
 *. The changes have been tested on P2020RDB and MPC8315ERDB.
 *. Included the comments from Kumar Gala and Kim Phillips.

 drivers/net/tsec.c           |   21 +++++++++----------
 include/asm-ppc/immap_83xx.h |   11 +++++++++-
 include/asm-ppc/immap_85xx.h |    9 ++++++++
 include/asm-ppc/immap_86xx.h |   10 ++++++++-
 include/tsec.h               |   44 +++++++++++++++++++++---------------------
 5 files changed, 60 insertions(+), 35 deletions(-)

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3f74118..d8b6619 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
  * terms of the GNU Public License, Version 2, incorporated
  * herein by reference.
  *
- * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2009 Freescale Semiconductor, Inc.
  * (C) Copyright 2003, Motorola, Inc.
  * author Andy Fleming
  *
@@ -80,7 +80,7 @@ static struct tsec_info_struct tsec_info[] = {
 #ifdef CONFIG_MPC85XX_FEC
 	{
 		.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
-		.miiregs = (tsec_t *)(TSEC_BASE_ADDR),
+		.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
 		.devname = CONFIG_MPC85XX_FEC_NAME,
 		.phyaddr = FEC_PHY_ADDR,
 		.flags = FEC_FLAGS
@@ -133,6 +133,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
 	privlist[num_tsecs++] = priv;
 	priv->regs = tsec_info->regs;
 	priv->phyregs = tsec_info->miiregs;
+	priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
 
 	priv->phyaddr = tsec_info->phyaddr;
 	priv->flags = tsec_info->flags;
@@ -219,7 +220,7 @@ int tsec_init(struct eth_device *dev, bd_t * bd)
 }
 
 /* Writes the given phy's reg with value, using the specified MDIO regs */
-static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
+static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs, uint addr,
 		uint reg, uint value)
 {
 	int timeout = 1000000;
@@ -242,7 +243,7 @@ static void tsec_local_mdio_write(volatile tsec_t *phyregs, uint addr,
  * notvalid bit cleared), and the bus to cease activity (miimind
  * busy bit cleared), and then returns the value
  */
-uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
+uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint phyid, uint regnum)
 {
 	uint value;
 
@@ -287,11 +288,11 @@ static void tsec_configure_serdes(struct tsec_private *priv)
 {
 	/* Access TBI PHY registers at given TSEC register offset as opposed to the
 	 * register offset used for external PHY accesses */
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_ANA,
 			TBIANA_SETTINGS);
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON,
 			TBICON_CLK_SELECT);
-	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
+	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR,
 			TBICR_SETTINGS);
 }
 
@@ -303,12 +304,10 @@ static int init_phy(struct eth_device *dev)
 {
 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
 	struct phy_info *curphy;
-	volatile tsec_t *phyregs = priv->phyregs;
 	volatile tsec_t *regs = priv->regs;
 
 	/* Assign a Physical address to the TBI */
 	regs->tbipa = CONFIG_SYS_TBIPA_VALUE;
-	phyregs->tbipa = CONFIG_SYS_TBIPA_VALUE;
 	asm("sync");
 
 	/* Reset MII (due to new addresses) */
@@ -733,7 +732,7 @@ uint mii_parse_dm9161_scsr(uint mii_reg, struct tsec_private * priv)
 uint mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv)
 {
 	uint phyid;
-	volatile tsec_t *regbase = priv->phyregs;
+	volatile tsec_mdio_t *regbase = priv->phyregs;
 	int timeout = 1000000;
 
 	for (phyid = 0; phyid < 4; phyid++) {
@@ -1766,7 +1765,7 @@ void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd)
 {
 	int i;
 	uint result;
-	volatile tsec_t *phyregs = priv->phyregs;
+	volatile tsec_mdio_t *phyregs = priv->phyregs;
 
 	phyregs->miimcfg = MIIMCFG_RESET;
 
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index c60a7d2..6dd477c 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2009 Freescale Semiconductor, Inc.
  *
  * MPC83xx Internal Memory Map
  *
@@ -868,4 +868,13 @@ typedef struct immap {
 #endif
 #define CONFIG_SYS_MPC83xx_USB_ADDR \
 			(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
+
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+#define TSEC_SIZE			0x01000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define TSEC_MDIO_OFFSET		0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
 #endif				/* __IMMAP_83xx__ */
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 4194295..54b43b1 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1932,4 +1932,13 @@ typedef struct ccsr_gur {
 #define CONFIG_SYS_MPC85xx_USB_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
 
+/* TSEC and MDIO OFFSETS */
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define TSEC_MDIO_OFFSET		0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
 #endif /*__IMMAP_85xx__*/
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index fdfc654..be2eadd 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1,7 +1,7 @@
 /*
  * MPC86xx Internal Memory Map
  *
- * Copyright(c) 2004 Freescale Semiconductor
+ * Copyright 2004 Freescale Semiconductor
  * Jeff Brown (Jeffrey at freescale.com)
  * Srikanth Srinivasan (srikanth.srinivasan at freescale.com)
  *
@@ -1298,4 +1298,12 @@ extern immap_t  *immr;
 #define CONFIG_SYS_MPC86xx_DMA_OFFSET	(0x21000)
 #define CONFIG_SYS_MPC86xx_DMA_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
 
+#define CONFIG_SYS_TSEC1_OFFSET		0x24000
+
+#define CONFIG_SYS_MDIO1_OFFSET		0x24520
+#define TSEC_MDIO_OFFSET		0x01000
+
+#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
+
 #endif /*__IMMAP_86xx__*/
diff --git a/include/tsec.h b/include/tsec.h
index 0ac3034..d895d02 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -7,7 +7,7 @@
  *  terms of the GNU Public License, Version 2, incorporated
  *  herein by reference.
  *
- * Copyright 2004, 2007 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
  * (C) Copyright 2003, Motorola, Inc.
  * maintained by Xianghua Xiao (x.xiao at motorola.com)
  * author Andy Fleming
@@ -20,22 +20,14 @@
 #include <net.h>
 #include <config.h>
 
-#ifndef CONFIG_SYS_TSEC1_OFFSET
-    #define CONFIG_SYS_TSEC1_OFFSET	(0x24000)
-#endif
-
-#define TSEC_SIZE	0x01000
-
-/* FIXME:  Should these be pushed back to 83xx and 85xx config files? */
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
-	|| defined(CONFIG_MPC83xx)
-    #define TSEC_BASE_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
-#endif
+#define TSEC_SIZE 0x01000
 
 #define STD_TSEC_INFO(num) \
 {			\
 	.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
-	.miiregs = (tsec_t *)TSEC_BASE_ADDR, \
+	.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
+	.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					+ (num - 1) * TSEC_MDIO_OFFSET), \
 	.devname = CONFIG_TSEC##num##_NAME, \
 	.phyaddr = TSEC##num##_PHY_ADDR, \
 	.flags = TSEC##num##_FLAGS \
@@ -44,7 +36,9 @@
 #define SET_STD_TSEC_INFO(x, num) \
 {			\
 	x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
-	x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \
+	x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
+	x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					 + (num - 1) * TSEC_MDIO_OFFSET); \
 	x.devname = CONFIG_TSEC##num##_NAME; \
 	x.phyaddr = TSEC##num##_PHY_ADDR; \
 	x.flags = TSEC##num##_FLAGS;\
@@ -461,6 +455,15 @@ typedef struct tsec_hash_regs
 	uint	res2[24];
 } tsec_hash_t;
 
+typedef struct tsec_mdio {
+	uint	miimcfg;	/* MII Management: Configuration */
+	uint	miimcom;	/* MII Management: Command */
+	uint	miimadd;	/* MII Management: Address */
+	uint	miimcon;	/* MII Management: Control */
+	uint	miimstat;	/* MII Management: Status */
+	uint	miimind;	/* MII Management: Indicators */
+} tsec_mdio_t;
+
 typedef struct tsec
 {
 	/* General Control and Status Registers (0x2_n000) */
@@ -526,12 +529,7 @@ typedef struct tsec
 
 	uint	res51c;
 
-	uint	miimcfg;	/* MII Management: Configuration */
-	uint	miimcom;	/* MII Management: Command */
-	uint	miimadd;	/* MII Management: Address */
-	uint	miimcon;	/* MII Management: Control */
-	uint	miimstat;	/* MII Management: Status */
-	uint	miimind;	/* MII Management: Indicators */
+	uint	resmdio[6];
 
 	uint	res538;
 
@@ -571,7 +569,8 @@ typedef struct tsec
 
 struct tsec_private {
 	volatile tsec_t *regs;
-	volatile tsec_t *phyregs;
+	volatile tsec_mdio_t *phyregs;
+	volatile tsec_mdio_t *phyregs_sgmii;
 	struct phy_info *phyinfo;
 	uint phyaddr;
 	u32 flags;
@@ -630,7 +629,8 @@ struct phy_info {
 
 struct tsec_info_struct {
 	tsec_t *regs;
-	tsec_t *miiregs;
+	tsec_mdio_t *miiregs;
+	tsec_mdio_t *miiregs_sgmii;
 	char *devname;
 	unsigned int phyaddr;
 	u32 flags;
-- 
1.5.2.2

[U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space

[Kim Phillips]

On Thu, 29 Oct 2009 19:30:44 +0530
Sandeep Gopalpet <sandeep.kumar@freescale.com> wrote:

> Moved the mdio regs out of the tsec structure,and
> provided different offsets for tsec base and mdio
> base so that provision for etsec2.0 can be provided.
> 
> This patch helps in providing the support for etsec2.0
> In etsec2.0, the MDIO register space and the etsec reg
> space are different.
> 
> Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
> platform specific files.
> 
> Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
> ---

subject should say v4, but anyway, with the following CodingStyle fixes:

Acked-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/include/tsec.h b/include/tsec.h
index fc2f075..e33ef61 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -27,7 +27,7 @@
 	.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
 	.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
 	.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
-					+ (num - 1) * TSEC_MDIO_OFFSET), \
+					 + (num - 1) * TSEC_MDIO_OFFSET), \
 	.devname = CONFIG_TSEC##num##_NAME, \
 	.phyaddr = TSEC##num##_PHY_ADDR, \
 	.flags = TSEC##num##_FLAGS \
@@ -38,7 +38,7 @@
 	x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
 	x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
 	x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
-					 + (num - 1) * TSEC_MDIO_OFFSET); \
+					  + (num - 1) * TSEC_MDIO_OFFSET); \
 	x.devname = CONFIG_TSEC##num##_NAME; \
 	x.phyaddr = TSEC##num##_PHY_ADDR; \
 	x.flags = TSEC##num##_FLAGS;\