From: Bin Meng <bmeng.cn@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/6] x86: dts: Remove coreboot_fb.dtsi
Date: Fri, 10 Aug 2018 02:39:35 -0700 [thread overview]
Message-ID: <1533893978-12838-3-git-send-email-bmeng.cn@gmail.com> (raw)
In-Reply-To: <1533893978-12838-1-git-send-email-bmeng.cn@gmail.com>
There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.
While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/dts/bayleybay.dts | 1 -
arch/x86/dts/chromebook_link.dts | 1 -
arch/x86/dts/chromebook_samus.dts | 1 -
arch/x86/dts/chromebox_panther.dts | 1 -
arch/x86/dts/coreboot_fb.dtsi | 5 -----
arch/x86/dts/minnowmax.dts | 1 -
doc/README.x86 | 7 -------
7 files changed, 17 deletions(-)
delete mode 100644 arch/x86/dts/coreboot_fb.dtsi
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 9683c52..291dc07 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -15,7 +15,6 @@
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Intel Bayley Bay";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 115a088..f9f0979 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -8,7 +8,6 @@
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Google Link";
diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
index 9c48c9a..b58936b 100644
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -8,7 +8,6 @@
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Google Samus";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index a72a85e..f56e482 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -5,7 +5,6 @@
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Google Panther";
diff --git a/arch/x86/dts/coreboot_fb.dtsi b/arch/x86/dts/coreboot_fb.dtsi
deleted file mode 100644
index 7d72f18..0000000
--- a/arch/x86/dts/coreboot_fb.dtsi
+++ /dev/null
@@ -1,5 +0,0 @@
-/ {
- coreboot-fb {
- compatible = "coreboot-fb";
- };
-};
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 02ab4c1..6c65fb9 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -14,7 +14,6 @@
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Intel Minnowboard Max";
diff --git a/doc/README.x86 b/doc/README.x86
index 6015ca4..8cc4672 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -412,17 +412,10 @@ To enable video you must enable these options in coreboot:
- Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
- Keep VESA framebuffer
-And include coreboot_fb.dtsi in your board's device tree source file, like:
-
- /include/ "coreboot_fb.dtsi"
-
At present it seems that for Minnowboard Max, coreboot does not pass through
the video information correctly (it always says the resolution is 0x0). This
works correctly for link though.
-Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown
-at this point. Patches are welcome if you figure out anything wrong.
-
Test with QEMU for bare mode
----------------------------
QEMU is a fancy emulator that can enable us to test U-Boot without access to
--
2.7.4
next prev parent reply other threads:[~2018-08-10 9:39 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-10 9:39 [U-Boot] [PATCH 1/6] x86: coreboot: Add generic coreboot payload support Bin Meng
2018-08-10 9:39 ` [U-Boot] [PATCH 2/6] x86: Remove support for Advantech SOM-6896 Bin Meng
2018-08-10 12:43 ` George McCollister
2018-08-20 5:57 ` Bin Meng
2018-08-10 9:39 ` Bin Meng [this message]
2018-08-17 12:48 ` [U-Boot] [PATCH 3/6] x86: dts: Remove coreboot_fb.dtsi Simon Glass
2018-08-20 5:57 ` Bin Meng
2018-08-10 9:39 ` [U-Boot] [PATCH 4/6] x86: tsc: Try hardware calibration first Bin Meng
2018-08-14 6:54 ` Christian Gmeiner
2018-08-14 7:07 ` Bin Meng
2018-08-14 8:35 ` Christian Gmeiner
2018-08-20 5:57 ` Bin Meng
2018-08-10 9:39 ` [U-Boot] [PATCH 5/6] x86: coreboot: Add default TSC frequency in the device tree Bin Meng
2018-08-14 6:45 ` Christian Gmeiner
2018-08-20 5:57 ` Bin Meng
2018-08-10 9:39 ` [U-Boot] [PATCH 6/6] x86: efi: payload: " Bin Meng
2018-08-17 12:48 ` Simon Glass
2018-08-20 5:57 ` Bin Meng
2018-08-14 6:39 ` [U-Boot] [PATCH 1/6] x86: coreboot: Add generic coreboot payload support Christian Gmeiner
2018-08-20 5:56 ` Bin Meng
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