[U-Boot] [PATCH 00/14] DM conversion of omap i2c driver

[U-Boot] [PATCH 00/14] DM conversion of omap i2c driver

[Mugunthan V N]

This patch series adopts driver model for usb ether gadget
driver. This series is tested with follwoing commands on am335x,
am437x, dra74x, dra72x and am57xx evms. Pushed a branch [1] for
refference.

=> i2c dev 0
=> i2c probe
=> i2c md <valid device> 0

With this patch series, I observe a warning as below. The i2c
compat driver is needed as pmic drivers are not converted to i2c
dt/dm frame work yet. Once the client drivers are adopted to
dm-i2c, we can get rid of this warning.

#
# configuration written to .config
#
===================== WARNING ======================
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
====================================================

[1] - git://git.ti.com/~mugunthanvnm/ti-u-boot/mugunth-ti-u-boot.git dm-i2c

Mugunthan V N (14):
  omap4: i2c: correct register offset for sync register
  omap5/dra7: i2c: correct register offset for sync register
  drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL
    is enable
  ti_armv7_common: i2c: do not define DM_I2C for spl
  drivers: i2c: omap24xx_i2c: prepare driver for DM conversion
  drivers: i2c: omap24xx_i2c: adopt omap_i2c driver to driver model
  defconfig: am335x_boneblack_vboot: enable i2c driver model
  defconfig: am335x_evm: enable i2c driver model
  defconfig: am43xx_evm: enable i2c driver model
  defconfig: am43xx_hs_evm: enable i2c driver model
  defconfig: dra7xx_evm: enable i2c driver model
  defconfig: dra7xx_hs_evm: enable i2c driver model
  defconfig: am57xx_evm: enable i2c driver model
  defconfig: am57xx_hs_evm: enable i2c driver model

 arch/arm/include/asm/arch-omap4/i2c.h    |   6 +-
 arch/arm/include/asm/arch-omap5/i2c.h    |   6 +-
 configs/am335x_boneblack_vboot_defconfig |   1 +
 configs/am335x_evm_defconfig             |   1 +
 configs/am43xx_evm_defconfig             |   1 +
 configs/am43xx_hs_evm_defconfig          |   1 +
 configs/am57xx_evm_defconfig             |   1 +
 configs/am57xx_hs_evm_defconfig          |   1 +
 configs/dra7xx_evm_defconfig             |   1 +
 configs/dra7xx_hs_evm_defconfig          |   1 +
 drivers/i2c/i2c-uclass.c                 |  14 ++
 drivers/i2c/omap24xx_i2c.c               | 407 +++++++++++++++++++++----------
 include/configs/ti_armv7_common.h        |  16 ++
 13 files changed, 318 insertions(+), 139 deletions(-)

-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 01/14] omap4: i2c: correct register offset for sync register

[Mugunthan V N]

The register offset of i2c_sysc offset is not correct as per
omap4 TRM [1], correct the offsets as per the documentation.

[1] - http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/include/asm/arch-omap4/i2c.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/i2c.h b/arch/arm/include/asm/arch-omap4/i2c.h
index adc8eb2..463e979 100644
--- a/arch/arm/include/asm/arch-omap4/i2c.h
+++ b/arch/arm/include/asm/arch-omap4/i2c.h
@@ -14,9 +14,9 @@ struct i2c {
 	unsigned short revnb_lo;	/* 0x00 */
 	unsigned short res1;
 	unsigned short revnb_hi;	/* 0x04 */
-	unsigned short res2[13];
-	unsigned short sysc;		/* 0x20 */
-	unsigned short res3;
+	unsigned short res2[5];
+	unsigned short sysc;		/* 0x10 */
+	unsigned short res3[9];
 	unsigned short irqstatus_raw;	/* 0x24 */
 	unsigned short res4;
 	unsigned short stat;		/* 0x28 */
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 01/14] omap4: i2c: correct register offset for sync register

[Tom Rini]

On Mon, Jul 18, 2016 at 03:10:56PM +0530, Mugunthan V N wrote:

> The register offset of i2c_sysc offset is not correct as per
> omap4 TRM [1], correct the offsets as per the documentation.
> 
> [1] - http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 02/14] omap5/dra7: i2c: correct register offset for sync register

[Mugunthan V N]

The register offset of i2c_sysc offset is not correct as per
omap5[1]/dra7[2] TRM, correct the offsets as per the
documentation.

[1] - http://www.ti.com/lit/pdf/swpu249
[2] - http://www.ti.com/lit/pdf/spruhz6

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/include/asm/arch-omap5/i2c.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap5/i2c.h b/arch/arm/include/asm/arch-omap5/i2c.h
index d875cfe..2b55edf 100644
--- a/arch/arm/include/asm/arch-omap5/i2c.h
+++ b/arch/arm/include/asm/arch-omap5/i2c.h
@@ -14,9 +14,9 @@ struct i2c {
 	unsigned short revnb_lo;	/* 0x00 */
 	unsigned short res1;
 	unsigned short revnb_hi;	/* 0x04 */
-	unsigned short res2[13];
-	unsigned short sysc;		/* 0x20 */
-	unsigned short res3;
+	unsigned short res2[5];
+	unsigned short sysc;		/* 0x10 */
+	unsigned short res3[9];
 	unsigned short irqstatus_raw;	/* 0x24 */
 	unsigned short res4;
 	unsigned short stat;		/* 0x28 */
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 02/14] omap5/dra7: i2c: correct register offset for sync register

[Tom Rini]

On Mon, Jul 18, 2016 at 03:10:57PM +0530, Mugunthan V N wrote:

> The register offset of i2c_sysc offset is not correct as per
> omap5[1]/dra7[2] TRM, correct the offsets as per the
> documentation.
> 
> [1] - http://www.ti.com/lit/pdf/swpu249
> [2] - http://www.ti.com/lit/pdf/spruhz6
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Mugunthan V N]

parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
is enabled.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 50b99ea..20b30ff 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
 	return ops->deblock(bus);
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
 				struct dm_i2c_chip *chip)
 {
@@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
 
 	return 0;
 }
+#endif
 
 static int i2c_post_probe(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(OF_CONTROL)
 	struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
 
 	i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
 				     "clock-frequency", 100000);
 
 	return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
+#else
+	return 0;
+#endif
 }
 
 static int i2c_post_bind(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(OF_CONTROL)
 	/* Scan the bus for devices */
 	return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+#else
+	return 0;
+#endif
 }
 
 static int i2c_child_post_bind(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(OF_CONTROL)
 	struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
 
 	if (dev->of_offset == -1)
 		return 0;
 
 	return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat);
+#else
+	return 0;
+#endif
 }
 
 UCLASS_DRIVER(i2c) = {
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Simon Glass]

Hi Mugunthan,

On 18 July 2016 at 03:40, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
> is enabled.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

Please see below.

>
> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
> index 50b99ea..20b30ff 100644
> --- a/drivers/i2c/i2c-uclass.c
> +++ b/drivers/i2c/i2c-uclass.c
> @@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
>         return ops->deblock(bus);
>  }
>
> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>                                 struct dm_i2c_chip *chip)
>  {
> @@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>
>         return 0;
>  }
> +#endif
>
>  static int i2c_post_probe(struct udevice *dev)
>  {
> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>         struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
>
>         i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>                                      "clock-frequency", 100000);

The above should be moved into i2c_chip_ofdata_to_platdata(), which
will only be called if there is a device tree.

>
>         return dm_i2c_set_bus_speed(dev, i2c->speed_hz);

I'm not sure about this one. In principle there should be a value
i2c->speed_hz even if OF_CONTROL is not used. But I suppose it's OK to
retain this #ifdef.

> +#else
> +       return 0;
> +#endif
>  }
>
>  static int i2c_post_bind(struct udevice *dev)
>  {
> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>         /* Scan the bus for devices */
>         return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
> +#else
> +       return 0;
> +#endif
>  }
>
>  static int i2c_child_post_bind(struct udevice *dev)
>  {
> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>         struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
>
>         if (dev->of_offset == -1)
>                 return 0;
>
>         return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat);
> +#else
> +       return 0;
> +#endif
>  }
>
>  UCLASS_DRIVER(i2c) = {
> --
> 2.9.1.200.gb1ec08f
>

Regards,
Simon

[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Mugunthan V N]

On Friday 22 July 2016 08:51 AM, Simon Glass wrote:
> Hi Mugunthan,
> 
> On 18 July 2016 at 03:40, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>> parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
>> is enabled.
>>
>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>> ---
>>  drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
> Please see below.
> 
>>
>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>> index 50b99ea..20b30ff 100644
>> --- a/drivers/i2c/i2c-uclass.c
>> +++ b/drivers/i2c/i2c-uclass.c
>> @@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
>>         return ops->deblock(bus);
>>  }
>>
>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>                                 struct dm_i2c_chip *chip)
>>  {
>> @@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>
>>         return 0;
>>  }
>> +#endif
>>
>>  static int i2c_post_probe(struct udevice *dev)
>>  {
>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>         struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
>>
>>         i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>>                                      "clock-frequency", 100000);
> 
> The above should be moved into i2c_chip_ofdata_to_platdata(), which
> will only be called if there is a device tree.

This cannot be moved to i2c_chip_ofdata_to_platdata() as it is called
from post_bind where uclass_priv will not be allocated. uclass_priv will
be allocated in device probe.

Regards
Mugunthan V N

> 
>>
>>         return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
> 
> I'm not sure about this one. In principle there should be a value
> i2c->speed_hz even if OF_CONTROL is not used. But I suppose it's OK to
> retain this #ifdef.
> 
>> +#else
>> +       return 0;
>> +#endif
>>  }
>>
>>  static int i2c_post_bind(struct udevice *dev)
>>  {
>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>         /* Scan the bus for devices */
>>         return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
>> +#else
>> +       return 0;
>> +#endif
>>  }
>>
>>  static int i2c_child_post_bind(struct udevice *dev)
>>  {
>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>         struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
>>
>>         if (dev->of_offset == -1)
>>                 return 0;
>>
>>         return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat);
>> +#else
>> +       return 0;
>> +#endif
>>  }
>>
>>  UCLASS_DRIVER(i2c) = {
>> --
>> 2.9.1.200.gb1ec08f
>>
> 
> Regards,
> Simon
> 

[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Simon Glass]

Hi Muganthan,

On 22 July 2016 at 01:35, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> On Friday 22 July 2016 08:51 AM, Simon Glass wrote:
>> Hi Mugunthan,
>>
>> On 18 July 2016 at 03:40, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>> parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
>>> is enabled.
>>>
>>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>>> ---
>>>  drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
>>>  1 file changed, 14 insertions(+)
>>
>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>
>> Please see below.
>>
>>>
>>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>>> index 50b99ea..20b30ff 100644
>>> --- a/drivers/i2c/i2c-uclass.c
>>> +++ b/drivers/i2c/i2c-uclass.c
>>> @@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
>>>         return ops->deblock(bus);
>>>  }
>>>
>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>                                 struct dm_i2c_chip *chip)
>>>  {
>>> @@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>
>>>         return 0;
>>>  }
>>> +#endif
>>>
>>>  static int i2c_post_probe(struct udevice *dev)
>>>  {
>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>         struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
>>>
>>>         i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>>>                                      "clock-frequency", 100000);
>>
>> The above should be moved into i2c_chip_ofdata_to_platdata(), which
>> will only be called if there is a device tree.
>
> This cannot be moved to i2c_chip_ofdata_to_platdata() as it is called
> from post_bind where uclass_priv will not be allocated. uclass_priv will
> be allocated in device probe.

OK I see. Then why do we need to support i2c without OF_CONTROL? Would
it not be better to enable OF_CONTROL?

Regards,
Simon

[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Mugunthan V N]

On Friday 22 July 2016 07:46 PM, Simon Glass wrote:
> Hi Muganthan,
> 
> On 22 July 2016 at 01:35, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>> On Friday 22 July 2016 08:51 AM, Simon Glass wrote:
>>> Hi Mugunthan,
>>>
>>> On 18 July 2016 at 03:40, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>>> parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
>>>> is enabled.
>>>>
>>>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>>>> ---
>>>>  drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
>>>>  1 file changed, 14 insertions(+)
>>>
>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>>
>>> Please see below.
>>>
>>>>
>>>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>>>> index 50b99ea..20b30ff 100644
>>>> --- a/drivers/i2c/i2c-uclass.c
>>>> +++ b/drivers/i2c/i2c-uclass.c
>>>> @@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
>>>>         return ops->deblock(bus);
>>>>  }
>>>>
>>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>>  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>>                                 struct dm_i2c_chip *chip)
>>>>  {
>>>> @@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>>
>>>>         return 0;
>>>>  }
>>>> +#endif
>>>>
>>>>  static int i2c_post_probe(struct udevice *dev)
>>>>  {
>>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>>         struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
>>>>
>>>>         i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>>>>                                      "clock-frequency", 100000);
>>>
>>> The above should be moved into i2c_chip_ofdata_to_platdata(), which
>>> will only be called if there is a device tree.
>>
>> This cannot be moved to i2c_chip_ofdata_to_platdata() as it is called
>> from post_bind where uclass_priv will not be allocated. uclass_priv will
>> be allocated in device probe.
> 
> OK I see. Then why do we need to support i2c without OF_CONTROL? Would
> it not be better to enable OF_CONTROL?
> 

Due to the memory size issue in OMAP SoCs, enabling OF_CONTROL for spl
is not possible. So having an option of enabling i2c uclass without
OF_CONTROL will be a good option.

Regards
Mugunthan V N

[U-Boot] [PATCH 03/14] drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enable

[Simon Glass]

Hi Mugunthan,

On 25 July 2016 at 08:35, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> On Friday 22 July 2016 07:46 PM, Simon Glass wrote:
>> Hi Muganthan,
>>
>> On 22 July 2016 at 01:35, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>> On Friday 22 July 2016 08:51 AM, Simon Glass wrote:
>>>> Hi Mugunthan,
>>>>
>>>> On 18 July 2016 at 03:40, Mugunthan V N <mugunthanvnm@ti.com> wrote:
>>>>> parse dt parameter of i2c devices only when CONFIG_OF_CONTROL
>>>>> is enabled.
>>>>>
>>>>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>>>>> ---
>>>>>  drivers/i2c/i2c-uclass.c | 14 ++++++++++++++
>>>>>  1 file changed, 14 insertions(+)
>>>>
>>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>>>
>>>> Please see below.
>>>>
>>>>>
>>>>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>>>>> index 50b99ea..20b30ff 100644
>>>>> --- a/drivers/i2c/i2c-uclass.c
>>>>> +++ b/drivers/i2c/i2c-uclass.c
>>>>> @@ -467,6 +467,7 @@ int i2c_deblock(struct udevice *bus)
>>>>>         return ops->deblock(bus);
>>>>>  }
>>>>>
>>>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>>>  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>>>                                 struct dm_i2c_chip *chip)
>>>>>  {
>>>>> @@ -482,31 +483,44 @@ int i2c_chip_ofdata_to_platdata(const void *blob, int node,
>>>>>
>>>>>         return 0;
>>>>>  }
>>>>> +#endif
>>>>>
>>>>>  static int i2c_post_probe(struct udevice *dev)
>>>>>  {
>>>>> +#if CONFIG_IS_ENABLED(OF_CONTROL)
>>>>>         struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
>>>>>
>>>>>         i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
>>>>>                                      "clock-frequency", 100000);
>>>>
>>>> The above should be moved into i2c_chip_ofdata_to_platdata(), which
>>>> will only be called if there is a device tree.
>>>
>>> This cannot be moved to i2c_chip_ofdata_to_platdata() as it is called
>>> from post_bind where uclass_priv will not be allocated. uclass_priv will
>>> be allocated in device probe.
>>
>> OK I see. Then why do we need to support i2c without OF_CONTROL? Would
>> it not be better to enable OF_CONTROL?
>>
>
> Due to the memory size issue in OMAP SoCs, enabling OF_CONTROL for spl
> is not possible. So having an option of enabling i2c uclass without
> OF_CONTROL will be a good option.

How does I2C work without OF_CONTROL? I thought it required it...

Regards,
Simon

[U-Boot] [PATCH 04/14] ti_armv7_common: i2c: do not define DM_I2C for spl

[Mugunthan V N]

Since omap's spl doesn't support DM currently, do not define
DM_I2C for spl build.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 include/configs/ti_armv7_common.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index ba7cf15..b996f35 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -108,6 +108,14 @@
 /* Timer information. */
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
 
+/*
+ * Disable DM_* for SPL build and can be re-enabled after adding
+ * DM support in SPL
+ */
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_I2C
+#endif
+
 /* I2C IP block */
 #define CONFIG_I2C
 #define CONFIG_SYS_I2C
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 04/14] ti_armv7_common: i2c: do not define DM_I2C for spl

[Tom Rini]

On Mon, Jul 18, 2016 at 03:10:59PM +0530, Mugunthan V N wrote:

> Since omap's spl doesn't support DM currently, do not define
> DM_I2C for spl build.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 05/14] drivers: i2c: omap24xx_i2c: prepare driver for DM conversion

[Mugunthan V N]

Prepare the driver for DM conversion.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/i2c/omap24xx_i2c.c | 308 +++++++++++++++++++++++++--------------------
 1 file changed, 175 insertions(+), 133 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index a7f3fb4..8dea5fa 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -53,10 +53,6 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Absolutely safe for status update at 100 kHz I2C: */
 #define I2C_WAIT	200
 
-static int wait_for_bb(struct i2c_adapter *adap);
-static struct i2c *omap24_get_base(struct i2c_adapter *adap);
-static u16 wait_for_event(struct i2c_adapter *adap);
-static void flush_fifo(struct i2c_adapter *adap);
 static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
 {
 	unsigned int sampleclk, prescaler;
@@ -90,9 +86,96 @@ static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
 	}
 	return -1;
 }
-static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+
+/*
+ * Wait for the bus to be free by checking the Bus Busy (BB)
+ * bit to become clear
+ */
+static int wait_for_bb(struct i2c *i2c_base, int waitdelay)
+{
+	int timeout = I2C_TIMEOUT;
+	u16 stat;
+
+	writew(0xFFFF, &i2c_base->stat);	/* clear current interrupts...*/
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+	while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
+#else
+	/* Read RAW status */
+	while ((stat = readw(&i2c_base->irqstatus_raw) &
+		I2C_STAT_BB) && timeout--) {
+#endif
+		writew(stat, &i2c_base->stat);
+		udelay(waitdelay);
+	}
+
+	if (timeout <= 0) {
+		printf("Timed out in wait_for_bb: status=%04x\n",
+		       stat);
+		return 1;
+	}
+	writew(0xFFFF, &i2c_base->stat);	 /* clear delayed stuff*/
+	return 0;
+}
+
+/*
+ * Wait for the I2C controller to complete current action
+ * and update status
+ */
+static u16 wait_for_event(struct i2c *i2c_base, int waitdelay)
+{
+	u16 status;
+	int timeout = I2C_TIMEOUT;
+
+	do {
+		udelay(waitdelay);
+#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
+		status = readw(&i2c_base->stat);
+#else
+		/* Read RAW status */
+		status = readw(&i2c_base->irqstatus_raw);
+#endif
+	} while (!(status &
+		   (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
+		    I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
+		    I2C_STAT_AL)) && timeout--);
+
+	if (timeout <= 0) {
+		printf("Timed out in wait_for_event: status=%04x\n",
+		       status);
+		/*
+		 * If status is still 0 here, probably the bus pads have
+		 * not been configured for I2C, and/or pull-ups are missing.
+		 */
+		printf("Check if pads/pull-ups of bus are properly configured\n");
+		writew(0xFFFF, &i2c_base->stat);
+		status = 0;
+	}
+
+	return status;
+}
+
+static void flush_fifo(struct i2c *i2c_base)
+{
+	u16 stat;
+
+	/*
+	 * note: if you try and read data when its not there or ready
+	 * you get a bus error
+	 */
+	while (1) {
+		stat = readw(&i2c_base->stat);
+		if (stat == I2C_STAT_RRDY) {
+			readb(&i2c_base->data);
+			writew(I2C_STAT_RRDY, &i2c_base->stat);
+			udelay(1000);
+		} else
+			break;
+	}
+}
+
+static int __omap24_i2c_setspeed(struct i2c *i2c_base, uint speed,
+				 int *waitdelay)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	int psc, fsscll = 0, fssclh = 0;
 	int hsscll = 0, hssclh = 0;
 	u32 scll = 0, sclh = 0;
@@ -142,8 +225,7 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 		}
 	}
 
-	adap->speed	= speed;
-	adap->waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */
+	*waitdelay = (10000000 / speed) * 2; /* wait for 20 clkperiods */
 	writew(0, &i2c_base->con);
 	writew(psc, &i2c_base->psc);
 	writew(scll, &i2c_base->scll);
@@ -154,9 +236,8 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 	return 0;
 }
 
-static void omap24_i2c_deblock(struct i2c_adapter *adap)
+static void omap24_i2c_deblock(struct i2c *i2c_base)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	int i;
 	u16 systest;
 	u16 orgsystest;
@@ -200,9 +281,9 @@ static void omap24_i2c_deblock(struct i2c_adapter *adap)
 	writew(orgsystest, &i2c_base->systest);
 }
 
-static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static void __omap24_i2c_init(struct i2c *i2c_base, int speed, int slaveadd,
+			      int *waitdelay)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	int timeout = I2C_TIMEOUT;
 	int deblock = 1;
 
@@ -224,7 +305,7 @@ retry:
 		udelay(1000);
 	}
 
-	if (0 != omap24_i2c_setspeed(adap, speed)) {
+	if (0 != __omap24_i2c_setspeed(i2c_base, speed, waitdelay)) {
 		printf("ERROR: failed to setup I2C bus-speed!\n");
 		return;
 	}
@@ -241,45 +322,24 @@ retry:
 	       I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
 #endif
 	udelay(1000);
-	flush_fifo(adap);
+	flush_fifo(i2c_base);
 	writew(0xFFFF, &i2c_base->stat);
 
 	/* Handle possible failed I2C state */
-	if (wait_for_bb(adap))
+	if (wait_for_bb(i2c_base, *waitdelay))
 		if (deblock == 1) {
-			omap24_i2c_deblock(adap);
+			omap24_i2c_deblock(i2c_base);
 			deblock = 0;
 			goto retry;
 		}
 }
 
-static void flush_fifo(struct i2c_adapter *adap)
-{
-	struct i2c *i2c_base = omap24_get_base(adap);
-	u16 stat;
-
-	/*
-	 * note: if you try and read data when its not there or ready
-	 * you get a bus error
-	 */
-	while (1) {
-		stat = readw(&i2c_base->stat);
-		if (stat == I2C_STAT_RRDY) {
-			readb(&i2c_base->data);
-			writew(I2C_STAT_RRDY, &i2c_base->stat);
-			udelay(1000);
-		} else
-			break;
-	}
-}
-
 /*
  * i2c_probe: Use write access. Allows to identify addresses that are
  *            write-only (like the config register of dual-port EEPROMs)
  */
-static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
+static int __omap24_i2c_probe(struct i2c *i2c_base, int waitdelay, uchar chip)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	u16 status;
 	int res = 1; /* default = fail */
 
@@ -287,7 +347,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
 		return res;
 
 	/* Wait until bus is free */
-	if (wait_for_bb(adap))
+	if (wait_for_bb(i2c_base, waitdelay))
 		return res;
 
 	/* No data transfer, slave addr only */
@@ -296,7 +356,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
 	writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
 	       I2C_CON_STP, &i2c_base->con);
 
-	status = wait_for_event(adap);
+	status = wait_for_event(i2c_base, waitdelay);
 
 	if ((status & ~I2C_STAT_XRDY) == 0 || (status & I2C_STAT_AL)) {
 		/*
@@ -306,8 +366,8 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
 		 * following 'if' section:
 		 */
 		if (status == I2C_STAT_XRDY)
-			printf("i2c_probe: pads on bus %d probably not configured (status=0x%x)\n",
-			       adap->hwadapnr, status);
+			printf("i2c_probe: pads on bus probably not configured (status=0x%x)\n",
+			       status);
 
 		goto pr_exit;
 	}
@@ -315,7 +375,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
 	/* Check for ACK (!NAK) */
 	if (!(status & I2C_STAT_NACK)) {
 		res = 0;				/* Device found */
-		udelay(adap->waitdelay);/* Required by AM335X in SPL */
+		udelay(waitdelay);/* Required by AM335X in SPL */
 		/* Abort transfer (force idle state) */
 		writew(I2C_CON_MST | I2C_CON_TRX, &i2c_base->con); /* Reset */
 		udelay(1000);
@@ -323,7 +383,7 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
 		       I2C_CON_STP, &i2c_base->con);		/* STP */
 	}
 pr_exit:
-	flush_fifo(adap);
+	flush_fifo(i2c_base);
 	writew(0xFFFF, &i2c_base->stat);
 	return res;
 }
@@ -341,10 +401,9 @@ pr_exit:
  *           or that do not need a register address at all (such as some clock
  *           distributors).
  */
-static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
-			   int alen, uchar *buffer, int len)
+static int __omap24_i2c_read(struct i2c *i2c_base, int waitdelay, uchar chip,
+			     uint addr, int alen, uchar *buffer, int len)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	int i2c_error = 0;
 	u16 status;
 
@@ -389,7 +448,7 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 #endif
 
 	/* Wait until bus not busy */
-	if (wait_for_bb(adap))
+	if (wait_for_bb(i2c_base, waitdelay))
 		return 1;
 
 	/* Zero, one or two bytes reg address (offset) */
@@ -410,12 +469,12 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 #endif
 		/* Send register offset */
 		while (1) {
-			status = wait_for_event(adap);
+			status = wait_for_event(i2c_base, waitdelay);
 			/* Try to identify bus that is not padconf'd for I2C */
 			if (status == I2C_STAT_XRDY) {
 				i2c_error = 2;
-				printf("i2c_read (addr phase): pads on bus %d probably not configured (status=0x%x)\n",
-				       adap->hwadapnr, status);
+				printf("i2c_read (addr phase): pads on bus probably not configured (status=0x%x)\n",
+				       status);
 				goto rd_exit;
 			}
 			if (status == 0 || (status & I2C_STAT_NACK)) {
@@ -450,7 +509,7 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 
 	/* Receive data */
 	while (1) {
-		status = wait_for_event(adap);
+		status = wait_for_event(i2c_base, waitdelay);
 		/*
 		 * Try to identify bus that is not padconf'd for I2C. This
 		 * state could be left over from previous transactions if
@@ -458,8 +517,8 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 		 */
 		if (status == I2C_STAT_XRDY) {
 			i2c_error = 2;
-			printf("i2c_read (data phase): pads on bus %d probably not configured (status=0x%x)\n",
-			       adap->hwadapnr, status);
+			printf("i2c_read (data phase): pads on bus probably not configured (status=0x%x)\n",
+			       status);
 			goto rd_exit;
 		}
 		if (status == 0 || (status & I2C_STAT_NACK)) {
@@ -477,16 +536,15 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 	}
 
 rd_exit:
-	flush_fifo(adap);
+	flush_fifo(i2c_base);
 	writew(0xFFFF, &i2c_base->stat);
 	return i2c_error;
 }
 
 /* i2c_write: Address (reg offset) may be 0, 1 or 2 bytes long. */
-static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
-			    int alen, uchar *buffer, int len)
+static int __omap24_i2c_write(struct i2c *i2c_base, int waitdelay, uchar chip,
+			      uint addr, int alen, uchar *buffer, int len)
 {
-	struct i2c *i2c_base = omap24_get_base(adap);
 	int i;
 	u16 status;
 	int i2c_error = 0;
@@ -536,7 +594,7 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 #endif
 
 	/* Wait until bus not busy */
-	if (wait_for_bb(adap))
+	if (wait_for_bb(i2c_base, waitdelay))
 		return 1;
 
 	/* Start address phase - will write regoffset + len bytes data */
@@ -549,12 +607,12 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 
 	while (alen) {
 		/* Must write reg offset (one or two bytes) */
-		status = wait_for_event(adap);
+		status = wait_for_event(i2c_base, waitdelay);
 		/* Try to identify bus that is not padconf'd for I2C */
 		if (status == I2C_STAT_XRDY) {
 			i2c_error = 2;
-			printf("i2c_write: pads on bus %d probably not configured (status=0x%x)\n",
-			       adap->hwadapnr, status);
+			printf("i2c_write: pads on bus probably not configured (status=0x%x)\n",
+			       status);
 			goto wr_exit;
 		}
 		if (status == 0 || (status & I2C_STAT_NACK)) {
@@ -576,7 +634,7 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 	}
 	/* Address phase is over, now write data */
 	for (i = 0; i < len; i++) {
-		status = wait_for_event(adap);
+		status = wait_for_event(i2c_base, waitdelay);
 		if (status == 0 || (status & I2C_STAT_NACK)) {
 			i2c_error = 1;
 			printf("i2c_write: error waiting for data ACK (status=0x%x)\n",
@@ -598,87 +656,21 @@ static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 	 * transferred on the bus.
 	 */
 	do {
-		status = wait_for_event(adap);
+		status = wait_for_event(i2c_base, waitdelay);
 	} while (!(status & I2C_STAT_ARDY) && timeout--);
 	if (timeout <= 0)
 		printf("i2c_write: timed out writig last byte!\n");
 
 wr_exit:
-	flush_fifo(adap);
+	flush_fifo(i2c_base);
 	writew(0xFFFF, &i2c_base->stat);
 	return i2c_error;
 }
 
 /*
- * Wait for the bus to be free by checking the Bus Busy (BB)
- * bit to become clear
- */
-static int wait_for_bb(struct i2c_adapter *adap)
-{
-	struct i2c *i2c_base = omap24_get_base(adap);
-	int timeout = I2C_TIMEOUT;
-	u16 stat;
-
-	writew(0xFFFF, &i2c_base->stat);	/* clear current interrupts...*/
-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
-	while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
-#else
-	/* Read RAW status */
-	while ((stat = readw(&i2c_base->irqstatus_raw) &
-		I2C_STAT_BB) && timeout--) {
-#endif
-		writew(stat, &i2c_base->stat);
-		udelay(adap->waitdelay);
-	}
-
-	if (timeout <= 0) {
-		printf("Timed out in wait_for_bb: status=%04x\n",
-		       stat);
-		return 1;
-	}
-	writew(0xFFFF, &i2c_base->stat);	 /* clear delayed stuff*/
-	return 0;
-}
-
-/*
- * Wait for the I2C controller to complete current action
- * and update status
+ * The legacy I2C functions. These need to get removed once
+ * all users of this driver are converted to DM.
  */
-static u16 wait_for_event(struct i2c_adapter *adap)
-{
-	struct i2c *i2c_base = omap24_get_base(adap);
-	u16 status;
-	int timeout = I2C_TIMEOUT;
-
-	do {
-		udelay(adap->waitdelay);
-#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX)
-		status = readw(&i2c_base->stat);
-#else
-		/* Read RAW status */
-		status = readw(&i2c_base->irqstatus_raw);
-#endif
-	} while (!(status &
-		   (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
-		    I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
-		    I2C_STAT_AL)) && timeout--);
-
-	if (timeout <= 0) {
-		printf("Timed out in wait_for_event: status=%04x\n",
-		       status);
-		/*
-		 * If status is still 0 here, probably the bus pads have
-		 * not been configured for I2C, and/or pull-ups are missing.
-		 */
-		printf("Check if pads/pull-ups of bus %d are properly configured\n",
-		       adap->hwadapnr);
-		writew(0xFFFF, &i2c_base->stat);
-		status = 0;
-	}
-
-	return status;
-}
-
 static struct i2c *omap24_get_base(struct i2c_adapter *adap)
 {
 	switch (adap->hwadapnr) {
@@ -710,6 +702,56 @@ static struct i2c *omap24_get_base(struct i2c_adapter *adap)
 	return NULL;
 }
 
+
+static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
+			   int alen, uchar *buffer, int len)
+{
+	struct i2c *i2c_base = omap24_get_base(adap);
+
+	return __omap24_i2c_read(i2c_base, adap->waitdelay, chip, addr,
+				 alen, buffer, len);
+}
+
+
+static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
+			    int alen, uchar *buffer, int len)
+{
+	struct i2c *i2c_base = omap24_get_base(adap);
+
+	return __omap24_i2c_write(i2c_base, adap->waitdelay, chip, addr,
+				  alen, buffer, len);
+}
+
+static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+{
+	struct i2c *i2c_base = omap24_get_base(adap);
+	int ret;
+
+	ret = __omap24_i2c_setspeed(i2c_base, speed, &adap->waitdelay);
+	if (ret) {
+		error("%s: set i2c speed failed\n", __func__);
+		return ret;
+	}
+
+	adap->speed = speed;
+
+	return 0;
+}
+
+static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+{
+	struct i2c *i2c_base = omap24_get_base(adap);
+
+	return __omap24_i2c_init(i2c_base, speed, slaveadd, &adap->waitdelay);
+}
+
+static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
+{
+	struct i2c *i2c_base = omap24_get_base(adap);
+
+	return __omap24_i2c_probe(i2c_base, adap->waitdelay, chip);
+}
+
 #if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1)
 #define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED
 #endif
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 05/14] drivers: i2c: omap24xx_i2c: prepare driver for DM conversion

[Simon Glass]

On 18 July 2016 at 03:41, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> Prepare the driver for DM conversion.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  drivers/i2c/omap24xx_i2c.c | 308 +++++++++++++++++++++++++--------------------
>  1 file changed, 175 insertions(+), 133 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 06/14] drivers: i2c: omap24xx_i2c: adopt omap_i2c driver to driver model

[Mugunthan V N]

Convert omap i2c driver to adopt i2c driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/i2c/omap24xx_i2c.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 99 insertions(+)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 8dea5fa..0006343 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -39,6 +39,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <i2c.h>
 
 #include <asm/arch/i2c.h>
@@ -53,6 +54,14 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Absolutely safe for status update at 100 kHz I2C: */
 #define I2C_WAIT	200
 
+struct omap_i2c {
+	struct udevice *clk;
+	struct i2c *regs;
+	unsigned int speed;
+	int waitdelay;
+	int clk_id;
+};
+
 static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
 {
 	unsigned int sampleclk, prescaler;
@@ -667,6 +676,7 @@ wr_exit:
 	return i2c_error;
 }
 
+#ifndef CONFIG_DM_I2C
 /*
  * The legacy I2C functions. These need to get removed once
  * all users of this driver are converted to DM.
@@ -811,3 +821,92 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
 #endif
 #endif
 #endif
+
+#else /* CONFIG_DM_I2C */
+
+static int omap_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
+{
+	struct omap_i2c *priv = dev_get_priv(bus);
+	int ret;
+
+	debug("i2c_xfer: %d messages\n", nmsgs);
+	for (; nmsgs > 0; nmsgs--, msg++) {
+		debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
+		if (msg->flags & I2C_M_RD) {
+			ret = __omap24_i2c_read(priv->regs, priv->waitdelay,
+						msg->addr, 0, 0, msg->buf,
+						msg->len);
+		} else {
+			ret = __omap24_i2c_write(priv->regs, priv->waitdelay,
+						 msg->addr, 0, 0, msg->buf,
+						 msg->len);
+		}
+		if (ret) {
+			debug("i2c_write: error sending\n");
+			return -EREMOTEIO;
+		}
+	}
+
+	return 0;
+}
+
+static int omap_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+	struct omap_i2c *priv = dev_get_priv(bus);
+
+	priv->speed = speed;
+
+	return __omap24_i2c_setspeed(priv->regs, speed, &priv->waitdelay);
+}
+
+static int omap_i2c_probe_chip(struct udevice *bus, uint chip_addr,
+				     uint chip_flags)
+{
+	struct omap_i2c *priv = dev_get_priv(bus);
+
+	return __omap24_i2c_probe(priv->regs, priv->waitdelay, chip_addr);
+}
+
+static int omap_i2c_probe(struct udevice *bus)
+{
+	struct omap_i2c *priv = dev_get_priv(bus);
+
+	__omap24_i2c_init(priv->regs, priv->speed, 0, &priv->waitdelay);
+
+	return 0;
+}
+
+static int omap_i2c_ofdata_to_platdata(struct udevice *bus)
+{
+	struct omap_i2c *priv = dev_get_priv(bus);
+
+	priv->regs = map_physmem(dev_get_addr(bus), sizeof(void *),
+				 MAP_NOCACHE);
+	priv->speed = CONFIG_SYS_OMAP24_I2C_SPEED;
+
+	return 0;
+}
+
+static const struct dm_i2c_ops omap_i2c_ops = {
+	.xfer		= omap_i2c_xfer,
+	.probe_chip	= omap_i2c_probe_chip,
+	.set_bus_speed	= omap_i2c_set_bus_speed,
+};
+
+static const struct udevice_id omap_i2c_ids[] = {
+	{ .compatible = "ti,omap4-i2c" },
+	{ }
+};
+
+U_BOOT_DRIVER(i2c_omap) = {
+	.name	= "i2c_omap",
+	.id	= UCLASS_I2C,
+	.of_match = omap_i2c_ids,
+	.ofdata_to_platdata = omap_i2c_ofdata_to_platdata,
+	.probe	= omap_i2c_probe,
+	.priv_auto_alloc_size = sizeof(struct omap_i2c),
+	.ops	= &omap_i2c_ops,
+	.flags  = DM_FLAG_PRE_RELOC,
+};
+
+#endif /* CONFIG_DM_I2C */
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 06/14] drivers: i2c: omap24xx_i2c: adopt omap_i2c driver to driver model

[Simon Glass]

On 18 July 2016 at 03:41, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> Convert omap i2c driver to adopt i2c driver model
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>  drivers/i2c/omap24xx_i2c.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 99 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 07/14] defconfig: am335x_boneblack_vboot: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am335x_boneblack_vboot as omap i2c
supports driver model. Also enable CONFIG_DM_I2C_COMPAT for
legacy drivers of i2c devices.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am335x_boneblack_vboot_defconfig | 1 +
 include/configs/ti_armv7_common.h        | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 903f518..c2f09cb 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -49,3 +49,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_DM_I2C=y
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index b996f35..9f947ee 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -118,7 +118,15 @@
 
 /* I2C IP block */
 #define CONFIG_I2C
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
+#else
+/*
+ * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
+ * devices are adopted to DM
+ */
+#define CONFIG_DM_I2C_COMPAT
+#endif
 
 /* MMC/SD IP block */
 #define CONFIG_MMC
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 07/14] defconfig: am335x_boneblack_vboot: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:02PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for am335x_boneblack_vboot as omap i2c
> supports driver model. Also enable CONFIG_DM_I2C_COMPAT for
> legacy drivers of i2c devices.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 08/14] defconfig: am335x_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am335x_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am335x_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 696024c..6885230 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -49,3 +49,4 @@ CONFIG_FIT=y
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 08/14] defconfig: am335x_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:03PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for am335x_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 09/14] defconfig: am43xx_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am43xx_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am43xx_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index cb3de11..0eab4ad 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -54,3 +54,4 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0403
 CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_SPL_OF_LIBFDT=y
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 09/14] defconfig: am43xx_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:04PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for am43xx_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 10/14] defconfig: am43xx_hs_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am43xx_hs_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am43xx_hs_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 68dfb6c..c8ce723 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -58,3 +58,4 @@ CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0403
 CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_SPL_OF_LIBFDT=y
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 10/14] defconfig: am43xx_hs_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:05PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for am43xx_hs_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 11/14] defconfig: dra7xx_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for dra7xx_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/dra7xx_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 756af63..1d27e52 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -57,3 +57,4 @@ CONFIG_FIT=y
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_LIST="dra7-evm dra72-evm"
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 11/14] defconfig: dra7xx_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:06PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for dra7xx_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 12/14] defconfig: dra7xx_hs_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for dra7xx_hs_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/dra7xx_hs_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index eb01f41..faf9cd5 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -60,3 +60,4 @@ CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_OF_LIST="dra7-evm dra72-evm"
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 12/14] defconfig: dra7xx_hs_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:07PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for dra7xx_hs_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 13/14] defconfig: am57xx_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am57xx_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am57xx_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index c29a05a..8a8a4c9 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -40,3 +40,4 @@ CONFIG_FIT=y
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_LIST="am57xx-beagle-x15 am572x-idk"
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f

[U-Boot] [PATCH 13/14] defconfig: am57xx_evm: enable i2c driver model

[Tom Rini]

On Mon, Jul 18, 2016 at 03:11:08PM +0530, Mugunthan V N wrote:

> Enable i2c driver model for am57xx_evm as omap i2c
> supports driver model.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] [PATCH 14/14] defconfig: am57xx_hs_evm: enable i2c driver model

[Mugunthan V N]

Enable i2c driver model for am57xx_hs_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 configs/am57xx_hs_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 01a4701..2ccb332 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -42,3 +42,4 @@ CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_OF_LIST="am57xx-beagle-x15"
+CONFIG_DM_I2C=y
-- 
2.9.1.200.gb1ec08f