From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] ARM: am33xx: Always inhibit init/refresh during DDR phy init
Date: Fri, 22 Jul 2016 09:42:26 -0400 [thread overview]
Message-ID: <20160722134226.GJ14698@bill-the-cat> (raw)
In-Reply-To: <1469100512-5467-3-git-send-email-Russ.Dill@ti.com>
On Thu, Jul 21, 2016 at 04:28:32AM -0700, Russ Dill wrote:
> A couple of commits have modified the am33xx/am437x ddr2/ddr3
> initialization path to fix certain issues, but have had the side effect
> of causing L3 noc errors during initialization. The two commits are:
>
> 69b918 "am33xx,ddr3: fix ddr3 sdram configuration"
> fc46ba "arm: am437x: Enable hardware leveling for EMIF"
>
> The EMIF_REG_INITREF_DIS_MASK bit still needs to be set for all
> platforms. This delays initialization and refresh until a later stage.
> The 500us timer can be programmed for platforms that require it
> and for platforms that don't require it. It is currently hardcoded
> for 400MHz systems. For systems with a higher memory frequency
> this needs to be a larger value, and for systems with a lower
> memory frequency this can be a lower value. This can be
> considered a separate issue and corrected in a later commit.
>
> Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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next prev parent reply other threads:[~2016-07-22 13:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-21 11:28 [U-Boot] [PATCH 0/2] am33xx/am437x u-boot DDR init fixes Russ Dill
2016-07-21 11:28 ` [U-Boot] [PATCH 1/2] ARM: am33xx: Fix DDR init delay placement Russ Dill
2016-07-22 13:42 ` Tom Rini
2016-07-26 2:32 ` [U-Boot] [U-Boot, " Tom Rini
2016-07-21 11:28 ` [U-Boot] [PATCH 2/2] ARM: am33xx: Always inhibit init/refresh during DDR phy init Russ Dill
2016-07-22 13:42 ` Tom Rini [this message]
2016-07-26 2:32 ` [U-Boot] [U-Boot, " Tom Rini
2016-07-22 13:42 ` [U-Boot] [PATCH 0/2] am33xx/am437x u-boot DDR init fixes Tom Rini
2016-07-23 0:31 ` Russ Dill
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