From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 2/2] arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode
Date: Sat, 29 Oct 2016 13:47:43 -0400 [thread overview]
Message-ID: <20161029174743.GP18591@bill-the-cat> (raw)
In-Reply-To: <98200dd8-e10f-b4b4-1d4f-34685e71854c@denx.de>
On Sat, Oct 29, 2016 at 07:44:34PM +0200, Marek Vasut wrote:
> On 10/29/2016 07:41 PM, Tom Rini wrote:
> > On Sat, Oct 29, 2016 at 03:19:10PM +0530, Keerthy wrote:
> >
> >> While we setup the mmu initially we mark set_section_dcache with
> >> DCACHE_OFF flag. In case of non-LPAE mode the DCACHE_OFF macro
> >> is rightly defined with TTB_SECT_XN_MASK set so as to mark all the
> >> 4GB XN. In case of LPAE mode XN(Execute-never) bit is not set with
> >> DCACHE_OFF. Hence XN bit is not set by default for DCACHE_OFF which
> >> keeps all the regions execute okay and this leads to random speculative
> >> fetches in random memory regions which was eventually caught by kernel
> >> omap-l3-noc driver.
> >>
> >> Fix this to mark the regions as XN by default.
> >>
> >> Signed-off-by: Keerthy <j-keerthy@ti.com>
> >> Reviewed-by: Alexander Graf <agraf@suse.de>
> >
> > Reviewed-by: Tom Rini <trini@konsulko.com>
> >
> Isn't this patch exactly undoing the following one ?
>
> commit 8890c2fbe6ed4c5ca9a61f21e846a55f8f2c38fc
> Author: Marek Vasut <>
> Date: Tue Dec 29 19:44:02 2015 +0100
>
> arm: Remove S bit from MMU section entry
>
> Restore the old behavior of the MMU section entries configuration,
> which is without the S-bit.
Is it? I guess perhaps you and Keerthy need to chat then as there's
some other problem they're addressing.
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20161029/d0c08863/attachment.sig>
next prev parent reply other threads:[~2016-10-29 17:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-29 9:49 [U-Boot] [PATCH v2 1/2] arm: print the cache config option in hex instead of decimal Keerthy
2016-10-29 9:49 ` [U-Boot] [PATCH v2 2/2] arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode Keerthy
2016-10-29 17:41 ` Tom Rini
2016-10-29 17:44 ` Marek Vasut
2016-10-29 17:47 ` Tom Rini [this message]
2016-10-29 17:49 ` Marek Vasut
2016-10-30 1:59 ` Keerthy
2016-10-30 12:00 ` Marek Vasut
2016-11-07 4:07 ` Keerthy
2016-11-13 20:56 ` [U-Boot] [U-Boot, v2, " Tom Rini
2016-10-29 17:41 ` [U-Boot] [PATCH v2 1/2] arm: print the cache config option in hex instead of decimal Tom Rini
2016-11-13 20:56 ` [U-Boot] [U-Boot, v2, " Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161029174743.GP18591@bill-the-cat \
--to=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox